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* fix flash/nand name parsingZachary T Welch2009-11-201-1/+3
| | | | | Start driver.num check from end, and make sure the numeric part is actually a number. Fix problems trying to parse bank names.
* Cortex-A8: better context restoreDavid Brownell2009-11-191-13/+67
| | | | | | | The previous version never wrote dirty registers for non-current CPU modes ... fix that. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: mode supportDavid Brownell2009-11-191-30/+116
| | | | | | | | | | | | | | | | We *should* be able to read and write registers in any core mode, instead of being stuck with whatever mode the core was when we entered debug state. This patch makes them work. Note that the current restore_context() only handles the current mode; writing to other-mode registers is a NOP without a followup patch fixing that. Also, that SPSR access needed some bugfixes; it was confused with CPSR. Secure monitor mode also seems dubious; there's probably more to be done before that's sufficiently understood by the debugger. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: create/use register_cache_invalidate()David Brownell2009-11-1914-77/+47
| | | | | | | | | | | | | | | Create a generic register_cache_invalidate(), and use it to replace three all-but-identical core-specific routines: - armv4_5_invalidate_core_regs() - armv7m_invalidate_core_regs - mips32_invalidate_core_regs() too. Make cache->num_regs be unsigned, avoiding various errors. Net code shrink and simplification. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* NAND verify doesn't advance.Dean Glazeski2009-11-191-1/+1
| | | | | | Fix to move the device address up as the contents are verified. Signed-off-by: Zachary T Welch <zw@superlucidity.net>
* add support for naming NAND banksZachary T Welch2009-11-192-3/+11
| | | | | Requires users to name their nand banks, allowing them to be used instead of bank numbers in script commands.
* refactor handle_nand_device_commandZachary T Welch2009-11-191-62/+62
| | | | | | | | | Move bulk of for-loop to a new static command helper function. Adds handle_nand_list_drivers command handler, registered as 'nand drivers'. Improves command help text and error reporting.
* add support for naming flash banksZachary T Welch2009-11-192-2/+10
| | | | | Requires users to name their flash banks, allowing them to be used instead of bank numbers in script commands.
* refactor handle_flash_bank_commandZachary T Welch2009-11-191-17/+13
| | | | | | | | Move variables to point of first use, reducing their scope. Add driver_name temporary to help arguments be changed later. Eliminates the useless 'found' variable, changing the code to terminate the loop immediate and return its success.
* rename flash and nand command helpersZachary T Welch2009-11-1913-44/+44
| | | | | | | After adding support for referencing banks by name, renames the COMMAND_HELPERs appropriately: flash_command_get_bank_by_num -> flash_command_get_bank nand_command_get_device_by_num -> flash_command_get_device
* allow flash/nand banks commands to accept namesZachary T Welch2009-11-197-4/+154
| | | | | | | | | | | | | | | | Add get_flash_bank_by_name (and get_nand_device_by_name) helpers to retrieves struct flash_bank * (struct nand_device *) given a driver name and an (optional) driver-specific bank index. These are used to extend flash_command_get_bank_by_num (and nand_command_get_device_by_num) to allow all flash (nand) commands to reference defined banks by name, not just by number. To avoid some code duplication, add the flash/common.[ch] files to hold functionality common to both types driver. The first two methods are helpers for the above routines to find a bank specified by a "name" or "name.index" string. get_flash_name_index() finds the '.index' portion, while flash_driver_name_matches() performs the string portion matching.
* ARM: remove per-register mallocDavid Brownell2009-11-192-1/+2
| | | | | | | Just pre-allocate memory for the cached register value. Shrinks heap overhead; increases locality-of-reference. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: streamline register initDavid Brownell2009-11-191-74/+88
| | | | | | | | | Combine register names with other per-register data into a single template structure. This saves space, and makes it easier to change how registers get handled (by shrinking the number of places that care about cache indices). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: parts of examine() run just onceDavid Brownell2009-11-191-4/+15
| | | | | | | | | The examine() method has some conceptual breakage. Cope with it by manually splitting out the run-once parts from the after-each-reset parts ... this gets rid of memory leaks and speeds up resets after the first one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* nand_fileio_parse_args parses wrong param for sizeDean Glazeski2009-11-191-1/+1
| | | | | | | This changes the size parameter from argv[2] to argv[3], which is what it's supposed to be. Signed-off-by: Zachary T Welch <zw@superlucidity.net>
* ARMv7-A: use standard ARM core statesDavid Brownell2009-11-195-31/+43
| | | | | | | | | | | | | | | We don't want an ARMv7-specific core state enumeration just to add ThumbEE state. Update the generic stuff to handle that, and replace the V7-specific bits with it. For Cortex-A8: on debug entry, check both the T and J bits instead of just the T bit. When the J bit is set, set the right state and warn appropriately. (And while we're at it, move the generic arm struct to the front of the v7a structure, for somewhat better code generation.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7-A: use standard ARM core_mode symbolsDavid Brownell2009-11-192-16/+3
| | | | | | | | | The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors is that v7-A is allowed to include "Secure monitor" support. That's now handled by our standard top-level ARM code ... so phase out the stuff that's specific to ARMv7-A. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix zy1000 command handlerZachary T Welch2009-11-181-13/+11
| | | | | | Rewrite ZY1000 power command handler to use new macros, simplify logic. Remove unused port command handler declaration.
* remove fast command and jim_global_longZachary T Welch2009-11-183-35/+2
| | | | | | | | Removing the fast command eliminates the fast_and_dangerous global, which was used only by arm7_9_common as an initializer. The command is not called in the tree; instead, more explicit commands are used. The jim_global_long function was not used anywhere in the tree.
* update src/hello.c with parsing examplesZachary T Welch2009-11-181-1/+54
| | | | | | | Adds the foo/bar commands to provide more working examples of command argument parsing, including the new handle_command_parse_bool helper. Updates hello command help text to provide useful information.
* change all bool parsers to accept any valueZachary T Welch2009-11-182-6/+5
| | | | | | | | | This patch changes the behavior of all boolean parsing callers to accept any one of "true/enable/on/yes/1" or "false/disable/off/no/0". Since one particular pair will be most appropriate in any given situation, the specific macros should continue to be used in order to display the most informative error messages possible.
* add handle_command_parse_bool command helperZachary T Welch2009-11-183-51/+69
| | | | | | | | | Rewrite arm11_handle_bool to provide a generic on/off command helper. Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper, which gets reused by the new command_parse_bool_any helper. This later helper is called by the new command helper function to accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
* use COMMAND_PARSE_ENABLE macro where appropriateZachary T Welch2009-11-186-158/+41
| | | | | | | | Updates all command parsing of simple "enable" and "disable" arguments. A few case in the tree use a tri-state or extended arguments, which cannot use this simple macro. Simlifies the xscale icache/dcache command handler logic.
* use COMMAND_PARSE_ON_OFF where appropriateZachary T Welch2009-11-185-50/+17
| | | | Updates all command parsing of "on" and "off" arguments.
* add COMMAND_PARSE_BOOL macro and friendsZachary T Welch2009-11-181-0/+28
| | | | | | | | | | | | Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing boolean command arguments. Two flavors are provided to provide drop-in compatibility with existing code, allow for the elimination of a lot of code bloat while improving the error checking and reporting. COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters. COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters. Both print the error and return an error out of the calling function.
* ARM: rework "arm reg" output for new modeDavid Brownell2009-11-181-35/+113
| | | | | | | | | | | | | | | | Change the layout to show the "Secure Monitor" registers too, when they're present. Instead of lining registers for each of six (or seven) modes up in adjacent vertical columns, display each mode's registers (or shadows) in a single block, avoiding duplicate value displays. This also lets us shrink the line length to fits in standard 80 character lines ... six or seven 18-character columns can't fit. Relabel "r13" as "sp", so it's more meaningful. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: xPSR handling updatesDavid Brownell2009-11-181-17/+20
| | | | | | | | | | When we read the CPSR on debug entry, update the CPSR cache in all cases, not just when the current processor state is User or System. Plus minor cleanup of how the (too-many) other registers' cache entries get updated. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add a default full_context() methodDavid Brownell2009-11-182-12/+27
| | | | | | | | | | | | If the core doesn't provide an optimized version of this method, provide one without core-specific optimizations. Use this to make Cortex-A8 support the "arm reg" command. Related: make the two register access methods properly static, have the "set" log a "not halted" error too, and make sure that the "valid" flag is set on successful reads. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: simplify ARMv7-A register handlingDavid Brownell2009-11-183-188/+50
| | | | | | | | | | | | | | | | | | | ARMv7-A doesn't need to duplicate all the standard ARM code for register handling. - Switch Cortex-A8 to use the standard register code - Remove duplicated infrastructure from ARMv7-A - Have ARMv7-A arch_state() show CPSR, like other ARMs Add comments to show where the Cortex-A8 isn't actually doing the right thing for register reads/writes, unless core happens to be in the right mode to start with. (Looks like maybe there may be generic confusion between saved/current PSR values in all the ARM code ...) Make related ARMv7-A and Cortex-A8 symbols properly static. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: setup "secure monitor mode" shadow regsDavid Brownell2009-11-182-21/+53
| | | | | | | | | | | | | Teach the "armv4_5" register code to understand about the secure monitor mode: - Add the other three shadowed registers to the arrays - Support another internal mode number (sigh) in mappings - Catch malloc/calloc failures building that register cache This should kick in for Cortex-A8 and ARM1176. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add "core_type" field to "struct arm"David Brownell2009-11-184-5/+31
| | | | | | | | | | It's used to flag cores with the "TrustZone" extension, and is used in subsequent patches to set up support for the registers shadowed by its new secure monitor mode. The ARM1176 and Cortex-A8 both support this new mode. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix segfault at startupZachary T Welch2009-11-181-1/+1
| | | | | | | | The previous changes to move the startup TCL code resulted in segfaults during startup. This seemingly innocuous patch fixes the problem. I would explain why changing from 'foo[]' to '*foo' caused this issue, but the difference seems superficial. For now, this hot fix will do, but this issue might bear further scrutiny.
* pass startup_tcl to command_initZachary T Welch2009-11-185-5/+11
| | | | | Removes external linkage from helper module, making the startup code a parameter to a new command context's initialization routine.
* split startup.tcl file across modulesZachary T Welch2009-11-1811-232/+246
| | | | | | | Moves definitions for each layer into their own file, eliminating layering violations in the built-in TCL code. Updates src/Makefile.am rules to include all files in the final startup.tcl input file, and others Makefile.am rules to distribute the new files in our packages.
* move startup.c to libopenocdZachary T Welch2009-11-182-10/+24
| | | | | Moves the creation of startup_tcl.c from src/helper/ to src/. Prepares to split the startup.tcl file into its per-module parts.
* fix regression in md/mw commandsZachary T Welch2009-11-181-4/+2
| | | | | | | The recent migration broke them, the fixes broken them in a new way, but this should restore them to working order. Eliminates the temporary variable, as the CMD_NAME macro can once again be use in routines that increment CMD_ARGV without nasty side-effects.
* jtag-api: get rid of unecessary buf_set_u23() that make code obtuse.Øyvind Harboe2009-11-181-11/+10
| | | | | | | | Also, this is on the path to increasing the word size for bit vectors from 8 to something wider(32? natural host machine width?) Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM: add is_arm_mode()David Brownell2009-11-176-40/+39
| | | | | | | | | | | | | | | | | | Add a new is_arm_mode() predicate, and use it to replace almost all calls to current armv4_5_mode_to_number(). Eventually those internal mode numbers should vanish... along with their siblings in the armv7a.c file. Remove a handful of superfluous checks ... e.g. the mode number was just initialized, or (debug entry methods) already validated. Move one of the macros using internal mode numbers into the only file which uses that macro. Make the tables manipulated with those numbers be read-only and, where possible, static so they're not confused with part of the generic ARM interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add arm_mode_name()David Brownell2009-11-179-30/+75
| | | | | | | | | | | | | | | Add and use arm_mode_name() to map from PSR bits to user meaningful names. It uses a new table which, later, can be used to hold other mode-coupled data. Add definitions for the "Secure Monitor" mode, as seen on some ARM11 cores (like ARM1176) and on Cortex-A8. The previous mode name scheme didn't understand that mode. Remove the old mechanism ... there were two copies, caused by Cortex-A8 needing to add "Secure Monitor" mode support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: only use one set of dummy FPA registersDavid Brownell2009-11-179-107/+39
| | | | | | | | | | | | | | | | All ARM cores need to provide obsolete FPA registers in their GDB register dumps. (Even though cores with floating point support now generally use some version of VFP...) Clean up that support a bit by sharing the same dummy registers, and removing the duplicate copies. Eventually we shouldn't need to export those dummies. (This makes the ARMv7-M support include the armv4_5 header, and cleans up related #includes, but doesn't yet use anything from there except those dummies.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove unused variable from run_commandZachary T Welch2009-11-171-3/+2
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* add CMD_NAME variable in command_invocationZachary T Welch2009-11-172-8/+9
| | | | | Update CMD_NAME from its migratory home in CMD_ARGV[-1] to cmd->name. Allows CMD_ARGV++ idiom to be used safely in command handlers.
* add struct command_invocation for COMMAND_HANDLERZachary T Welch2009-11-172-9/+21
| | | | | | | | | | Adds the command_invocation structure to encapsulate parameters for all COMMAND_HANDLER routines. Rather than passing several arguments to each successive subroutine, a single pointer may be passed around. Changes the CMD_* macros to reference the new fields. Updates run_command to create an instance and pass it to the handler.
* command_handler: change 'cmd_ctx' to CMD_CTXZachary T Welch2009-11-1751-620/+623
| | | | Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
* command_handler: change 'args' to CMD_ARGVZachary T Welch2009-11-1763-521/+521
| | | | | This patch converts all instances of 'args' in COMMAND_HANDLER routines to use CMD_ARGV macro.
* command_handler: change to 'argc' to CMD_ARGCZachary T Welch2009-11-1764-311/+311
| | | | | This patch converts all instances of 'argc' in COMMAND_HANDLER routines to use CMD_ARGC.
* add more command_handler conversion macrosZachary T Welch2009-11-171-1/+16
| | | | | | | | | Add additional macros to allow command handling to be migrated easily: CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV. In addition to making the remaining patches of this series cleaner, this introduces easily sed-able symbols that could allow us to retire these once the command handler infrastructure matures (i.e. pre-1.0).
* target: simplify register get/set opsDavid Brownell2009-11-1714-136/+62
| | | | | | | | | | | No need to indirect from registered integers to pointers. Just stash the pointers directly in the register struct, and don't even bother registering. This is a small code shrink, speeds register access just a smidgeon, and gets rid of another rude exit() path. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* jtag_registers: Avalon bridge flushing tweaksØyvind Harboe2009-11-171-1/+12
| | | | | | | | | | The code is now much more explicit. It flushes every N writes. For now flush every time, but tinkering with the bridge FIFO size and how often we flush clearly points in the direction of the Avalon write FIFO full being the culprit. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: revC UART forwardingØyvind Harboe2009-11-171-4/+12
| | | | | | Name of serial device differs between revB/C. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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