summaryrefslogtreecommitdiff
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* add handle_command_parse_bool command helperZachary T Welch2009-11-183-51/+69
| | | | | | | | | Rewrite arm11_handle_bool to provide a generic on/off command helper. Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper, which gets reused by the new command_parse_bool_any helper. This later helper is called by the new command helper function to accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
* use COMMAND_PARSE_ENABLE macro where appropriateZachary T Welch2009-11-186-158/+41
| | | | | | | | Updates all command parsing of simple "enable" and "disable" arguments. A few case in the tree use a tri-state or extended arguments, which cannot use this simple macro. Simlifies the xscale icache/dcache command handler logic.
* use COMMAND_PARSE_ON_OFF where appropriateZachary T Welch2009-11-185-50/+17
| | | | Updates all command parsing of "on" and "off" arguments.
* add COMMAND_PARSE_BOOL macro and friendsZachary T Welch2009-11-181-0/+28
| | | | | | | | | | | | Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing boolean command arguments. Two flavors are provided to provide drop-in compatibility with existing code, allow for the elimination of a lot of code bloat while improving the error checking and reporting. COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters. COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters. Both print the error and return an error out of the calling function.
* ARM: rework "arm reg" output for new modeDavid Brownell2009-11-181-35/+113
| | | | | | | | | | | | | | | | Change the layout to show the "Secure Monitor" registers too, when they're present. Instead of lining registers for each of six (or seven) modes up in adjacent vertical columns, display each mode's registers (or shadows) in a single block, avoiding duplicate value displays. This also lets us shrink the line length to fits in standard 80 character lines ... six or seven 18-character columns can't fit. Relabel "r13" as "sp", so it's more meaningful. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: xPSR handling updatesDavid Brownell2009-11-181-17/+20
| | | | | | | | | | When we read the CPSR on debug entry, update the CPSR cache in all cases, not just when the current processor state is User or System. Plus minor cleanup of how the (too-many) other registers' cache entries get updated. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add a default full_context() methodDavid Brownell2009-11-182-12/+27
| | | | | | | | | | | | If the core doesn't provide an optimized version of this method, provide one without core-specific optimizations. Use this to make Cortex-A8 support the "arm reg" command. Related: make the two register access methods properly static, have the "set" log a "not halted" error too, and make sure that the "valid" flag is set on successful reads. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: simplify ARMv7-A register handlingDavid Brownell2009-11-183-188/+50
| | | | | | | | | | | | | | | | | | | ARMv7-A doesn't need to duplicate all the standard ARM code for register handling. - Switch Cortex-A8 to use the standard register code - Remove duplicated infrastructure from ARMv7-A - Have ARMv7-A arch_state() show CPSR, like other ARMs Add comments to show where the Cortex-A8 isn't actually doing the right thing for register reads/writes, unless core happens to be in the right mode to start with. (Looks like maybe there may be generic confusion between saved/current PSR values in all the ARM code ...) Make related ARMv7-A and Cortex-A8 symbols properly static. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: setup "secure monitor mode" shadow regsDavid Brownell2009-11-182-21/+53
| | | | | | | | | | | | | Teach the "armv4_5" register code to understand about the secure monitor mode: - Add the other three shadowed registers to the arrays - Support another internal mode number (sigh) in mappings - Catch malloc/calloc failures building that register cache This should kick in for Cortex-A8 and ARM1176. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add "core_type" field to "struct arm"David Brownell2009-11-184-5/+31
| | | | | | | | | | It's used to flag cores with the "TrustZone" extension, and is used in subsequent patches to set up support for the registers shadowed by its new secure monitor mode. The ARM1176 and Cortex-A8 both support this new mode. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix segfault at startupZachary T Welch2009-11-181-1/+1
| | | | | | | | The previous changes to move the startup TCL code resulted in segfaults during startup. This seemingly innocuous patch fixes the problem. I would explain why changing from 'foo[]' to '*foo' caused this issue, but the difference seems superficial. For now, this hot fix will do, but this issue might bear further scrutiny.
* pass startup_tcl to command_initZachary T Welch2009-11-185-5/+11
| | | | | Removes external linkage from helper module, making the startup code a parameter to a new command context's initialization routine.
* split startup.tcl file across modulesZachary T Welch2009-11-1811-232/+246
| | | | | | | Moves definitions for each layer into their own file, eliminating layering violations in the built-in TCL code. Updates src/Makefile.am rules to include all files in the final startup.tcl input file, and others Makefile.am rules to distribute the new files in our packages.
* move startup.c to libopenocdZachary T Welch2009-11-182-10/+24
| | | | | Moves the creation of startup_tcl.c from src/helper/ to src/. Prepares to split the startup.tcl file into its per-module parts.
* fix regression in md/mw commandsZachary T Welch2009-11-181-4/+2
| | | | | | | The recent migration broke them, the fixes broken them in a new way, but this should restore them to working order. Eliminates the temporary variable, as the CMD_NAME macro can once again be use in routines that increment CMD_ARGV without nasty side-effects.
* jtag-api: get rid of unecessary buf_set_u23() that make code obtuse.Øyvind Harboe2009-11-181-11/+10
| | | | | | | | Also, this is on the path to increasing the word size for bit vectors from 8 to something wider(32? natural host machine width?) Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM: add is_arm_mode()David Brownell2009-11-176-40/+39
| | | | | | | | | | | | | | | | | | Add a new is_arm_mode() predicate, and use it to replace almost all calls to current armv4_5_mode_to_number(). Eventually those internal mode numbers should vanish... along with their siblings in the armv7a.c file. Remove a handful of superfluous checks ... e.g. the mode number was just initialized, or (debug entry methods) already validated. Move one of the macros using internal mode numbers into the only file which uses that macro. Make the tables manipulated with those numbers be read-only and, where possible, static so they're not confused with part of the generic ARM interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add arm_mode_name()David Brownell2009-11-179-30/+75
| | | | | | | | | | | | | | | Add and use arm_mode_name() to map from PSR bits to user meaningful names. It uses a new table which, later, can be used to hold other mode-coupled data. Add definitions for the "Secure Monitor" mode, as seen on some ARM11 cores (like ARM1176) and on Cortex-A8. The previous mode name scheme didn't understand that mode. Remove the old mechanism ... there were two copies, caused by Cortex-A8 needing to add "Secure Monitor" mode support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: only use one set of dummy FPA registersDavid Brownell2009-11-179-107/+39
| | | | | | | | | | | | | | | | All ARM cores need to provide obsolete FPA registers in their GDB register dumps. (Even though cores with floating point support now generally use some version of VFP...) Clean up that support a bit by sharing the same dummy registers, and removing the duplicate copies. Eventually we shouldn't need to export those dummies. (This makes the ARMv7-M support include the armv4_5 header, and cleans up related #includes, but doesn't yet use anything from there except those dummies.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove unused variable from run_commandZachary T Welch2009-11-171-3/+2
|
* add CMD_NAME variable in command_invocationZachary T Welch2009-11-172-8/+9
| | | | | Update CMD_NAME from its migratory home in CMD_ARGV[-1] to cmd->name. Allows CMD_ARGV++ idiom to be used safely in command handlers.
* add struct command_invocation for COMMAND_HANDLERZachary T Welch2009-11-172-9/+21
| | | | | | | | | | Adds the command_invocation structure to encapsulate parameters for all COMMAND_HANDLER routines. Rather than passing several arguments to each successive subroutine, a single pointer may be passed around. Changes the CMD_* macros to reference the new fields. Updates run_command to create an instance and pass it to the handler.
* command_handler: change 'cmd_ctx' to CMD_CTXZachary T Welch2009-11-1751-620/+623
| | | | Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
* command_handler: change 'args' to CMD_ARGVZachary T Welch2009-11-1763-521/+521
| | | | | This patch converts all instances of 'args' in COMMAND_HANDLER routines to use CMD_ARGV macro.
* command_handler: change to 'argc' to CMD_ARGCZachary T Welch2009-11-1764-311/+311
| | | | | This patch converts all instances of 'argc' in COMMAND_HANDLER routines to use CMD_ARGC.
* add more command_handler conversion macrosZachary T Welch2009-11-171-1/+16
| | | | | | | | | Add additional macros to allow command handling to be migrated easily: CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV. In addition to making the remaining patches of this series cleaner, this introduces easily sed-able symbols that could allow us to retire these once the command handler infrastructure matures (i.e. pre-1.0).
* target: simplify register get/set opsDavid Brownell2009-11-1714-136/+62
| | | | | | | | | | | No need to indirect from registered integers to pointers. Just stash the pointers directly in the register struct, and don't even bother registering. This is a small code shrink, speeds register access just a smidgeon, and gets rid of another rude exit() path. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* jtag_registers: Avalon bridge flushing tweaksØyvind Harboe2009-11-171-1/+12
| | | | | | | | | | The code is now much more explicit. It flushes every N writes. For now flush every time, but tinkering with the bridge FIFO size and how often we flush clearly points in the direction of the Avalon write FIFO full being the culprit. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: revC UART forwardingØyvind Harboe2009-11-171-4/+12
| | | | | | Name of serial device differs between revB/C. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: add version command to print FPGA version and timestampsØyvind Harboe2009-11-171-2/+29
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: fix bug when running on non-arm CPUØyvind Harboe2009-11-171-1/+8
| | | | | | | Shifting by more than 32 is undefined for 32 bit integers according to the C standard. Robust solution is conditional code. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: fix trivial syntax error introduced by latest refactoringsØyvind Harboe2009-11-171-5/+5
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM9TDMI: remove now-needless "struct arm9tdmi"David Brownell2009-11-179-72/+45
| | | | | | | And move the rest of the vector_catch stuff into the C file; it's not part of the module interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM7TDMI: remove now-needless "struct arm7tdmi"David Brownell2009-11-174-29/+21
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: remove some more duplicate includesDavid Brownell2009-11-174-4/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7-A: no exit() callsDavid Brownell2009-11-162-4/+3
| | | | | | | Also, switch integrity check over to the correct magic number, and remove duplicate v4/v5 #define. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: no exit() calls, add missing v7-A initDavid Brownell2009-11-161-31/+16
| | | | | | | Eventually there should be a v7a init routine, but for now all that is inlined here. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XScale: fewere exit() callsDavid Brownell2009-11-161-4/+4
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* MIPS: no exit() callsDavid Brownell2009-11-162-7/+5
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7-M: no exit() callsDavid Brownell2009-11-161-4/+4
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv4/ARMv5: no exit() callsDavid Brownell2009-11-161-6/+8
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: fewer exit() callsDavid Brownell2009-11-161-4/+6
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: don't exit()David Brownell2009-11-161-24/+10
| | | | | | | Get rid of undesirable and needless exit() calls from the Cortex-M3 support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7A: use standard disassemblerDavid Brownell2009-11-161-83/+0
| | | | | | We no longer need v7A-specific code for this. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: register (most) standard ARM commandsDavid Brownell2009-11-162-1/+10
| | | | | | | Have ARM11 register the "standard" ARM commands. For now, only disassembly really works. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: "armv4_5" command prefix becomes "arm"David Brownell2009-11-162-9/+18
| | | | | | | | | | Rename the "armv4_5" command prefix to straight "arm" so it makes more sense for newer cores. Add a simple compatibility script. Make sure all the commands give the same "not an ARM" diagnostic message (and fail properly) when called against non-ARM targets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* JTAG: fix autoprobe failure.David Brownell2009-11-161-2/+10
| | | | | | | Fix bug noted by Øyvind: terminate the IR length autoscan when the IR is too long, or otherwise broken. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fileio: improve API typesZachary T Welch2009-11-1612-64/+66
| | | | | | | | | | | | | Use size_t instead of uint32_t when specifying file sizes. Update all consumers up through the layers to use size_t when required. These changes should be safe, but the higher-levels will need to be updated further to receive the intended benefits (i.e. large file support). Add error checking for fileio_read and file_write. Previously, all errors were being silently ignored, so this change might cause some problems for some people in some cases. However, it gives us the chance to handle any errors that do occur at higher-levels, rather than burying our heads in the sand.
* struct fileio: improve member typesZachary T Welch2009-11-166-7/+7
| | | | | | Add const keyword to file url and cast to free(). Make size an ssize_t and chase all format strings that use it.
* helper/log: improve API parameter typesZachary T Welch2009-11-162-19/+16
| | | | | | | Uses unsigned type to pass line numbers. Use uint64_t to pass sleep routines their milliseconds. Updates sleep routines to use this type and improve whitespace.
generated by cgit v1.2.3 (git 2.46.0) at 2024-12-25 17:15:52 +0000