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* create tcl/board/dm365evm.cfgDavid Brownell2009-12-271-0/+147
| | | | | | | | | | | | | | | | This config is only lightly tested, and doesn't work well yet; but it's a start. * Notably missing is PLL configuration, since each DaVinci does that just a bit differently; and thus DDR2 setup. * The SRST workaround needed for the goof in the CPLD's VHDL depends on at least the not-yet-merged patch letting ARM9 (and ARM7) chips perform resets that don't use SRST. So this isn't yet suitable for debugging U-Boot. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Olimex SAM9-L9260 board configuration update.Dean Glazeski2009-12-261-0/+52
| | | | | | | | This updates the board configuration for the SAM9-L9260 board with the configuration for the on-board NAND and dataflash. Included are commands for configuring the AT91SAM9 NAND flash driver. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* more tcl/{board,target} cleanupDavid Brownell2009-12-157-16/+41
| | | | | | | | | | | | | | Remove more remnants of the old "jtag_device" syntax. Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity. Remove various non-supported "-variant" target options; they're not needed often at all. Flag some of the board files as needing to have and use target files for the TAP and target declarations. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* lm3748: use new Stellaris config fileDavid Brownell2009-12-141-4/+1
| | | | | | Use the new file, and remove the old target/lm3s3748.cfg one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Tcl and doc: update to match new 'arm mcr ...' etcDavid Brownell2009-12-014-6/+6
| | | | | | Make them match the C code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: at91eb40a.cfg is a board, not a target.Øyvind Harboe2009-12-011-0/+65
| | | | | | | Also updated to use target name when creating flash and set jtag_khz to 16000. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm926ejs: fix gaffe when converting from arm926ejs cp15 to mcrØyvind Harboe2009-11-233-3/+3
| | | | | | the first arg is the register number 15 = cp15. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm926ejs: retire cp15 commands, handled by mrc/mcr.Øyvind Harboe2009-11-233-3/+3
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* update 'nand device' usage in scriptsZachary T Welch2009-11-193-4/+8
| | | | Add $_FLASHNAME variable to update 'nand device' command syntax.
* update 'flash bank' usage in scriptsZachary T Welch2009-11-1918-23/+46
| | | | | Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the first argument to 'flash bank'.
* ARM: "armv4_5" command prefix becomes "arm"David Brownell2009-11-161-1/+1
| | | | | | | | | | Rename the "armv4_5" command prefix to straight "arm" so it makes more sense for newer cores. Add a simple compatibility script. Make sure all the commands give the same "not an ARM" diagnostic message (and fail properly) when called against non-ARM targets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target.cfg: (re)move some bogus reset_config linesDavid Brownell2009-11-101-0/+3
| | | | | | | General rule, this is all board-specific and doesn't belong in target config files. Some of these were just cosmetic. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: remove old mrc/mcr commandsØyvind Harboe2009-11-101-3/+3
| | | | | | Switch to new commands in config scripts Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* telo.cfg: fix search pathsØyvind Harboe2009-11-101-4/+4
| | | | | | | Add the missing "target/" prefix for scripts in the target folder. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* finish removing deprecated/obsolete commandsDavid Brownell2009-11-092-2/+2
| | | | | | | | | | | | | | | | | | | | It's been about a year since these were deprecated and, in most cases, removed. There's no point in carrying that documentation, or backwards compatibility for "jtag_device" and "jtag_speed", around forever. (Or a few remnants of obsolete code...) Removed a few obsolete uses of "jtag_speed": - The Calao stuff hasn't worked since July 2008. (Those Atmel targets need to work with a 32KHz core clock after reset until board-specific init-reset code sets up the PLL and enables a faster JTAg clock.) - Parport speed controls don't actually work (tops out at about 1 MHz on typical HW). - In general, speed controls need to live in board.cfg files (or sometimes target.cfg files), not interface.cfg ... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target.cfg: remove "-work-area-virt 0"David Brownell2009-11-088-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The semantics of "-work-area-virt 0" (or phys) changed with the patch to require specifying physical or virtrual work area addresses. Specifying zero was previously a NOP. Now it means that address zero is valid. This patch addresses three related issues: - MMU-less processors should never specify work-area-virt; remove those specifications. Such processors include ARM7TDMI, Cortex-M3, and ARM966. - MMU-equipped processors *can* specify work-area-virt... but zero won't be appropriate, except in mischievous contexts (which hide null pointer exceptions). Remove those specs from those processors too. If any of those mappings is valid, someone will need to submit a patch adding it ... along with a comment saying what OS provides the mapping, and in which context. Example, say "works with Linux 2.6.30+, in kernel mode". (Note that ARM Linux doesn't map kernel memory to zero ...) - Clarify docs on that "-virt" and other work area stuff. Seems to me work-area-virt is quite problematic; not every operating system provides such static mappings; if they do, they're not in every MMU context... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* PXA255: support Intel "Lubbock" platformDavid Brownell2009-11-041-0/+110
| | | | | | | | | | | | | | | | | | Config for Intel's "Lubbock" PXA255 development board. Even more so than the PXA255 itself, this is obsolete. AFAIK this was the first generally available development platform for PXA255. Intel stopped providing these after other devel boards became available. One interesting thing about this board from the OpenOCD perspective is probably its flash configuration. Each bank is 32 bits wide, built from two 16-bit StrataFlash chips wired in parallel. This doubles throughput ... it reads/writes 32 bits in the time a single chip takes to write just 16 bits. This conf mostly works, given XScale bugfixes, but has some issues (notably: no access to the on-board SDRAM) flagged by FIXMEs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* balloon3 board base configWookey2009-10-261-0/+13
| | | | | | | | | | | This is the very basic board config for the balloon3 board cpu JTAG channel. The rest of the config comprises another 14 .cfg files which I suspect openocd doesn't really want all of. I'm still not sure how to deal with this. I'll post another mail/patch to discuss. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix syntax of mww phys.Øyvind Harboe2009-10-254-33/+33
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* mww_phys retired. Replaced by generic mww phys in target.cØyvind Harboe2009-10-214-33/+33
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* SDRAM and clock configuration for the SAM9-L9260 board from OlimexDean Glazeski2009-10-181-6/+85
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* Fw: [PATCH] OpenRD board configurationWookey2009-10-141-0/+122
| | | | | | | | | | | | | | | | | Ofrwarded from Ron, who's not subscribed. ----- Forwarded message from Ron <ron@debian.org> ----- From: Ron <ron@debian.org> Date: Wed, 14 Oct 2009 04:50:17 +1030 To: wookey@debian.org Subject: [PATCH] OpenRD board configuration X-Spam-Status: No, score=-3.6 required=4.5 tests=BAYES_00,RCVD_IN_DNSWL_LOW autolearn=ham version=3.2.5 This piggybacks on the 'sheevaplug' layout which uses the same Kirkwood SoC. Signed-off-by: Ron Lee <ron@debian.org>
* iMX target config script's ported from Freescale BSP.Øyvind Harboe2009-10-142-65/+27
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* burst writes work fine. clean up junk.Øyvind Harboe2009-10-121-3/+0
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* Added tip in documentation on how to translate quirky syntaxØyvind Harboe2009-10-091-0/+3
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* Function to flash SheevaPlug u-boot sectorsRabeeh Khoury2009-10-081-0/+11
| | | | | This function is used by the SheevaPlug installer to flash the erase and re-flash the U-Boot environment in the NAND Flash.
* initial builds of OSK5912 boards need srst_pulls_trstDavid Brownell2009-10-081-0/+4
| | | | | | | | | | | | This is clearly noted in the hardware spec (section 5.2.3); it works around a chip erratum: "If the MPU_RESET signal is used, it may cause the EMIFS bus to lock." I seem to have a board with such an initial build. The chip is labeled XOMAP. Presumably, parts without that "X" prefix (eXperimental) resolve this. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* first stab at imx35 reset init scriptoharboe2009-10-071-0/+272
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2817 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* remove recrusive reset invocation from reset init callbackoharboe2009-10-071-5/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2816 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Add basic support for DM6446 EVM board.dbrownell2009-10-061-0/+74
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2808 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* stop using targetnumoharboe2009-10-061-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2804 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying EOL whitespace (again, sigh).dbrownell2009-09-303-7/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2781 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* strip gdb config optionsoharboe2009-09-301-4/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2779 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* michal smulski <michal.smulski@ooma.com> reset now worksoharboe2009-09-301-17/+23
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* On DM355 EVM board, associate NAND chips with $_TARGETNAMEdbrownell2009-09-261-2/+2
| | | | | | | instead of a target number. git-svn-id: svn://svn.berlios.de/openocd/trunk@2761 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Michael Hasselberg <mh@open-engineering.de> target configuration files for ↵oharboe2009-09-252-0/+243
| | | | | | Toshiba TX09 familiy git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from tcl/* filesdbrownell2009-09-2121-194/+194
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Ethan Eade <ethan@evolution.com> board config script for Cogent CSB732 ↵oharboe2009-09-211-0/+71
| | | | | | i.MX35 (arm1136) git-svn-id: svn://svn.berlios.de/openocd/trunk@2741 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family ↵oharboe2009-09-161-0/+105
| | | | | | (ARM968E). git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-121-3/+84
| | | | | | | | | | | | | | Update the board config for the DaVinci DM355 EVM so the reset-init event handler does the rest of the work it should do: - minor PLL setup bugfixes - initialize the DDR2 controller - probe both NAND banks - initialize UART0 - enable the icache git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* michal smulski <michal.smulski@ooma.com> telo target/board scriptsoharboe2009-09-101-0/+54
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2683 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Dirk Behme <dirk.behme@googlemail.com> Add default fall back freqency.oharboe2009-09-041-0/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2670 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Gary Carlson <gcarlson@carlson-minot.com> config fileoharboe2009-08-311-0/+204
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2657 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Ferdinand Postema <ferdinand@postema.eu> config script for the MMnet1001 ↵oharboe2009-08-311-0/+83
| | | | | | module from Propox. git-svn-id: svn://svn.berlios.de/openocd/trunk@2656 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> The Stellaris eval boards don't have ↵oharboe2009-08-284-6/+0
| | | | | | | | | | | TRST signals, so defining ntrst_delay is pointless; don't. At least the LM3S3748 eval board doesn't need nsrst_delay either; remove that too. git-svn-id: svn://svn.berlios.de/openocd/trunk@2645 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Brian Findlay <findlaybrian@gmail.com> finalize mini2440.cfgoharboe2009-08-251-3/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2611 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Pieter Conradie <Pieter.Conradie@psitek.com> shuffle things around to the ↵oharboe2009-08-213-181/+0
| | | | | | right spots. Should have been done in previous commit. git-svn-id: svn://svn.berlios.de/openocd/trunk@2604 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* native line endingsoharboe2009-08-215-284/+284
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2603 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Pieter Conradie <Pieter.Conradie@psitek.com> Scripts for Atmel AT91SAM7S256 ↵oharboe2009-08-215-0/+284
| | | | | | and AT91SAM9260 git-svn-id: svn://svn.berlios.de/openocd/trunk@2602 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Brian Findlay <findlaybrian@gmail.com> Board support for mini2440 ↵oharboe2009-08-181-0/+321
| | | | | | (friendlyARM) samsung s3c2440 based board git-svn-id: svn://svn.berlios.de/openocd/trunk@2593 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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