From 5dae4753ff9a6ca87104ef09aa128e1425826049 Mon Sep 17 00:00:00 2001 From: oharboe Date: Tue, 8 Sep 2009 06:18:45 +0000 Subject: David Brownell Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- doc/openocd.texi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'doc/openocd.texi') diff --git a/doc/openocd.texi b/doc/openocd.texi index 2406ed55..183ec2de 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5105,6 +5105,23 @@ Displays the number of extra tck for mem-ap memory bus access [0-255]. If @var{value} is defined, first assigns that. @end deffn +@subsection ARMv7-A specific commands +@cindex ARMv7-A + +@deffn Command {armv7a disassemble} address [count [@option{thumb}]] +@cindex disassemble +Disassembles @var{count} instructions starting at @var{address}. +If @var{count} is not specified, a single instruction is disassembled. +If @option{thumb} is specified, or the low bit of the address is set, +Thumb2 (mixed 16/32-bit) instructions are used; +else ARM (32-bit) instructions are used. +With a handful of exceptions, ThumbEE instructions are the same as Thumb2; +ThumbEE disassembly currently has no explicit support. +(Processors may also support the Jazelle state, but +those instructions are not currently understood by OpenOCD.) +@end deffn + + @subsection Cortex-M3 specific commands @cindex Cortex-M3 -- cgit v1.2.3