From 86a7d813a165fda2816b8152342219b6c4ae2fc4 Mon Sep 17 00:00:00 2001 From: dbrownell Date: Mon, 21 Sep 2009 18:40:55 +0000 Subject: Remove annoying end-of-line whitespace from most src/* files; omitted src/httpd git-svn-id: svn://svn.berlios.de/openocd/trunk@2742 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/flash/ocl/at91sam7x/at91sam7x_ram.ld | 46 ++++++++-------- src/flash/ocl/at91sam7x/crt.s | 92 ++++++++++++++++---------------- src/flash/ocl/at91sam7x/makefile | 16 +++--- 3 files changed, 77 insertions(+), 77 deletions(-) (limited to 'src/flash/ocl') diff --git a/src/flash/ocl/at91sam7x/at91sam7x_ram.ld b/src/flash/ocl/at91sam7x/at91sam7x_ram.ld index 24c5c2b5..ea06931d 100644 --- a/src/flash/ocl/at91sam7x/at91sam7x_ram.ld +++ b/src/flash/ocl/at91sam7x/at91sam7x_ram.ld @@ -1,30 +1,30 @@ /**************************************************************************** * Copyright (c) 2006 by Michael Fischer. All rights reserved. * -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions * are met: -* -* 1. Redistributions of source code must retain the above copyright +* +* 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in the +* notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. -* 3. Neither the name of the author nor the names of its contributors may -* be used to endorse or promote products derived from this software +* 3. Neither the name of the author nor the names of its contributors may +* be used to endorse or promote products derived from this software * without specific prior written permission. * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF -* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * **************************************************************************** @@ -94,11 +94,11 @@ SECTIONS *(COMMON) . = ALIGN(4); PROVIDE (__bss_end = .); - + . = ALIGN(256); - + PROVIDE (__stack_start = .); - + PROVIDE (__stack_fiq_start = .); . += FIQ_STACK_SIZE; . = ALIGN(4); @@ -124,9 +124,9 @@ SECTIONS . = ALIGN(4); PROVIDE (__stack_svc_end = .); PROVIDE (__stack_end = .); - PROVIDE (__heap_start = .); + PROVIDE (__heap_start = .); } > ram - + } /*** EOF ***/ diff --git a/src/flash/ocl/at91sam7x/crt.s b/src/flash/ocl/at91sam7x/crt.s index b0bae0d6..2e434bbe 100644 --- a/src/flash/ocl/at91sam7x/crt.s +++ b/src/flash/ocl/at91sam7x/crt.s @@ -1,30 +1,30 @@ /**************************************************************************** * Copyright (c) 2006 by Michael Fischer. All rights reserved. * -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions * are met: -* -* 1. Redistributions of source code must retain the above copyright +* +* 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in the +* notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. -* 3. Neither the name of the author nor the names of its contributors may -* be used to endorse or promote products derived from this software +* 3. Neither the name of the author nor the names of its contributors may +* be used to endorse or promote products derived from this software * without specific prior written permission. * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF -* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * **************************************************************************** @@ -33,14 +33,14 @@ * * 18.12.06 mifi First Version * The hardware initialization is based on the startup file -* crtat91sam7x256_rom.S from NutOS 4.2.1. +* crtat91sam7x256_rom.S from NutOS 4.2.1. * Therefore partial copyright by egnite Software GmbH. ****************************************************************************/ /* * Some defines for the program status registers */ - ARM_MODE_USER = 0x10 /* Normal User Mode */ + ARM_MODE_USER = 0x10 /* Normal User Mode */ ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */ ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */ ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */ @@ -48,10 +48,10 @@ ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */ ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */ ARM_MODE_MASK = 0x1F - + I_BIT = 0x80 /* disable IRQ when I bit is set */ F_BIT = 0x40 /* disable IRQ when I bit is set */ - + /* * Register Base Address */ @@ -70,10 +70,10 @@ MC_BASE = 0xFFFFFF00 MC_FMR_OFF = 0x00000060 MC_FWS_1FWS = 0x00480100 - + .section .vectors,"ax" .code 32 - + /****************************************************************************/ /* Vector table and reset entry */ /****************************************************************************/ @@ -101,7 +101,7 @@ FIQAddr: .word FIQHandler .section .init, "ax" .code 32 - + .global ResetHandler .global ExitFunction .extern main @@ -116,7 +116,7 @@ ResetHandler: ldr r0, =WDT_WDDIS str r0, [r1, #WDT_MR_OFF] - + /* * Enable user reset: assertion length programmed to 1ms */ @@ -124,7 +124,7 @@ ResetHandler: ldr r1, =RSTC_MR str r0, [r1, #0] - + /* * Use 2 cycles for flash access. */ @@ -141,22 +141,22 @@ ResetHandler: str r0, [r1, #AIC_EOICR_OFF] str r0, [r1, #AIC_IDCR_OFF] - + /* * Setup a stack for each mode - */ - msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */ + */ + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */ ldr sp, =__stack_und_end - + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */ ldr sp, =__stack_abt_end - - msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */ + + msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */ ldr sp, =__stack_fiq_end - - msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */ + + msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */ ldr sp, =__stack_irq_end - + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */ ldr sp, =__stack_svc_end @@ -171,27 +171,27 @@ bss_clear_loop: cmp r1, r2 strne r3, [r1], #+4 bne bss_clear_loop - - + + /* * Jump to main */ mrs r0, cpsr bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */ msr cpsr, r0 - + mov r0, #0 /* No arguments */ mov r1, #0 /* No arguments */ ldr r2, =main mov lr, pc bx r2 /* And jump... */ - + ExitFunction: nop nop nop - b ExitFunction - + b ExitFunction + /****************************************************************************/ /* Default interrupt handler */ @@ -199,7 +199,7 @@ ExitFunction: UndefHandler: b UndefHandler - + SWIHandler: b SWIHandler @@ -208,13 +208,13 @@ PAbortHandler: DAbortHandler: b DAbortHandler - + IRQHandler: b IRQHandler - + FIQHandler: b FIQHandler - + .weak ExitFunction .weak UndefHandler, PAbortHandler, DAbortHandler .weak IRQHandler, FIQHandler diff --git a/src/flash/ocl/at91sam7x/makefile b/src/flash/ocl/at91sam7x/makefile index d9944a42..c3eaf126 100644 --- a/src/flash/ocl/at91sam7x/makefile +++ b/src/flash/ocl/at91sam7x/makefile @@ -13,19 +13,19 @@ OBJDUMP = $(TRGT)objdump MCU = arm7tdmi # List all default C defines here, like -D_DEBUG=1 -DDEFS = +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 -DADEFS = +DADEFS = # List all default directories to look for include files here -DINCDIR = +DINCDIR = # List the default directory to look for the libraries here DLIBDIR = # List all default libraries here -DLIBS = +DLIBS = # # End of default section @@ -42,10 +42,10 @@ PROJECT = at91sam7x_ocl LDSCRIPT= at91sam7x_ram.ld # List all user C define here, like -D_DEBUG=1 -UDEFS = +UDEFS = # Define ASM defines here -UADEFS = +UADEFS = # List C source files here SRC = main.c dcc.c samflash.c @@ -60,7 +60,7 @@ UINCDIR = ULIBDIR = # List all user libraries here -ULIBS = +ULIBS = # Define optimisation level here OPT = -O2 @@ -122,7 +122,7 @@ clean: -rm -f $(ASRC:.s=.lst) -rm -fR .dep -# +# # Include the dependency files, should be the last of the makefile # #-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) -- cgit v1.2.3