From a5354ff5cb76cc2a6ebd809474cd69951336c50d Mon Sep 17 00:00:00 2001 From: oharboe Date: Wed, 26 Aug 2009 06:26:29 +0000 Subject: David Brownell Clock updates/fixes for the Stellaris flash driver: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Bugfixes: * internal osc: it's *12* MHz (not 15 MHz) on _current_ chips + except new Tempest parts where it's 16 MHz (and calibrated!) + or some old Sandstorm ones, where 15 MHz was valid * crystal config: + read and use the crystal config, don't assume 6 MHz + know when that field is 4 bits vs 5 * an RCC2 register may be overriding the original RCC + more clock source options + bigger dividers + fractional dividers on Tempest (NYET handled) * there's a 30 KHz osc on newer chips (for deep sleep) * there's a 32768 Hz osc on newer chips (for hibernation) - Cosmetic * say "rev A0" not "vA.0", to match vendor docs * don't always report master clock as an "estimate": + give the error bound if it's approximate, like "±30%" + else don't say anything * fix whitespace and caps in some messages * these are not AT91SAM chips!! Those clock issues might explain problems sometimes reported when writing to Stellaris flash banks; they affect write timings. That 12-vs-15 MHz issue is problematic; there's no consolidated doc showing which chips (and revs!) have which internal oscillator speed. It's clear that only older silicon had the faster-and-less-accurate flavor. What's less clear is which chips are "old" like that. Lightly tested, on a DustDevil part. git-svn-id: svn://svn.berlios.de/openocd/trunk@2626 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/flash/stellaris.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/flash/stellaris.h') diff --git a/src/flash/stellaris.h b/src/flash/stellaris.h index bf07c70e..eaf3d481 100644 --- a/src/flash/stellaris.h +++ b/src/flash/stellaris.h @@ -45,8 +45,13 @@ typedef struct stellaris_flash_bank_s /* main clock status */ uint32_t rcc; + uint32_t rcc2; uint8_t mck_valid; + uint8_t xtal_mask; + uint32_t iosc_freq; uint32_t mck_freq; + const char *iosc_desc; + const char *mck_desc; } stellaris_flash_bank_t; /* STELLARIS control registers */ @@ -62,6 +67,7 @@ typedef struct stellaris_flash_bank_s #define RIS 0x050 #define RCC 0x060 #define PLLCFG 0x064 +#define RCC2 0x070 #define FMPRE 0x130 #define FMPPE 0x134 -- cgit v1.2.3