From 128a73342856217e98a5da64b2805e062fd4e00d Mon Sep 17 00:00:00 2001 From: zwelch Date: Tue, 23 Jun 2009 22:39:47 +0000 Subject: - Fixes '&&' whitespace - Replace ')\(&&\)(' with ') \1 ('. - Replace '\(\w\)\(&&\)(' with '\1 \2 ('. - Replace '\(\w\)\(&&\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2366 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm7_9_common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/target/arm7_9_common.c') diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 474f9467..79b1bc74 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -1022,7 +1022,7 @@ int arm7_9_assert_reset(target_t *target) armv4_5_invalidate_core_regs(target); - if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)) + if ((target->reset_halt) && ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)) { /* debug entry was already prepared in arm7_9_assert_reset() */ target->debug_reason = DBG_REASON_DBGRQ; @@ -1050,7 +1050,7 @@ int arm7_9_deassert_reset(target_t *target) jtag_add_reset(0, 0); enum reset_types jtag_reset_config = jtag_get_reset_config(); - if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST) != 0) + if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST) != 0) { LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset."); /* set up embedded ice registers again */ -- cgit v1.2.3