From 9af5e445b796f3b4a51d41f9d2eeaf1f5cd78e3b Mon Sep 17 00:00:00 2001 From: zwelch Date: Tue, 23 Jun 2009 22:36:56 +0000 Subject: - Replace 'switch(' with 'switch ('. git-svn-id: svn://svn.berlios.de/openocd/trunk@2359 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm_disassembler.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/target/arm_disassembler.c') diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index bdd8a603..9396ee0c 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1332,7 +1332,7 @@ int evaluate_b_bl_blx_thumb(uint16_t opcode, uint32_t address, arm_instruction_t target_address = address + 4 + (offset<<1); - switch(opc) + switch (opc) { /* unconditional branch */ case 0: @@ -1416,7 +1416,7 @@ int evaluate_shift_imm_thumb(uint16_t opcode, uint32_t address, arm_instruction_ uint8_t opc = (opcode >> 11) & 0x3; char *mnemonic = NULL; - switch(opc) + switch (opc) { case 0: instruction->type = ARM_MOV; @@ -1465,7 +1465,7 @@ int evaluate_data_proc_imm_thumb(uint16_t opcode, uint32_t address, arm_instruct instruction->info.data_proc.variant = 0; /*immediate*/ instruction->info.data_proc.shifter_operand.immediate.immediate = imm; - switch(opc) + switch (opc) { case 0: instruction->type = ARM_MOV; @@ -1679,7 +1679,7 @@ int evaluate_load_store_reg_thumb(uint16_t opcode, uint32_t address, arm_instruc uint8_t opc = (opcode >> 9) & 0x7; char *mnemonic = NULL; - switch(opc) + switch (opc) { case 0: instruction->type = ARM_STR; -- cgit v1.2.3