From 0535531d2753f1b86454bb6ffad6ffbdd56c66d0 Mon Sep 17 00:00:00 2001
From: Eric Wetzel <thewetzel@gmail.com>
Date: Wed, 5 Jan 2011 21:54:12 -0500
Subject: nit: more LOG_* \n fixes

Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages

Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end

Change LOG_USER_N calls that end with \n to LOG_USER
---
 src/target/arm946e.c      | 20 ++++++++++----------
 src/target/mips32_pracc.c |  2 +-
 src/target/oocd_trace.c   |  6 +++---
 3 files changed, 14 insertions(+), 14 deletions(-)

(limited to 'src/target')

diff --git a/src/target/arm946e.c b/src/target/arm946e.c
index b9b9cef7..ea9226ef 100644
--- a/src/target/arm946e.c
+++ b/src/target/arm946e.c
@@ -246,7 +246,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
 			retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
 			if (retval != ERROR_OK)
 			{
-				LOG_DEBUG("ERROR writing index\n");
+				LOG_DEBUG("ERROR writing index");
 				return retval;
 			}
 
@@ -261,7 +261,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
 			retval = arm946e_write_cp15(target, 0x35, 0x1);
 			if (retval != ERROR_OK)
 			{
-				LOG_DEBUG("ERROR cleaning cache line\n");
+				LOG_DEBUG("ERROR cleaning cache line");
 				return retval;
 			}
 
@@ -269,7 +269,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
 			retval = arm946e_write_cp15(target, 0x1a, 0x1);
 			if (retval != ERROR_OK)
 			{
-				LOG_DEBUG("ERROR flushing cache line\n");
+				LOG_DEBUG("ERROR flushing cache line");
 				return retval;
 			}
 		}
@@ -291,7 +291,7 @@ uint32_t arm946e_invalidate_whole_icache(struct target *target)
 	retval = arm946e_write_cp15(target, 0x0f, 0x1);
 	if (retval != ERROR_OK)
 	{
-		LOG_DEBUG("ERROR flushing I$\n");
+		LOG_DEBUG("ERROR flushing I$");
 		return retval;
 	}
 
@@ -371,7 +371,7 @@ void arm946e_pre_restore_context(struct target *target)
 		retval = arm946e_write_cp15(target, 0x02, ctr_reg);
 		if (retval != ERROR_OK)
 		{
-			LOG_DEBUG("ERROR enabling cache\n");
+			LOG_DEBUG("ERROR enabling cache");
 		}
 	} /* if preserve_cache */
 }
@@ -421,7 +421,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
 			retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
 			if (retval != ERROR_OK)
 			{
-				LOG_DEBUG("ERROR writing index\n");
+				LOG_DEBUG("ERROR writing index");
 				return retval;
 			}
 
@@ -439,7 +439,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
 				retval = arm946e_write_cp15(target, 0x35, 0x1);
 				if (retval != ERROR_OK)
 				{
-					LOG_DEBUG("ERROR cleaning cache line\n");
+					LOG_DEBUG("ERROR cleaning cache line");
 					return retval;
 				}
 
@@ -447,7 +447,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
 				retval = arm946e_write_cp15(target, 0x1c, 0x1);
 				if (retval != ERROR_OK)
 				{
-					LOG_DEBUG("ERROR flushing cache line\n");
+					LOG_DEBUG("ERROR flushing cache line");
 					return retval;
 				}
 
@@ -480,7 +480,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
 			retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
 			if (retval != ERROR_OK)
 			{
-				LOG_DEBUG("ERROR writing index\n");
+				LOG_DEBUG("ERROR writing index");
 				return retval;
 			}
 
@@ -498,7 +498,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
 				retval = arm946e_write_cp15(target, 0x1d, 0x0);
 				if (retval != ERROR_OK)
 				{
-					LOG_DEBUG("ERROR flushing cache line\n");
+					LOG_DEBUG("ERROR flushing cache line");
 					return retval;
 				}
 
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index a4ea2d36..9a9b4272 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -119,7 +119,7 @@ static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl)
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 		if (ejtag_ctrl & EJTAG_CTRL_PRACC)
 			break;
-		LOG_DEBUG("DEBUGMODULE: No memory access in progress!\n");
+		LOG_DEBUG("DEBUGMODULE: No memory access in progress!");
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
diff --git a/src/target/oocd_trace.c b/src/target/oocd_trace.c
index 3b435719..5af1ba65 100644
--- a/src/target/oocd_trace.c
+++ b/src/target/oocd_trace.c
@@ -46,7 +46,7 @@ static int oocd_trace_read_reg(struct oocd_trace *oocd_trace, int reg, uint32_t
 		bytes_to_read -= bytes_read;
 	}
 
-	LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, *value);
+	LOG_DEBUG("reg #%i: 0x%8.8x", reg, *value);
 
 	return ERROR_OK;
 }
@@ -63,7 +63,7 @@ static int oocd_trace_write_reg(struct oocd_trace *oocd_trace, int reg, uint32_t
 	data[4] = (value & 0xff000000) >> 24;
 
 	bytes_written = write(oocd_trace->tty_fd, data, 5);
-	LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, value);
+	LOG_DEBUG("reg #%i: 0x%8.8x", reg, value);
 
 	return ERROR_OK;
 }
@@ -136,7 +136,7 @@ static int oocd_trace_init(struct etm_context *etm_ctx)
 	 * read up any leftover characters to ensure communication is in sync */
 	while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0)
 	{
-		LOG_DEBUG("%zi bytes read\n", bytes_read);
+		LOG_DEBUG("%zi bytes read", bytes_read);
 	};
 
 	return ERROR_OK;
-- 
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