From 4d88c124b1262a738b4a9f107ef62404a45bf323 Mon Sep 17 00:00:00 2001 From: oharboe Date: Wed, 6 May 2009 06:20:52 +0000 Subject: retire out_mask - not used anywhere git-svn-id: svn://svn.berlios.de/openocd/trunk@1608 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm11_dbgtap.c | 1 - src/target/arm720t.c | 4 ++-- src/target/arm7tdmi.c | 12 ++++++------ src/target/arm920t.c | 24 ++++++++++++------------ src/target/arm926ejs.c | 16 ++++++++-------- src/target/arm966e.c | 12 ++++++------ src/target/arm9tdmi.c | 24 ++++++++++++------------ src/target/arm_adi_v5.c | 8 ++++---- src/target/arm_jtag.c | 2 +- src/target/avrt.c | 2 -- src/target/embeddedice.c | 24 ++++++++++++------------ src/target/etb.c | 22 +++++++++++----------- src/target/etm.c | 12 ++++++------ src/target/feroceon.c | 6 +++--- src/target/mips_ejtag.c | 8 ++++---- src/target/xscale.c | 40 ++++++++++++++++++++-------------------- 16 files changed, 107 insertions(+), 110 deletions(-) (limited to 'src/target') diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 2f474212..d897f108 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -87,7 +87,6 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo { field->tap = arm11->jtag_info.tap; field->num_bits = num_bits; - field->out_mask = NULL; field->in_check_mask = NULL; field->in_check_value = NULL; field->in_handler = NULL; diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 6cd73e45..60c4dec7 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -112,7 +112,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c fields[0].tap = jtag_info->tap; fields[0].num_bits = 1; fields[0].out_value = &instruction_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -122,7 +122,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = out_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; if (in) { diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index c2059498..b0d9e85e 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -111,7 +111,7 @@ int arm7tdmi_examine_debug_reason(target_t *target) fields[0].tap = arm7_9->jtag_info.tap; fields[0].num_bits = 1; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = &breakpoint; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -121,7 +121,7 @@ int arm7tdmi_examine_debug_reason(target_t *target) fields[1].tap = arm7_9->jtag_info.tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = databus; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -198,7 +198,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[0].tap = jtag_info->tap; fields[0].num_bits = 1; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -208,7 +208,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_handler = arm_jtag_buf_to_u32_flip; /* deprecated! invoke this from user code! */ fields[1].in_handler_priv = in; @@ -259,7 +259,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[0].tap = jtag_info->tap; fields[0].num_bits = 1; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -269,7 +269,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; switch (size) { diff --git a/src/target/arm920t.c b/src/target/arm920t.c index cc6ba0a3..f07cee8d 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -113,7 +113,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value) fields[0].tap = jtag_info->tap; fields[0].num_bits = 1; fields[0].out_value = &access_type_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -123,7 +123,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value) fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -133,7 +133,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value) fields[2].tap = jtag_info->tap; fields[2].num_bits = 6; fields[2].out_value = ®_addr_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -143,7 +143,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value) fields[3].tap = jtag_info->tap; fields[3].num_bits = 1; fields[3].out_value = &nr_w_buf; - fields[3].out_mask = NULL; + fields[3].in_value = NULL; fields[3].in_check_value = NULL; fields[3].in_check_mask = NULL; @@ -185,7 +185,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value) fields[0].tap = jtag_info->tap; fields[0].num_bits = 1; fields[0].out_value = &access_type_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -195,7 +195,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value) fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = value_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -205,7 +205,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value) fields[2].tap = jtag_info->tap; fields[2].num_bits = 6; fields[2].out_value = ®_addr_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -215,7 +215,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value) fields[3].tap = jtag_info->tap; fields[3].num_bits = 1; fields[3].out_value = &nr_w_buf; - fields[3].out_mask = NULL; + fields[3].in_value = NULL; fields[3].in_check_value = NULL; fields[3].in_check_mask = NULL; @@ -252,7 +252,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode) fields[0].tap = jtag_info->tap; fields[0].num_bits = 1; fields[0].out_value = &access_type_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -262,7 +262,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode) fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = cp15_opcode_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -272,7 +272,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode) fields[2].tap = jtag_info->tap; fields[2].num_bits = 6; fields[2].out_value = ®_addr_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -282,7 +282,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode) fields[3].tap = jtag_info->tap; fields[3].num_bits = 1; fields[3].out_value = &nr_w_buf; - fields[3].out_mask = NULL; + fields[3].in_value = NULL; fields[3].in_check_value = NULL; fields[3].in_check_mask = NULL; diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 8b81c0bf..fb0584b2 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -137,7 +137,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3 fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -147,7 +147,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3 fields[1].tap = jtag_info->tap; fields[1].num_bits = 1; fields[1].out_value = &access; - fields[1].out_mask = NULL; + fields[1].in_value = &access; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -157,7 +157,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3 fields[2].tap = jtag_info->tap; fields[2].num_bits = 14; fields[2].out_value = address_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -167,7 +167,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3 fields[3].tap = jtag_info->tap; fields[3].num_bits = 1; fields[3].out_value = &nr_w_buf; - fields[3].out_mask = NULL; + fields[3].in_value = NULL; fields[3].in_check_value = NULL; fields[3].in_check_mask = NULL; @@ -227,7 +227,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = value_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -237,7 +237,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u fields[1].tap = jtag_info->tap; fields[1].num_bits = 1; fields[1].out_value = &access; - fields[1].out_mask = NULL; + fields[1].in_value = &access; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -247,7 +247,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u fields[2].tap = jtag_info->tap; fields[2].num_bits = 14; fields[2].out_value = address_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -257,7 +257,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u fields[3].tap = jtag_info->tap; fields[3].num_bits = 1; fields[3].out_value = &nr_w_buf; - fields[3].out_mask = NULL; + fields[3].in_value = NULL; fields[3].in_check_value = NULL; fields[3].in_check_mask = NULL; diff --git a/src/target/arm966e.c b/src/target/arm966e.c index eee964d7..31211031 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -187,7 +187,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -197,7 +197,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value) fields[1].tap = jtag_info->tap; fields[1].num_bits = 6; fields[1].out_value = ®_addr_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -207,7 +207,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value) fields[2].tap = jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = &nr_w_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -255,7 +255,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = value_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -265,7 +265,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value) fields[1].tap = jtag_info->tap; fields[1].num_bits = 6; fields[1].out_value = ®_addr_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -275,7 +275,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value) fields[2].tap = jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = &nr_w_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 95358c43..7e30bc08 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -128,7 +128,7 @@ int arm9tdmi_examine_debug_reason(target_t *target) fields[0].tap = arm7_9->jtag_info.tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = databus; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -138,7 +138,7 @@ int arm9tdmi_examine_debug_reason(target_t *target) fields[1].tap = arm7_9->jtag_info.tap; fields[1].num_bits = 3; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = &debug_reason; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -148,7 +148,7 @@ int arm9tdmi_examine_debug_reason(target_t *target) fields[2].tap = arm7_9->jtag_info.tap; fields[2].num_bits = 32; fields[2].out_value = NULL; - fields[2].out_mask = NULL; + fields[2].in_value = instructionbus; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -216,7 +216,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = out_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; if (in) { @@ -234,7 +234,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = &sysspeed_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -244,7 +244,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = instr_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -291,7 +291,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_handler = arm_jtag_buf_to_u32; /* deprecated! invoke this from user code! */ fields[0].in_handler_priv = in; @@ -301,7 +301,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -311,7 +311,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = NULL; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -363,7 +363,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; switch (size) { @@ -384,7 +384,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -394,7 +394,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = NULL; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 0ce994c7..db6b60d8 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -76,7 +76,7 @@ int adi_jtag_dp_scan(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u8 *o fields[0].num_bits = 3; buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1)); fields[0].out_value = &out_addr_buf; - fields[0].out_mask = NULL; + fields[0].in_value = ack; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -86,7 +86,7 @@ int adi_jtag_dp_scan(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u8 *o fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = outvalue; - fields[1].out_mask = NULL; + fields[1].in_value = invalue; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -112,7 +112,7 @@ int adi_jtag_dp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u fields[0].num_bits = 3; buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1)); fields[0].out_value = &out_addr_buf; - fields[0].out_mask = NULL; + fields[0].in_value = ack; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -123,7 +123,7 @@ int adi_jtag_dp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u fields[1].num_bits = 32; buf_set_u32(out_value_buf, 0, 32, outvalue); fields[1].out_value = out_value_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; if (invalue) { diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c index cfb85a44..c1dcd6fa 100644 --- a/src/target/arm_jtag.c +++ b/src/target/arm_jtag.c @@ -52,7 +52,7 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, in_handler_t handl field.num_bits = tap->ir_length; field.out_value = t; buf_set_u32(field.out_value, 0, field.num_bits, new_instr); - field.out_mask = NULL; + field.in_value = NULL; field.in_check_value = NULL; field.in_check_mask = NULL; diff --git a/src/target/avrt.c b/src/target/avrt.c index 2697f511..86ada2b2 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -232,7 +232,6 @@ int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti) field[0].tap = tap; field[0].num_bits = tap->ir_length; field[0].out_value = ir_out; - field[0].out_mask = NULL; field[0].in_value = ir_in; field[0].in_check_value = NULL; field[0].in_check_mask = NULL; @@ -258,7 +257,6 @@ int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti) field[0].tap = tap; field[0].num_bits = dr_len; field[0].out_value = dr_out; - field[0].out_mask = NULL; field[0].in_value = dr_in; field[0].in_check_value = NULL; field[0].in_check_mask = NULL; diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index bd7fd3ae..c59a2ede 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -251,7 +251,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[0].tap = ice_reg->jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = reg->value; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -262,7 +262,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[1].num_bits = 5; fields[1].out_value = field1_out; buf_set_u32(fields[1].out_value, 0, 5, reg_addr); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -273,7 +273,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[2].num_bits = 1; fields[2].out_value = field2_out; buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -313,7 +313,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -324,7 +324,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size) fields[1].num_bits = 5; fields[1].out_value = field1_out; buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -335,7 +335,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size) fields[2].num_bits = 1; fields[2].out_value = field2_out; buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -430,7 +430,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = field0_out; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -441,7 +441,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size) fields[1].num_bits = 5; fields[1].out_value = field1_out; buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -452,7 +452,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size) fields[2].num_bits = 1; fields[2].out_value = field2_out; buf_set_u32(fields[2].out_value, 0, 1, 1); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -499,7 +499,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = field0_in; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -510,7 +510,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout) fields[1].num_bits = 5; fields[1].out_value = field1_out; buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -521,7 +521,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout) fields[2].num_bits = 1; fields[2].out_value = field2_out; buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; diff --git a/src/target/etb.c b/src/target/etb.c index 5af9b910..deecf141 100644 --- a/src/target/etb.c +++ b/src/target/etb.c @@ -70,7 +70,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr) field.num_bits = tap->ir_length; field.out_value = calloc(CEIL(field.num_bits, 8), 1); buf_set_u32(field.out_value, 0, field.num_bits, new_instr); - field.out_mask = NULL; + field.in_value = NULL; field.in_check_value = NULL; field.in_check_mask = NULL; @@ -95,7 +95,7 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain) field.num_bits = 5; field.out_value = calloc(CEIL(field.num_bits, 8), 1); buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain); - field.out_mask = NULL; + field.in_value = NULL; field.in_check_value = NULL; field.in_check_mask = NULL; @@ -186,7 +186,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) fields[0].tap = etb->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -197,7 +197,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, 4); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -208,7 +208,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -257,7 +257,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[0].tap = etb_reg->etb->tap; fields[0].num_bits = 32; fields[0].out_value = reg->value; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -268,7 +268,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -279,7 +279,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -354,7 +354,7 @@ int etb_write_reg(reg_t *reg, u32 value) fields[0].num_bits = 32; fields[0].out_value = malloc(4); buf_set_u32(fields[0].out_value, 0, 32, value); - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -365,7 +365,7 @@ int etb_write_reg(reg_t *reg, u32 value) fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -376,7 +376,7 @@ int etb_write_reg(reg_t *reg, u32 value) fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 1); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; diff --git a/src/target/etm.c b/src/target/etm.c index c60cc0d7..ab368781 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -339,7 +339,7 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[0].tap = etm_reg->jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = reg->value; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -350,7 +350,7 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -361,7 +361,7 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; @@ -431,7 +431,7 @@ int etm_write_reg(reg_t *reg, u32 value) fields[0].num_bits = 32; fields[0].out_value = malloc(4); buf_set_u32(fields[0].out_value, 0, 32, value); - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -442,7 +442,7 @@ int etm_write_reg(reg_t *reg, u32 value) fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -453,7 +453,7 @@ int etm_write_reg(reg_t *reg, u32 value) fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 1); - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; diff --git a/src/target/feroceon.c b/src/target/feroceon.c index 8ef74c1d..507bd695 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -135,7 +135,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr) fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = out_buf; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_handler = NULL; fields[0].in_handler_priv = NULL; @@ -145,7 +145,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr) fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = &sysspeed_buf; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -155,7 +155,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr) fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = instr_buf; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; fields[2].in_check_value = NULL; fields[2].in_check_mask = NULL; diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index df6fc23a..d1931c6f 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -49,7 +49,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t h field.num_bits = tap->ir_length; field.out_value = t; buf_set_u32(field.out_value, 0, field.num_bits, new_instr); - field.out_mask = NULL; + field.in_value = NULL; field.in_check_value = NULL; field.in_check_mask = NULL; @@ -72,7 +72,7 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t ha field.tap = ejtag_info->tap; field.num_bits = 32; field.out_value = NULL; - field.out_mask = NULL; + field.in_value = (void*)idcode; field.in_check_value = NULL; field.in_check_mask = NULL; @@ -99,7 +99,7 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t field.tap = ejtag_info->tap; field.num_bits = 32; field.out_value = NULL; - field.out_mask = NULL; + field.in_value = (void*)impcode; field.in_check_value = NULL; field.in_check_mask = NULL; @@ -130,7 +130,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data) field.num_bits = 32; field.out_value = t; buf_set_u32(field.out_value, 0, field.num_bits, *data); - field.out_mask = NULL; + field.in_value = (u8*)data; field.in_check_value = NULL; field.in_check_mask = NULL; diff --git a/src/target/xscale.c b/src/target/xscale.c index d270bf4f..3ec84373 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -225,7 +225,7 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr) field.num_bits = tap->ir_length; field.out_value = calloc(CEIL(field.num_bits, 8), 1); buf_set_u32(field.out_value, 0, field.num_bits, new_instr); - field.out_mask = NULL; + field.in_value = NULL; jtag_set_check_value(&field, tap->expected, tap->expected_mask, NULL); @@ -261,14 +261,14 @@ int xscale_read_dcsr(target_t *target) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 3; fields[0].out_value = &field0; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL); fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -278,7 +278,7 @@ int xscale_read_dcsr(target_t *target) fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = &field2; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); @@ -339,14 +339,14 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 3; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL); fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -356,7 +356,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = NULL; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); @@ -458,14 +458,14 @@ int xscale_read_tx(target_t *target, int consume) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 3; fields[0].out_value = NULL; - fields[0].out_mask = NULL; + fields[0].in_value = &field0_in; jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL); fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 32; fields[1].out_value = NULL; - fields[1].out_mask = NULL; + fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_TX].value; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -475,7 +475,7 @@ int xscale_read_tx(target_t *target, int consume) fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = NULL; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); @@ -554,14 +554,14 @@ int xscale_write_rx(target_t *target) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 3; fields[0].out_value = &field0_out; - fields[0].out_mask = NULL; + fields[0].in_value = &field0_in; jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL); fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 32; fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_RX].value; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -571,7 +571,7 @@ int xscale_write_rx(target_t *target) fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = &field2; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); @@ -729,14 +729,14 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 3; fields[0].out_value = &field0; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL); fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 32; fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; @@ -746,7 +746,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = &field2; - fields[2].out_mask = NULL; + fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); @@ -805,7 +805,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8]) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 6; fields[0].out_value = &cmd; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -815,7 +815,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8]) fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 27; fields[1].out_value = packet; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; @@ -863,7 +863,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va) fields[0].tap = xscale->jtag_info.tap; fields[0].num_bits = 6; fields[0].out_value = &cmd; - fields[0].out_mask = NULL; + fields[0].in_value = NULL; fields[0].in_check_value = NULL; fields[0].in_check_mask = NULL; @@ -873,7 +873,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va) fields[1].tap = xscale->jtag_info.tap; fields[1].num_bits = 27; fields[1].out_value = packet; - fields[1].out_mask = NULL; + fields[1].in_value = NULL; fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; -- cgit v1.2.3