From d0809ac060b35a04e7f0bceb96e1868663bd18df Mon Sep 17 00:00:00 2001 From: Zachary T Welch Date: Fri, 13 Nov 2009 03:28:03 -0800 Subject: scan_field_t -> struct scan_field Remove useless structure typedef. --- src/target/arm11.c | 8 ++++---- src/target/arm11_dbgtap.c | 32 ++++++++++++++++---------------- src/target/arm11_dbgtap.h | 6 +++--- src/target/arm720t.c | 2 +- src/target/arm7tdmi.c | 6 +++--- src/target/arm920t.c | 6 +++--- src/target/arm926ejs.c | 4 ++-- src/target/arm966e.c | 4 ++-- src/target/arm9tdmi.c | 8 ++++---- src/target/arm_adi_v5.c | 4 ++-- src/target/arm_jtag.c | 2 +- src/target/avrt.c | 4 ++-- src/target/embeddedice.c | 8 ++++---- src/target/etb.c | 10 +++++----- src/target/etm.c | 4 ++-- src/target/feroceon.c | 2 +- src/target/mips_ejtag.c | 8 ++++---- src/target/xscale.c | 16 ++++++++-------- 18 files changed, 67 insertions(+), 67 deletions(-) (limited to 'src/target') diff --git a/src/target/arm11.c b/src/target/arm11.c index 1dc1834b..23185488 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -360,7 +360,7 @@ static int arm11_on_enter_debug_state(arm11_common_t *arm11) arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); - scan_field_t chain5_fields[3]; + struct scan_field chain5_fields[3]; arm11_setup_field(arm11, 32, NULL, &R(WDTR), chain5_fields + 0); arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1); @@ -637,7 +637,7 @@ static int arm11_leave_debug_state(arm11_common_t *arm11) arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); - scan_field_t chain5_fields[3]; + struct scan_field chain5_fields[3]; uint8_t Ready = 0; /* ignored */ uint8_t Valid = 0; /* ignored */ @@ -1821,7 +1821,7 @@ static int arm11_examine(struct target_s *target) arm11_add_IR(arm11, ARM11_IDCODE, ARM11_TAP_DEFAULT); - scan_field_t idcode_field; + struct scan_field idcode_field; arm11_setup_field(arm11, 32, NULL, &arm11->device_id, &idcode_field); @@ -1833,7 +1833,7 @@ static int arm11_examine(struct target_s *target) arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); - scan_field_t chain0_fields[2]; + struct scan_field chain0_fields[2]; arm11_setup_field(arm11, 32, NULL, &arm11->didr, chain0_fields + 0); arm11_setup_field(arm11, 8, NULL, &arm11->implementor, chain0_fields + 1); diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 369576c5..6154f34d 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -47,7 +47,7 @@ static const tap_state_t arm11_move_pi_to_si_via_ci[] = }; -int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state) +int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state) { if (cmd_queue_cur_state == TAP_IRPAUSE) jtag_add_pathmove(asizeof(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci); @@ -61,7 +61,7 @@ static const tap_state_t arm11_move_pd_to_sd_via_cd[] = TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT }; -int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state) +int arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state) { if (cmd_queue_cur_state == TAP_DRPAUSE) jtag_add_pathmove(asizeof(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd); @@ -71,7 +71,7 @@ int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state } -/** Code de-clutter: Construct scan_field_t to write out a value +/** Code de-clutter: Construct struct scan_field to write out a value * * \param arm11 Target state variable. * \param num_bits Length of the data field @@ -81,7 +81,7 @@ int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state * (data is written when the JTAG queue is executed) * \param field target data structure that will be initialized */ -void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, void * in_data, scan_field_t * field) +void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, void * in_data, struct scan_field * field) { field->tap = arm11->target->tap; field->num_bits = num_bits; @@ -111,7 +111,7 @@ void arm11_add_IR(arm11_common_t * arm11, uint8_t instr, tap_state_t state) JTAG_DEBUG("IR <= 0x%02x", instr); - scan_field_t field; + struct scan_field field; arm11_setup_field(arm11, 5, &instr, NULL, &field); @@ -119,7 +119,7 @@ void arm11_add_IR(arm11_common_t * arm11, uint8_t instr, tap_state_t state) } /** Verify shifted out data from Scan Chain Register (SCREG) - * Used as parameter to scan_field_t::in_handler in + * Used as parameter to struct scan_field::in_handler in * arm11_add_debug_SCAN_N(). * */ @@ -167,7 +167,7 @@ int arm11_add_debug_SCAN_N(arm11_common_t * arm11, uint8_t chain, tap_state_t st arm11_add_IR(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT); - scan_field_t field; + struct scan_field field; uint8_t tmp[1]; arm11_setup_field(arm11, 5, &chain, &tmp, &field); @@ -202,7 +202,7 @@ void arm11_add_debug_INST(arm11_common_t * arm11, uint32_t inst, uint8_t * flag, { JTAG_DEBUG("INST <= 0x%08x", inst); - scan_field_t itr[2]; + struct scan_field itr[2]; arm11_setup_field(arm11, 32, &inst, NULL, itr + 0); arm11_setup_field(arm11, 1, NULL, flag, itr + 1); @@ -230,7 +230,7 @@ int arm11_read_DSCR(arm11_common_t * arm11, uint32_t *value) arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); uint32_t dscr; - scan_field_t chain1_field; + struct scan_field chain1_field; arm11_setup_field(arm11, 32, NULL, &dscr, &chain1_field); @@ -266,7 +266,7 @@ int arm11_write_DSCR(arm11_common_t * arm11, uint32_t dscr) arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); - scan_field_t chain1_field; + struct scan_field chain1_field; arm11_setup_field(arm11, 32, &dscr, NULL, &chain1_field); @@ -451,7 +451,7 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32 arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); - scan_field_t chain5_fields[3]; + struct scan_field chain5_fields[3]; uint32_t Data; uint8_t Ready; @@ -578,7 +578,7 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, uint32_t opcode, arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); - scan_field_t chain5_fields[3]; + struct scan_field chain5_fields[3]; arm11_setup_field(arm11, 32, NULL/*&Data*/, NULL, chain5_fields + 0); arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1); @@ -682,7 +682,7 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, uint32_t opcode, uint arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); - scan_field_t chain5_fields[3]; + struct scan_field chain5_fields[3]; uint32_t Data; uint8_t Ready; @@ -799,7 +799,7 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); - scan_field_t chain7_fields[3]; + struct scan_field chain7_fields[3]; uint8_t nRW; uint32_t DataOut; @@ -959,7 +959,7 @@ int arm11_write_etm(arm11_common_t * arm11, uint8_t address, uint32_t value) /* Uses INTEST for read and write */ arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); - scan_field_t chain6_fields[3]; + struct scan_field chain6_fields[3]; uint8_t nRW = 1; @@ -993,7 +993,7 @@ int arm11_read_etm(arm11_common_t * arm11, uint8_t address, uint32_t * value) /* Uses INTEST for read and write */ arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); - scan_field_t chain6_fields[3]; + struct scan_field chain6_fields[3]; uint8_t nRW = 0; diff --git a/src/target/arm11_dbgtap.h b/src/target/arm11_dbgtap.h index f8a793fa..fb37faa9 100644 --- a/src/target/arm11_dbgtap.h +++ b/src/target/arm11_dbgtap.h @@ -6,7 +6,7 @@ /* ARM11 internals */ void arm11_setup_field(arm11_common_t *arm11, int num_bits, - void *in_data, void *out_data, scan_field_t *field); + void *in_data, void *out_data, struct scan_field *field); void arm11_add_IR(arm11_common_t *arm11, uint8_t instr, tap_state_t state); int arm11_add_debug_SCAN_N(arm11_common_t *arm11, @@ -36,9 +36,9 @@ int arm11_run_instr_data_from_core_via_r0(arm11_common_t *arm11, int arm11_run_instr_data_to_core_via_r0(arm11_common_t *arm11, uint32_t opcode, uint32_t data); -int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, +int arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state); -int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, +int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state); /** diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 4e09228b..01ccf304 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -44,7 +44,7 @@ static int arm720t_scan_cp15(target_t *target, int retval; struct arm720t_common_s *arm720t = target_to_arm720(target); arm_jtag_t *jtag_info; - scan_field_t fields[2]; + struct scan_field fields[2]; uint8_t out_buf[4]; uint8_t instruction_buf = instruction; diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 8bf46807..90e75262 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -50,7 +50,7 @@ static int arm7tdmi_examine_debug_reason(target_t *target) if ((target->debug_reason != DBG_REASON_DBGRQ) && (target->debug_reason != DBG_REASON_SINGLESTEP)) { - scan_field_t fields[2]; + struct scan_field fields[2]; uint8_t databus[4]; uint8_t breakpoint; @@ -130,7 +130,7 @@ static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, static int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) { int retval = ERROR_OK; - scan_field_t fields[2]; + struct scan_field fields[2]; jtag_set_end_state(TAP_DRPAUSE); if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) @@ -217,7 +217,7 @@ static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) { int retval = ERROR_OK; - scan_field_t fields[2]; + struct scan_field fields[2]; jtag_set_end_state(TAP_DRPAUSE); if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 9fe8fc4f..ca7728b0 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -56,7 +56,7 @@ static int arm920t_read_cp15_physical(target_t *target, { struct arm920t_common_s *arm920t = target_to_arm920(target); arm_jtag_t *jtag_info; - scan_field_t fields[4]; + struct scan_field fields[4]; uint8_t access_type_buf = 1; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 0; @@ -108,7 +108,7 @@ static int arm920t_write_cp15_physical(target_t *target, { struct arm920t_common_s *arm920t = target_to_arm920(target); arm_jtag_t *jtag_info; - scan_field_t fields[4]; + struct scan_field fields[4]; uint8_t access_type_buf = 1; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 1; @@ -157,7 +157,7 @@ static int arm920t_execute_cp15(target_t *target, uint32_t cp15_opcode, int retval; struct arm920t_common_s *arm920t = target_to_arm920(target); arm_jtag_t *jtag_info; - scan_field_t fields[4]; + struct scan_field fields[4]; uint8_t access_type_buf = 0; /* interpreted access */ uint8_t reg_addr_buf = 0x0; uint8_t nr_w_buf = 0; diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index c8120b67..25c44a0e 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -54,7 +54,7 @@ static int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2, struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm); - scan_field_t fields[4]; + struct scan_field fields[4]; uint8_t address_buf[2]; uint8_t nr_w_buf = 0; uint8_t access = 1; @@ -146,7 +146,7 @@ static int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm); - scan_field_t fields[4]; + struct scan_field fields[4]; uint8_t value_buf[4]; uint8_t address_buf[2]; uint8_t nr_w_buf = 1; diff --git a/src/target/arm966e.c b/src/target/arm966e.c index b1fea08e..d3ae9b20 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -72,7 +72,7 @@ static int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value) int retval = ERROR_OK; struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 0; @@ -124,7 +124,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value) int retval = ERROR_OK; struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 1; uint8_t value_buf[4]; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 56ce3652..d1d4a8de 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -66,7 +66,7 @@ int arm9tdmi_examine_debug_reason(target_t *target) if ((target->debug_reason != DBG_REASON_DBGRQ) && (target->debug_reason != DBG_REASON_SINGLESTEP)) { - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t databus[4]; uint8_t instructionbus[4]; uint8_t debug_reason; @@ -128,7 +128,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed) { int retval = ERROR_OK; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t out_buf[4]; uint8_t instr_buf[4]; uint8_t sysspeed_buf = 0x0; @@ -201,7 +201,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) { int retval = ERROR_OK;; - scan_field_t fields[3]; + struct scan_field fields[3]; jtag_set_end_state(TAP_DRPAUSE); if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) @@ -273,7 +273,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) { int retval = ERROR_OK; - scan_field_t fields[3]; + struct scan_field fields[3]; jtag_set_end_state(TAP_DRPAUSE); if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 4a7a37c0..7fc22d0e 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -74,7 +74,7 @@ static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address int adi_jtag_dp_scan(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t *outvalue, uint8_t *invalue, uint8_t *ack) { arm_jtag_t *jtag_info = swjdp->jtag_info; - scan_field_t fields[2]; + struct scan_field fields[2]; uint8_t out_addr_buf; jtag_set_end_state(TAP_IDLE); @@ -104,7 +104,7 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uin int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint32_t outvalue, uint32_t *invalue, uint8_t *ack) { arm_jtag_t *jtag_info = swjdp->jtag_info; - scan_field_t fields[2]; + struct scan_field fields[2]; uint8_t out_value_buf[4]; uint8_t out_addr_buf; diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c index bcd4faab..4b5bd392 100644 --- a/src/target/arm_jtag.c +++ b/src/target/arm_jtag.c @@ -40,7 +40,7 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, uint32_t new_instr, void *no_veri if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { - scan_field_t field; + struct scan_field field; uint8_t t[4]; field.tap = tap; diff --git a/src/target/avrt.c b/src/target/avrt.c index bff2418c..4a1024fe 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -200,7 +200,7 @@ int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_l } { - scan_field_t field[1]; + struct scan_field field[1]; field[0].tap = tap; field[0].num_bits = tap->ir_length; @@ -221,7 +221,7 @@ int mcu_write_dr(struct jtag_tap *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_l } { - scan_field_t field[1]; + struct scan_field field[1]; field[0].tap = tap; field[0].num_bits = dr_len; diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index 7b20e12c..a1eac134 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -333,7 +333,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, { embeddedice_reg_t *ice_reg = reg->arch_info; uint8_t reg_addr = ice_reg->addr & 0x1f; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field1_out[1]; uint8_t field2_out[1]; @@ -398,7 +398,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, */ int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size) { - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field1_out[1]; uint8_t field2_out[1]; @@ -519,7 +519,7 @@ void embeddedice_store_reg(reg_t *reg) */ int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size) { - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0_out[4]; uint8_t field1_out[1]; uint8_t field2_out[1]; @@ -564,7 +564,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size) */ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout) { - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0_in[4]; uint8_t field1_out[1]; uint8_t field2_out[1]; diff --git a/src/target/etb.c b/src/target/etb.c index 3ad73977..1315b71a 100644 --- a/src/target/etb.c +++ b/src/target/etb.c @@ -52,7 +52,7 @@ static int etb_set_instr(etb_t *etb, uint32_t new_instr) if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { - scan_field_t field; + struct scan_field field; field.tap = tap; field.num_bits = tap->ir_length; @@ -73,7 +73,7 @@ static int etb_scann(etb_t *etb, uint32_t new_scan_chain) { if (etb->cur_scan_chain != new_scan_chain) { - scan_field_t field; + struct scan_field field; field.tap = etb->tap; field.num_bits = 5; @@ -173,7 +173,7 @@ static void etb_getbuf(jtag_callback_data_t arg) static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames) { - scan_field_t fields[3]; + struct scan_field fields[3]; int i; jtag_set_end_state(TAP_IDLE); @@ -229,7 +229,7 @@ static int etb_read_reg_w_check(reg_t *reg, { etb_reg_t *etb_reg = reg->arch_info; uint8_t reg_addr = etb_reg->addr & 0x7f; - scan_field_t fields[3]; + struct scan_field fields[3]; LOG_DEBUG("%i", (int)(etb_reg->addr)); @@ -315,7 +315,7 @@ static int etb_write_reg(reg_t *reg, uint32_t value) { etb_reg_t *etb_reg = reg->arch_info; uint8_t reg_addr = etb_reg->addr & 0x7f; - scan_field_t fields[3]; + struct scan_field fields[3]; LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value); diff --git a/src/target/etm.c b/src/target/etm.c index 6d34f6c9..01a9b714 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -492,7 +492,7 @@ static int etm_read_reg_w_check(reg_t *reg, etm_reg_t *etm_reg = reg->arch_info; const struct etm_reg_info *r = etm_reg->reg_info; uint8_t reg_addr = r->addr & 0x7f; - scan_field_t fields[3]; + struct scan_field fields[3]; if (etm_reg->reg_info->mode == WO) { LOG_ERROR("BUG: can't read write-only register %s", r->name); @@ -578,7 +578,7 @@ static int etm_write_reg(reg_t *reg, uint32_t value) etm_reg_t *etm_reg = reg->arch_info; const struct etm_reg_info *r = etm_reg->reg_info; uint8_t reg_addr = r->addr & 0x7f; - scan_field_t fields[3]; + struct scan_field fields[3]; if (etm_reg->reg_info->mode == RO) { LOG_ERROR("BUG: can't write read--only register %s", r->name); diff --git a/src/target/feroceon.c b/src/target/feroceon.c index e1dc0686..b157dc3e 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -71,7 +71,7 @@ int feroceon_assert_reset(target_t *target) int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, uint32_t instr) { - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t out_buf[4]; uint8_t instr_buf[4]; uint8_t sysspeed_buf = 0x0; diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index 021e3ab4..d23411f4 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -37,7 +37,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) { - scan_field_t field; + struct scan_field field; uint8_t t[4]; field.tap = tap; @@ -54,7 +54,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode) { - scan_field_t field; + struct scan_field field; jtag_set_end_state(TAP_IDLE); @@ -77,7 +77,7 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode) int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, uint32_t *impcode) { - scan_field_t field; + struct scan_field field; jtag_set_end_state(TAP_IDLE); @@ -105,7 +105,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, uint32_t *data) if (tap == NULL) return ERROR_FAIL; - scan_field_t field; + struct scan_field field; uint8_t t[4], r[4]; int retval; diff --git a/src/target/xscale.c b/src/target/xscale.c index c4d22b1d..3540f6a6 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -163,7 +163,7 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr) if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { - scan_field_t field; + struct scan_field field; uint8_t scratch[4]; memset(&field, 0, sizeof field); @@ -182,7 +182,7 @@ static int xscale_read_dcsr(target_t *target) { struct xscale_common_s *xscale = target_to_xscale(target); int retval; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0 = 0x0; uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x7; @@ -258,7 +258,7 @@ static int xscale_receive(target_t *target, uint32_t *buffer, int num_words) int retval = ERROR_OK; tap_state_t path[3]; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t *field0 = malloc(num_words * 1); uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x6; @@ -362,7 +362,7 @@ static int xscale_read_tx(target_t *target, int consume) tap_state_t noconsume_path[6]; int retval; struct timeval timeout, now; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0_in = 0x0; uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x6; @@ -458,7 +458,7 @@ static int xscale_write_rx(target_t *target) struct xscale_common_s *xscale = target_to_xscale(target); int retval; struct timeval timeout, now; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0_out = 0x0; uint8_t field0_in = 0x0; uint8_t field0_check_value = 0x2; @@ -614,7 +614,7 @@ static int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) { struct xscale_common_s *xscale = target_to_xscale(target); int retval; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0 = 0x0; uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x7; @@ -686,7 +686,7 @@ static int xscale_load_ic(target_t *target, uint32_t va, uint32_t buffer[8]) uint8_t packet[4]; uint8_t cmd; int word; - scan_field_t fields[2]; + struct scan_field fields[2]; LOG_DEBUG("loading miniIC at 0x%8.8" PRIx32 "", va); @@ -740,7 +740,7 @@ static int xscale_invalidate_ic_line(target_t *target, uint32_t va) { uint8_t packet[4]; uint8_t cmd; - scan_field_t fields[2]; + struct scan_field fields[2]; jtag_set_end_state(TAP_IDLE); xscale_jtag_set_instr(target->tap, XSCALE_LDIC); -- cgit v1.2.3