From dbbc9c41f7db210b0a4e226540a28e0a8a5019bf Mon Sep 17 00:00:00 2001 From: zwelch Date: Wed, 27 May 2009 06:49:24 +0000 Subject: Move TCL script files -- Step 2 of 2: - Move src/tcl to tcl/. - Update top Makefile.am to use new path name. git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/tcl/chip/atmel/at91/aic.tcl | 101 ----------- src/tcl/chip/atmel/at91/at91sam7x128.tcl | 128 -------------- src/tcl/chip/atmel/at91/at91sam7x256.tcl | 126 -------------- src/tcl/chip/atmel/at91/pmc.tcl | 17 -- src/tcl/chip/atmel/at91/rtt.tcl | 56 ------ src/tcl/chip/atmel/at91/usarts.tcl | 135 -------------- src/tcl/chip/st/stm32/stm32.tcl | 7 - src/tcl/chip/st/stm32/stm32_rcc.tcl | 290 ------------------------------- src/tcl/chip/st/stm32/stm32_regs.tcl | 95 ---------- 9 files changed, 955 deletions(-) delete mode 100644 src/tcl/chip/atmel/at91/aic.tcl delete mode 100644 src/tcl/chip/atmel/at91/at91sam7x128.tcl delete mode 100644 src/tcl/chip/atmel/at91/at91sam7x256.tcl delete mode 100644 src/tcl/chip/atmel/at91/pmc.tcl delete mode 100644 src/tcl/chip/atmel/at91/rtt.tcl delete mode 100644 src/tcl/chip/atmel/at91/usarts.tcl delete mode 100644 src/tcl/chip/st/stm32/stm32.tcl delete mode 100644 src/tcl/chip/st/stm32/stm32_rcc.tcl delete mode 100644 src/tcl/chip/st/stm32/stm32_regs.tcl (limited to 'src/tcl/chip') diff --git a/src/tcl/chip/atmel/at91/aic.tcl b/src/tcl/chip/atmel/at91/aic.tcl deleted file mode 100644 index 1fe4514b..00000000 --- a/src/tcl/chip/atmel/at91/aic.tcl +++ /dev/null @@ -1,101 +0,0 @@ -set AIC_SMR [expr $AT91C_BASE_AIC + 0x00000000 ] -global AIC_SMR -set AIC_SVR [expr $AT91C_BASE_AIC + 0x00000080 ] -global AIC_SVR -set AIC_IVR [expr $AT91C_BASE_AIC + 0x00000100 ] -global AIC_IVR -set AIC_FVR [expr $AT91C_BASE_AIC + 0x00000104 ] -global AIC_FVR -set AIC_ISR [expr $AT91C_BASE_AIC + 0x00000108 ] -global AIC_ISR -set AIC_IPR [expr $AT91C_BASE_AIC + 0x0000010C ] -global AIC_IPR -set AIC_IMR [expr $AT91C_BASE_AIC + 0x00000110 ] -global AIC_IMR -set AIC_CISR [expr $AT91C_BASE_AIC + 0x00000114 ] -global AIC_CISR -set AIC_IECR [expr $AT91C_BASE_AIC + 0x00000120 ] -global AIC_IECR -set AIC_IDCR [expr $AT91C_BASE_AIC + 0x00000124 ] -global AIC_IDCR -set AIC_ICCR [expr $AT91C_BASE_AIC + 0x00000128 ] -global AIC_ICCR -set AIC_ISCR [expr $AT91C_BASE_AIC + 0x0000012C ] -global AIC_ISCR -set AIC_EOICR [expr $AT91C_BASE_AIC + 0x00000130 ] -global AIC_EOICR -set AIC_SPU [expr $AT91C_BASE_AIC + 0x00000134 ] -global AIC_SPU -set AIC_DCR [expr $AT91C_BASE_AIC + 0x00000138 ] -global AIC_DCR -set AIC_FFER [expr $AT91C_BASE_AIC + 0x00000140 ] -global AIC_FFER -set AIC_FFDR [expr $AT91C_BASE_AIC + 0x00000144 ] -global AIC_FFDR -set AIC_FFSR [expr $AT91C_BASE_AIC + 0x00000148 ] -global AIC_FFSR - - -proc aic_enable_disable_list { VAL ENAME DNAME } { - global AT91C_ID - - show_mmr32_bits AT91C_ID $VAL - -} - -proc show_AIC_IPR_helper { NAME ADDR VAL } { - aic_enable_disable_list $VAL "IRQ PENDING" "irq not-pending" -} - -proc show_AIC_IMR_helper { NAME ADDR VAL } { - aic_enable_disable_list $VAL "IRQ ENABLED" "irq disabled" -} - - -proc show_AIC { } { - global AIC_SMR - if [catch { ocd_mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] { - error [format "%s (%s)" $msg AIC_SMR] - } - puts "AIC_SMR: Mode & Type" - global AT91C_ID - for { set x 0 } { $x < 32 } { } { - puts -nonewline " " - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] - incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] - incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] - incr x - puts [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)] - incr x - } - global AIC_SVR - if [catch { ocd_mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] { - error [format "%s (%s)" $msg AIC_SVR] - } - puts "AIC_SVR: Vectors" - for { set x 0 } { $x < 32 } { } { - puts -nonewline " " - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] - incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] - incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] - incr x - puts [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)] - incr x - } - - foreach REG { - AIC_IVR AIC_FVR AIC_ISR - AIC_IPR AIC_IMR AIC_CISR AIC_IECR AIC_IDCR - AIC_ICCR AIC_ISCR AIC_EOICR AIC_SPU AIC_DCR - AIC_FFER AIC_FFDR AIC_FFSR } { - if [catch { show_mmr32_reg $REG } msg ] { - error $msg - break - } - } -} - diff --git a/src/tcl/chip/atmel/at91/at91sam7x128.tcl b/src/tcl/chip/atmel/at91/at91sam7x128.tcl deleted file mode 100644 index 1cf7c1cf..00000000 --- a/src/tcl/chip/atmel/at91/at91sam7x128.tcl +++ /dev/null @@ -1,128 +0,0 @@ -source [find tcl/bitsbytes.tcl] -source [find tcl/cpu/arm/arm7tdmi.tcl] -source [find tcl/memory.tcl] -source [find tcl/mmr_helpers.tcl] - -set CHIP_MAKER atmel -set CHIP_FAMILY at91sam7 -set CHIP_NAME at91sam7x128 -# how many flash regions. -set N_FLASH 1 -set FLASH(0,CHIPSELECT) -1 -set FLASH(0,BASE) 0x00100000 -set FLASH(0,LEN) $__128K -set FLASH(0,HUMAN) "internal flash" -set FLASH(0,TYPE) "flash" -set FLASH(0,RWX) $RWX_R_X -set FLASH(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY -# how many ram regions. -set N_RAM 1 -set RAM(0,CHIPSELECT) -1 -set RAM(0,BASE) 0x00200000 -set RAM(0,LEN) $__32K -set RAM(0,HUMAN) "internal ram" -set RAM(0,TYPE) "ram" -set RAM(0,RWX) $RWX_RWX -set RAM(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY - -# I AM LAZY... I create 1 region for all MMRs. -set N_MMREGS 1 -set MMREGS(0,CHIPSELECT) -1 -set MMREGS(0,BASE) 0xfff00000 -set MMREGS(0,LEN) 0x000fffff -set MMREGS(0,HUMAN) "mm-regs" -set MMREGS(0,TYPE) "mmr" -set MMREGS(0,RWX) $RWX_RW -set MMREGS(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY - -# no external memory -set N_XMEM 0 - - - - -set AT91C_BASE_SYS 0xFFFFF000 -set AT91C_BASE_AIC 0xFFFFF000 -set AT91C_BASE_PDC_DBGU 0xFFFFF300 -set AT91C_BASE_DBGU 0xFFFFF200 -set AT91C_BASE_PIOA 0xFFFFF400 -set AT91C_BASE_PIOB 0xFFFFF600 -set AT91C_BASE_CKGR 0xFFFFFC20 -set AT91C_BASE_PMC 0xFFFFFC00 -set AT91C_BASE_RSTC 0xFFFFFD00 -set AT91C_BASE_RTTC 0xFFFFFD20 -set AT91C_BASE_PITC 0xFFFFFD30 -set AT91C_BASE_WDTC 0xFFFFFD40 -set AT91C_BASE_VREG 0xFFFFFD60 -set AT91C_BASE_MC 0xFFFFFF00 -set AT91C_BASE_PDC_SPI1 0xFFFE4100 -set AT91C_BASE_SPI1 0xFFFE4000 -set AT91C_BASE_PDC_SPI0 0xFFFE0100 -set AT91C_BASE_SPI0 0xFFFE0000 -set AT91C_BASE_PDC_US1 0xFFFC4100 -set AT91C_BASE_US1 0xFFFC4000 -set AT91C_BASE_PDC_US0 0xFFFC0100 -set AT91C_BASE_US0 0xFFFC0000 -set AT91C_BASE_PDC_SSC 0xFFFD4100 -set AT91C_BASE_SSC 0xFFFD4000 -set AT91C_BASE_TWI 0xFFFB8000 -set AT91C_BASE_PWMC_CH3 0xFFFCC260 -set AT91C_BASE_PWMC_CH2 0xFFFCC240 -set AT91C_BASE_PWMC_CH1 0xFFFCC220 -set AT91C_BASE_PWMC_CH0 0xFFFCC200 -set AT91C_BASE_PWMC 0xFFFCC000 -set AT91C_BASE_UDP 0xFFFB0000 -set AT91C_BASE_TC0 0xFFFA0000 -set AT91C_BASE_TC1 0xFFFA0040 -set AT91C_BASE_TC2 0xFFFA0080 -set AT91C_BASE_TCB 0xFFFA0000 -set AT91C_BASE_CAN_MB0 0xFFFD0200 -set AT91C_BASE_CAN_MB1 0xFFFD0220 -set AT91C_BASE_CAN_MB2 0xFFFD0240 -set AT91C_BASE_CAN_MB3 0xFFFD0260 -set AT91C_BASE_CAN_MB4 0xFFFD0280 -set AT91C_BASE_CAN_MB5 0xFFFD02A0 -set AT91C_BASE_CAN_MB6 0xFFFD02C0 -set AT91C_BASE_CAN_MB7 0xFFFD02E0 -set AT91C_BASE_CAN 0xFFFD0000 -set AT91C_BASE_EMAC 0xFFFDC000 -set AT91C_BASE_PDC_ADC 0xFFFD8100 -set AT91C_BASE_ADC 0xFFFD8000 - -set AT91C_ID(0) FIQ -set AT91C_ID(1) SYS -set AT91C_ID(2) PIOA -set AT91C_ID(3) PIOB -set AT91C_ID(4) SPI0 -set AT91C_ID(5) SPI1 -set AT91C_ID(6) US0 -set AT91C_ID(7) US1 -set AT91C_ID(8) SSC -set AT91C_ID(9) TWI -set AT91C_ID(10) PWMC -set AT91C_ID(11) UDP -set AT91C_ID(12) TC0 -set AT91C_ID(13) TC1 -set AT91C_ID(14) TC2 -set AT91C_ID(15) CAN -set AT91C_ID(16) EMAC -set AT91C_ID(17) ADC -set AT91C_ID(18) "" -set AT91C_ID(19) "" -set AT91C_ID(20) "" -set AT91C_ID(21) "" -set AT91C_ID(22) "" -set AT91C_ID(23) "" -set AT91C_ID(24) "" -set AT91C_ID(25) "" -set AT91C_ID(26) "" -set AT91C_ID(27) "" -set AT91C_ID(28) "" -set AT91C_ID(29) "" -set AT91C_ID(30) IRQ0 -set AT91C_ID(31) IRQ1 - -source [find tcl/chip/atmel/at91/aic.tcl] -source [find tcl/chip/atmel/at91/usarts.tcl] -source [find tcl/chip/atmel/at91/pmc.tcl] -source [find tcl/chip/atmel/at91/rtt.tcl] diff --git a/src/tcl/chip/atmel/at91/at91sam7x256.tcl b/src/tcl/chip/atmel/at91/at91sam7x256.tcl deleted file mode 100644 index 1cba4859..00000000 --- a/src/tcl/chip/atmel/at91/at91sam7x256.tcl +++ /dev/null @@ -1,126 +0,0 @@ -source [find tcl/bitsbytes.tcl] -source [find tcl/cpu/arm/arm7tdmi.tcl] -source [find tcl/memory.tcl] -source [find tcl/mmr_helpers.tcl] - -set CHIP_MAKER atmel -set CHIP_FAMILY at91sam7 -set CHIP_NAME at91sam7x256 -# how many flash regions. -set N_FLASH 1 -set FLASH(0,CHIPSELECT) -1 -set FLASH(0,BASE) 0x00100000 -set FLASH(0,LEN) $__256K -set FLASH(0,HUMAN) "internal flash" -set FLASH(0,TYPE) "flash" -set FLASH(0,RWX) $RWX_R_X -set FLASH(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY -# how many ram regions. -set N_RAM 1 -set RAM(0,CHIPSELECT) -1 -set RAM(0,BASE) 0x00200000 -set RAM(0,LEN) $__64K -set RAM(0,HUMAN) "internal ram" -set RAM(0,TYPE) "ram" -set RAM(0,RWX) $RWX_RWX -set RAM(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY - -# I AM LAZY... I create 1 region for all MMRs. -set N_MMREGS 1 -set MMREGS(0,CHIPSELECT) -1 -set MMREGS(0,BASE) 0xfff00000 -set MMREGS(0,LEN) 0x000fffff -set MMREGS(0,HUMAN) "mm-regs" -set MMREGS(0,TYPE) "mmr" -set MMREGS(0,RWX) $RWX_RW -set MMREGS(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY - -# no external memory -set N_XMEM 0 - -set AT91C_BASE_SYS 0xFFFFF000 -set AT91C_BASE_AIC 0xFFFFF000 -set AT91C_BASE_PDC_DBGU 0xFFFFF300 -set AT91C_BASE_DBGU 0xFFFFF200 -set AT91C_BASE_PIOA 0xFFFFF400 -set AT91C_BASE_PIOB 0xFFFFF600 -set AT91C_BASE_CKGR 0xFFFFFC20 -set AT91C_BASE_PMC 0xFFFFFC00 -set AT91C_BASE_RSTC 0xFFFFFD00 -set AT91C_BASE_RTTC 0xFFFFFD20 -set AT91C_BASE_PITC 0xFFFFFD30 -set AT91C_BASE_WDTC 0xFFFFFD40 -set AT91C_BASE_VREG 0xFFFFFD60 -set AT91C_BASE_MC 0xFFFFFF00 -set AT91C_BASE_PDC_SPI1 0xFFFE4100 -set AT91C_BASE_SPI1 0xFFFE4000 -set AT91C_BASE_PDC_SPI0 0xFFFE0100 -set AT91C_BASE_SPI0 0xFFFE0000 -set AT91C_BASE_PDC_US1 0xFFFC4100 -set AT91C_BASE_US1 0xFFFC4000 -set AT91C_BASE_PDC_US0 0xFFFC0100 -set AT91C_BASE_US0 0xFFFC0000 -set AT91C_BASE_PDC_SSC 0xFFFD4100 -set AT91C_BASE_SSC 0xFFFD4000 -set AT91C_BASE_TWI 0xFFFB8000 -set AT91C_BASE_PWMC_CH3 0xFFFCC260 -set AT91C_BASE_PWMC_CH2 0xFFFCC240 -set AT91C_BASE_PWMC_CH1 0xFFFCC220 -set AT91C_BASE_PWMC_CH0 0xFFFCC200 -set AT91C_BASE_PWMC 0xFFFCC000 -set AT91C_BASE_UDP 0xFFFB0000 -set AT91C_BASE_TC0 0xFFFA0000 -set AT91C_BASE_TC1 0xFFFA0040 -set AT91C_BASE_TC2 0xFFFA0080 -set AT91C_BASE_TCB 0xFFFA0000 -set AT91C_BASE_CAN_MB0 0xFFFD0200 -set AT91C_BASE_CAN_MB1 0xFFFD0220 -set AT91C_BASE_CAN_MB2 0xFFFD0240 -set AT91C_BASE_CAN_MB3 0xFFFD0260 -set AT91C_BASE_CAN_MB4 0xFFFD0280 -set AT91C_BASE_CAN_MB5 0xFFFD02A0 -set AT91C_BASE_CAN_MB6 0xFFFD02C0 -set AT91C_BASE_CAN_MB7 0xFFFD02E0 -set AT91C_BASE_CAN 0xFFFD0000 -set AT91C_BASE_EMAC 0xFFFDC000 -set AT91C_BASE_PDC_ADC 0xFFFD8100 -set AT91C_BASE_ADC 0xFFFD8000 - -set AT91C_ID(0) "FIQ" -set AT91C_ID(1) "SYS" -set AT91C_ID(2) "PIOA" -set AT91C_ID(3) "PIOB" -set AT91C_ID(4) "SPI0" -set AT91C_ID(5) "SPI1" -set AT91C_ID(6) "US0" -set AT91C_ID(7) "US1" -set AT91C_ID(8) "SSC" -set AT91C_ID(9) "TWI" -set AT91C_ID(10) "PWMC" -set AT91C_ID(11) "UDP" -set AT91C_ID(12) "TC0" -set AT91C_ID(13) "TC1" -set AT91C_ID(14) "TC2" -set AT91C_ID(15) "CAN" -set AT91C_ID(16) "EMAC" -set AT91C_ID(17) "ADC" -set AT91C_ID(18) "" -set AT91C_ID(19) "" -set AT91C_ID(20) "" -set AT91C_ID(21) "" -set AT91C_ID(22) "" -set AT91C_ID(23) "" -set AT91C_ID(24) "" -set AT91C_ID(25) "" -set AT91C_ID(26) "" -set AT91C_ID(27) "" -set AT91C_ID(28) "" -set AT91C_ID(29) "" -set AT91C_ID(30) "IRQ0" -set AT91C_ID(31) "IRQ1" - - -source [find tcl/chip/atmel/at91/aic.tcl] -source [find tcl/chip/atmel/at91/usarts.tcl] -source [find tcl/chip/atmel/at91/pmc.tcl] -source [find tcl/chip/atmel/at91/rtt.tcl] diff --git a/src/tcl/chip/atmel/at91/pmc.tcl b/src/tcl/chip/atmel/at91/pmc.tcl deleted file mode 100644 index 584acb80..00000000 --- a/src/tcl/chip/atmel/at91/pmc.tcl +++ /dev/null @@ -1,17 +0,0 @@ - -if [info exists AT91C_MAINOSC_FREQ] { - # user set this... let it be. -} { - # 18.432mhz is a common thing... - set AT91C_MAINOSC_FREQ 18432000 -} -global AT91C_MAINOSC_FREQ - -if [info exists AT91C_SLOWOSC_FREQ] { - # user set this... let it be. -} { - # 32khz is the norm - set AT91C_SLOWOSC_FREQ 32768 -} -global AT91C_SLOWOSC_FREQ - diff --git a/src/tcl/chip/atmel/at91/rtt.tcl b/src/tcl/chip/atmel/at91/rtt.tcl deleted file mode 100644 index 9c60300e..00000000 --- a/src/tcl/chip/atmel/at91/rtt.tcl +++ /dev/null @@ -1,56 +0,0 @@ - -set RTTC_RTMR [expr $AT91C_BASE_RTTC + 0x00] -set RTTC_RTAR [expr $AT91C_BASE_RTTC + 0x04] -set RTTC_RTVR [expr $AT91C_BASE_RTTC + 0x08] -set RTTC_RTSR [expr $AT91C_BASE_RTTC + 0x0c] -global RTTC_RTMR -global RTTC_RTAR -global RTTC_RTVR -global RTTC_RTSR - -proc show_RTTC_RTMR_helper { NAME ADDR VAL } { - set rtpres [expr $VAL & 0x0ffff] - global BIT16 BIT17 - if { $rtpres == 0 } { - set rtpres 65536; - } - global AT91C_SLOWOSC_FREQ - # Nasty hack, make this a float by tacking a .0 on the end - # otherwise, jim makes the value an integer - set f [expr $AT91C_SLOWOSC_FREQ.0 / $rtpres.0] - puts [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f] - if { $VAL & $BIT16 } { - puts "\tBit16 -> Alarm IRQ Enabled" - } else { - puts "\tBit16 -> Alarm IRQ Disabled" - } - if { $VAL & $BIT17 } { - puts "\tBit17 -> RTC Inc IRQ Enabled" - } else { - puts "\tBit17 -> RTC Inc IRQ Disabled" - } - # Bit 18 is write only. -} - -proc show_RTTC_RTSR_helper { NAME ADDR VAL } { - global BIT0 BIT1 - if { $VAL & $BIT0 } { - puts "\tBit0 -> ALARM PENDING" - } else { - puts "\tBit0 -> alarm not pending" - } - if { $VAL & $BIT1 } { - puts "\tBit0 -> RTINC PENDING" - } else { - puts "\tBit0 -> rtinc not pending" - } -} - -proc show_RTTC { } { - - show_mmr32_reg RTTC_RTMR - show_mmr32_reg RTTC_RTAR - show_mmr32_reg RTTC_RTVR - show_mmr32_reg RTTC_RTSR -} - diff --git a/src/tcl/chip/atmel/at91/usarts.tcl b/src/tcl/chip/atmel/at91/usarts.tcl deleted file mode 100644 index 19f4ed4c..00000000 --- a/src/tcl/chip/atmel/at91/usarts.tcl +++ /dev/null @@ -1,135 +0,0 @@ -# the DBGU and USARTs are 'almost' indentical' -set DBGU_CR [expr $AT91C_BASE_DBGU + 0x00000000] -set DBGU_MR [expr $AT91C_BASE_DBGU + 0x00000004] -set DBGU_IER [expr $AT91C_BASE_DBGU + 0x00000008] -set DBGU_IDR [expr $AT91C_BASE_DBGU + 0x0000000C] -set DBGU_IMR [expr $AT91C_BASE_DBGU + 0x00000010] -set DBGU_CSR [expr $AT91C_BASE_DBGU + 0x00000014] -set DBGU_RHR [expr $AT91C_BASE_DBGU + 0x00000018] -set DBGU_THR [expr $AT91C_BASE_DBGU + 0x0000001C] -set DBGU_BRGR [expr $AT91C_BASE_DBGU + 0x00000020] -# no RTOR -# no TTGR -# no FIDI -# no NER -set DBGU_CIDR [expr $AT91C_BASE_DBGU + 0x00000040] -set DBGU_EXID [expr $AT91C_BASE_DBGU + 0x00000044] -set DBGU_FNTR [expr $AT91C_BASE_DBGU + 0x00000048] - - -set USx_CR 0x00000000 -set USx_MR 0x00000004 -set USx_IER 0x00000008 -set USx_IDR 0x0000000C -set USx_IMR 0x00000010 -set USx_CSR 0x00000014 -set USx_RHR 0x00000018 -set USx_THR 0x0000001C -set USx_BRGR 0x00000020 -set USx_RTOR 0x00000024 -set USx_TTGR 0x00000028 -set USx_FIDI 0x00000040 -set USx_NER 0x00000044 -set USx_IF 0x0000004C - -# Create all the uarts that exist.. -# we blow up if there are >9 - - -proc show_mmr_USx_MR_helper { NAME ADDR VAL } { - # First - just print it - - set x [show_normalize_bitfield $VAL 3 0] - if { $x == 0 } { - puts "\tNormal operation" - } else { - puts [format "\tNon Normal operation mode: 0x%02x" $x] - } - - set x [show_normalize_bitfield $VAL 11 9] - set s "unknown" - switch -exact $x { - 0 { set s "Even" } - 1 { set s "Odd" } - 2 { set s "Force=0" } - 3 { set s "Force=1" } - * { - set $x [expr $x & 6] - switch -exact $x { - 4 { set s "None" } - 6 { set s "Multidrop Mode" } - } - } - } - puts [format "\tParity: %s " $s] - - set x [expr 5 + [show_normalize_bitfield $VAL 7 6]] - puts [format "\tDatabits: %d" $x] - - set x [show_normalize_bitfield $VAL 13 12] - switch -exact $x { - 0 { puts "\tStop bits: 1" } - 1 { puts "\tStop bits: 1.5" } - 2 { puts "\tStop bits: 2" } - 3 { puts "\tStop bits: Illegal/Reserved" } - } -} - -# For every possbile usart... -foreach WHO { US0 US1 US2 US3 US4 US5 US6 US7 US8 US9 } { - set n AT91C_BASE_[set WHO] - set str "" - - # Only if it exists on the chip - if [ info exists $n ] { - # Hence: $n - is like AT91C_BASE_USx - # For every sub-register - foreach REG {CR MR IER IDR IMR CSR RHR THR BRGR RTOR TTGR FIDI NER IF} { - # vn = variable name - set vn [set WHO]_[set REG] - # vn = USx_IER - # vv = variable value - set vv [expr $$n + [set USx_[set REG]]] - # And VV is the address in memory of that register - - - # make that VN a GLOBAL so others can find it - global $vn - set $vn $vv - - # Create a command for this specific register. - proc show_$vn { } "show_mmr32_reg $vn" - - # Add this command to the Device(as a whole) command - set str "$str\nshow_$vn" - } - # Now - create the DEVICE(as a whole) command - set fn show_$WHO - proc $fn { } $str - } -} - -# The Debug Uart is special.. -set str "" - - -# For every sub-register -foreach REG {DBGU_CR DBGU_MR DBGU_IER DBGU_IDR DBGU_IMR - DBGU_CSR DBGU_RHR DBGU_THR DBGU_BRGR DBGU_CIDR DBGU_EXID DBGU_FNTR} { - - # Create a command for this specific register. - proc show_$REG { } "show_mmr32_reg $REG" - - # Add this command to the Device(as a whole) command - set str "$str\nshow_$REG" -} - -# Now - create the DEVICE(as a whole) command -proc show_DBGU { } $str - -unset str - -proc show_DBGU_MR_helper { NAME ADDR VAL } { show_mmr_USx_MR_helper $NAME $ADDR $VAL } - - - diff --git a/src/tcl/chip/st/stm32/stm32.tcl b/src/tcl/chip/st/stm32/stm32.tcl deleted file mode 100644 index 7986efb5..00000000 --- a/src/tcl/chip/st/stm32/stm32.tcl +++ /dev/null @@ -1,7 +0,0 @@ -source [find tcl/bitsbytes.tcl] -source [find tcl/cpu/arm/cortex_m3.tcl] -source [find tcl/memory.tcl] -source [find tcl/mmr_helpers.tcl] - -source [find tcl/chip/st/stm32/stm32_regs.tcl] -source [find tcl/chip/st/stm32/stm32_rcc.tcl] diff --git a/src/tcl/chip/st/stm32/stm32_rcc.tcl b/src/tcl/chip/st/stm32/stm32_rcc.tcl deleted file mode 100644 index 3973ff94..00000000 --- a/src/tcl/chip/st/stm32/stm32_rcc.tcl +++ /dev/null @@ -1,290 +0,0 @@ - -set RCC_CR [expr $RCC_BASE + 0x00] -set RCC_CFGR [expr $RCC_BASE + 0x04] -set RCC_CIR [expr $RCC_BASE + 0x08] -set RCC_APB2RSTR [expr $RCC_BASE + 0x0c] -set RCC_APB1RSTR [expr $RCC_BASE + 0x10] -set RCC_AHBENR [expr $RCC_BASE + 0x14] -set RCC_APB2ENR [expr $RCC_BASE + 0x18] -set RCC_APB1ENR [expr $RCC_BASE + 0x1c] -set RCC_BDCR [expr $RCC_BASE + 0x20] -set RCC_CSR [expr $RCC_BASE + 0x24] - - -proc show_RCC_CR { } { - if [ catch { set val [show_mmr32_reg RCC_CR] } msg ] { - error $msg - } - - show_mmr_bitfield 0 0 $val HSI { OFF ON } - show_mmr_bitfield 1 1 $val HSIRDY { NOTRDY RDY } - show_mmr_bitfield 7 3 $val HSITRIM { _NUMBER_ } - show_mmr_bitfield 15 8 $val HSICAL { _NUMBER_ } - show_mmr_bitfield 16 16 $val HSEON { OFF ON } - show_mmr_bitfield 17 17 $val HSERDY { NOTRDY RDY } - show_mmr_bitfield 18 18 $val HSEBYP { NOTBYPASSED BYPASSED } - show_mmr_bitfield 19 19 $val CSSON { OFF ON } - show_mmr_bitfield 24 24 $val PLLON { OFF ON } - show_mmr_bitfield 25 25 $val PLLRDY { NOTRDY RDY } -} - -proc show_RCC_CFGR { } { - if [ catch { set val [show_mmr32_reg RCC_CFGR] } msg ] { - error $msg - } - - - show_mmr_bitfield 1 0 $val SW { HSI HSE PLL ILLEGAL } - show_mmr_bitfield 3 2 $val SWS { HSI HSE PLL ILLEGAL } - show_mmr_bitfield 7 4 $val HPRE { sysclk_div_1 sysclk_div_1 sysclk_div_1 sysclk_div_1 sysclk_div_1 sysclk_div_1 sysclk_div_1 sysclk_div_1 sysclk_div_2 sysclk_div_4 sysclk_div_8 sysclk_div_16 sysclk_div_64 sysclk_div_128 sysclk_div_256 sysclk_div_512 } - show_mmr_bitfield 10 8 $val PPRE1 { hclk_div1 hclk_div1 hclk_div1 hclk_div1 hclk_div2 hclk_div4 hclk_div8 hclk_div16 } - show_mmr_bitfield 13 11 $val PPRE2 { hclk_div1 hclk_div1 hclk_div1 hclk_div1 hclk_div2 hclk_div4 hclk_div8 hclk_div16 } - show_mmr_bitfield 15 14 $val ADCPRE { pclk2_div1 pclk2_div1 pclk2_div1 pclk2_div1 pclk2_div2 pclk2_div4 pclk2_div8 pclk2_div16 } - show_mmr_bitfield 16 16 $val PLLSRC { HSI_div_2 HSE } - show_mmr_bitfield 17 17 $val PLLXTPRE { hse_div1 hse_div2 } - show_mmr_bitfield 21 18 $val PLLMUL { x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 x16 } - show_mmr_bitfield 22 22 $val USBPRE { div1 div1_5 } - show_mmr_bitfield 26 24 $val MCO { none none none none SysClk HSI HSE PLL_div2 } -} - - -proc show_RCC_CIR { } { - if [ catch { set val [show_mmr32_reg RCC_CIR] } msg ] { - error $msg - } - -} - -proc show_RCC_APB2RSTR { } { - if [ catch { set val [ show_mmr32_reg RCC_APB2RSTR] } msg ] { - error $msg - } - for { set x 0 } { $x < 32 } { incr x } { - set bits($x) xxx - } - set bits(15) adc3 - set bits(14) usart1 - set bits(13) tim8 - set bits(12) spi1 - set bits(11) tim1 - set bits(10) adc2 - set bits(9) adc1 - set bits(8) iopg - set bits(7) iopf - set bits(6) iope - set bits(5) iopd - set bits(4) iopc - set bits(3) iopb - set bits(2) iopa - set bits(1) xxx - set bits(0) afio - show_mmr32_bits bits $val -} - -proc show_RCC_APB1RSTR { } { - if [ catch { set val [ show_mmr32_reg RCC_APB1RSTR] } msg ] { - error $msg - } - set bits(31) xxx - set bits(30) xxx - set bits(29) dac - set bits(28) pwr - set bits(27) bkp - set bits(26) xxx - set bits(25) can - set bits(24) xxx - set bits(23) usb - set bits(22) i2c2 - set bits(21) i2c1 - set bits(20) uart5 - set bits(19) uart4 - set bits(18) uart3 - set bits(17) uart2 - set bits(16) xxx - set bits(15) spi3 - set bits(14) spi2 - set bits(13) xxx - set bits(12) xxx - set bits(11) wwdg - set bits(10) xxx - set bits(9) xxx - set bits(8) xxx - set bits(7) xxx - set bits(6) xxx - set bits(5) tim7 - set bits(4) tim6 - set bits(3) tim5 - set bits(2) tim4 - set bits(1) tim3 - set bits(0) tim2 - show_mmr32_bits bits $val - -} - -proc show_RCC_AHBENR { } { - if [ catch { set val [ show_mmr32_reg RCC_AHBENR ] } msg ] { - error $msg - } - set bits(31) xxx - set bits(30) xxx - set bits(29) xxx - set bits(28) xxx - set bits(27) xxx - set bits(26) xxx - set bits(25) xxx - set bits(24) xxx - set bits(23) xxx - set bits(22) xxx - set bits(21) xxx - set bits(20) xxx - set bits(19) xxx - set bits(18) xxx - set bits(17) xxx - set bits(16) xxx - set bits(15) xxx - set bits(14) xxx - set bits(13) xxx - set bits(12) xxx - set bits(11) xxx - set bits(10) sdio - set bits(9) xxx - set bits(8) fsmc - set bits(7) xxx - set bits(6) crce - set bits(5) xxx - set bits(4) flitf - set bits(3) xxx - set bits(2) sram - set bits(1) dma2 - set bits(0) dma1 - show_mmr32_bits bits $val -} - -proc show_RCC_APB2ENR { } { - if [ catch { set val [ show_mmr32_reg RCC_APB2ENR ] } msg ] { - error $msg - } - set bits(31) xxx - set bits(30) xxx - set bits(29) xxx - set bits(28) xxx - set bits(27) xxx - set bits(26) xxx - set bits(25) xxx - set bits(24) xxx - set bits(23) xxx - set bits(22) xxx - set bits(21) xxx - set bits(20) xxx - set bits(19) xxx - set bits(18) xxx - set bits(17) xxx - set bits(16) xxx - set bits(15) adc3 - set bits(14) usart1 - set bits(13) tim8 - set bits(12) spi1 - set bits(11) tim1 - set bits(10) adc2 - set bits(9) adc1 - set bits(8) iopg - set bits(7) iopf - set bits(6) iope - set bits(5) iopd - set bits(4) iopc - set bits(3) iopb - set bits(2) iopa - set bits(1) xxx - set bits(0) afio - show_mmr32_bits bits $val - -} - -proc show_RCC_APB1ENR { } { - if [ catch { set val [ show_mmr32_reg RCC_APB1ENR ] } msg ] { - error $msg - } - set bits(31) xxx - set bits(30) xxx - set bits(29) dac - set bits(28) pwr - set bits(27) bkp - set bits(26) xxx - set bits(25) can - set bits(24) xxx - set bits(23) usb - set bits(22) i2c2 - set bits(21) i2c1 - set bits(20) usart5 - set bits(19) usart4 - set bits(18) usart3 - set bits(17) usart2 - set bits(16) xxx - set bits(15) spi3 - set bits(14) spi2 - set bits(13) xxx - set bits(12) xxx - set bits(11) wwdg - set bits(10) xxx - set bits(9) xxx - set bits(8) xxx - set bits(7) xxx - set bits(6) xxx - set bits(5) tim7 - set bits(4) tim6 - set bits(3) tim5 - set bits(2) tim4 - set bits(1) tim3 - set bits(0) tim2 - show_mmr32_bits bits $val -} - -proc show_RCC_BDCR { } { - if [ catch { set val [ show_mmr32_reg RCC_BDCR ] } msg ] { - error $msg - } - for { set x 0 } { $x < 32 } { incr x } { - set bits($x) xxx - } - set bits(0) lseon - set bits(1) lserdy - set bits(2) lsebyp - set bits(8) rtcsel0 - set bits(9) rtcsel1 - set bits(15) rtcen - set bits(16) bdrst - show_mmr32_bits bits $val -} - -proc show_RCC_CSR { } { - if [ catch { set val [ show_mmr32_reg RCC_CSR ] } msg ] { - error $msg - } - for { set x 0 } { $x < 32 } { incr x } { - set bits($x) xxx - } - set bits(0) lsion - set bits(1) lsirdy - set bits(24) rmvf - set bits(26) pin - set bits(27) por - set bits(28) sft - set bits(29) iwdg - set bits(30) wwdg - set bits(31) lpwr - show_mmr32_bits bits $val -} - -proc show_RCC { } { - - show_RCC_CR - show_RCC_CFGR - show_RCC_CIR - show_RCC_APB2RSTR - show_RCC_APB1RSTR - show_RCC_AHBENR - show_RCC_APB2ENR - show_RCC_APB1ENR - show_RCC_BDCR - show_RCC_CSR -} diff --git a/src/tcl/chip/st/stm32/stm32_regs.tcl b/src/tcl/chip/st/stm32/stm32_regs.tcl deleted file mode 100644 index 0c1f6257..00000000 --- a/src/tcl/chip/st/stm32/stm32_regs.tcl +++ /dev/null @@ -1,95 +0,0 @@ -# /* Peripheral and SRAM base address in the alias region */ -set PERIPH_BB_BASE 0x42000000 -set SRAM_BB_BASE 0x22000000 - -# /*Peripheral and SRAM base address in the bit-band region */ -set SRAM_BASE 0x20000000 -set PERIPH_BASE 0x40000000 - -# /*FSMC registers base address */ -set FSMC_R_BASE 0xA0000000 - -# /*Peripheral memory map */ -set APB1PERIPH_BASE [set PERIPH_BASE] -set APB2PERIPH_BASE [expr $PERIPH_BASE + 0x10000] -set AHBPERIPH_BASE [expr $PERIPH_BASE + 0x20000] - -set TIM2_BASE [expr $APB1PERIPH_BASE + 0x0000] -set TIM3_BASE [expr $APB1PERIPH_BASE + 0x0400] -set TIM4_BASE [expr $APB1PERIPH_BASE + 0x0800] -set TIM5_BASE [expr $APB1PERIPH_BASE + 0x0C00] -set TIM6_BASE [expr $APB1PERIPH_BASE + 0x1000] -set TIM7_BASE [expr $APB1PERIPH_BASE + 0x1400] -set RTC_BASE [expr $APB1PERIPH_BASE + 0x2800] -set WWDG_BASE [expr $APB1PERIPH_BASE + 0x2C00] -set IWDG_BASE [expr $APB1PERIPH_BASE + 0x3000] -set SPI2_BASE [expr $APB1PERIPH_BASE + 0x3800] -set SPI3_BASE [expr $APB1PERIPH_BASE + 0x3C00] -set USART2_BASE [expr $APB1PERIPH_BASE + 0x4400] -set USART3_BASE [expr $APB1PERIPH_BASE + 0x4800] -set UART4_BASE [expr $APB1PERIPH_BASE + 0x4C00] -set UART5_BASE [expr $APB1PERIPH_BASE + 0x5000] -set I2C1_BASE [expr $APB1PERIPH_BASE + 0x5400] -set I2C2_BASE [expr $APB1PERIPH_BASE + 0x5800] -set CAN_BASE [expr $APB1PERIPH_BASE + 0x6400] -set BKP_BASE [expr $APB1PERIPH_BASE + 0x6C00] -set PWR_BASE [expr $APB1PERIPH_BASE + 0x7000] -set DAC_BASE [expr $APB1PERIPH_BASE + 0x7400] - -set AFIO_BASE [expr $APB2PERIPH_BASE + 0x0000] -set EXTI_BASE [expr $APB2PERIPH_BASE + 0x0400] -set GPIOA_BASE [expr $APB2PERIPH_BASE + 0x0800] -set GPIOB_BASE [expr $APB2PERIPH_BASE + 0x0C00] -set GPIOC_BASE [expr $APB2PERIPH_BASE + 0x1000] -set GPIOD_BASE [expr $APB2PERIPH_BASE + 0x1400] -set GPIOE_BASE [expr $APB2PERIPH_BASE + 0x1800] -set GPIOF_BASE [expr $APB2PERIPH_BASE + 0x1C00] -set GPIOG_BASE [expr $APB2PERIPH_BASE + 0x2000] -set ADC1_BASE [expr $APB2PERIPH_BASE + 0x2400] -set ADC2_BASE [expr $APB2PERIPH_BASE + 0x2800] -set TIM1_BASE [expr $APB2PERIPH_BASE + 0x2C00] -set SPI1_BASE [expr $APB2PERIPH_BASE + 0x3000] -set TIM8_BASE [expr $APB2PERIPH_BASE + 0x3400] -set USART1_BASE [expr $APB2PERIPH_BASE + 0x3800] -set ADC3_BASE [expr $APB2PERIPH_BASE + 0x3C00] - -set SDIO_BASE [expr $PERIPH_BASE + 0x18000] - -set DMA1_BASE [expr $AHBPERIPH_BASE + 0x0000] -set DMA1_Channel1_BASE [expr $AHBPERIPH_BASE + 0x0008] -set DMA1_Channel2_BASE [expr $AHBPERIPH_BASE + 0x001C] -set DMA1_Channel3_BASE [expr $AHBPERIPH_BASE + 0x0030] -set DMA1_Channel4_BASE [expr $AHBPERIPH_BASE + 0x0044] -set DMA1_Channel5_BASE [expr $AHBPERIPH_BASE + 0x0058] -set DMA1_Channel6_BASE [expr $AHBPERIPH_BASE + 0x006C] -set DMA1_Channel7_BASE [expr $AHBPERIPH_BASE + 0x0080] -set DMA2_BASE [expr $AHBPERIPH_BASE + 0x0400] -set DMA2_Channel1_BASE [expr $AHBPERIPH_BASE + 0x0408] -set DMA2_Channel2_BASE [expr $AHBPERIPH_BASE + 0x041C] -set DMA2_Channel3_BASE [expr $AHBPERIPH_BASE + 0x0430] -set DMA2_Channel4_BASE [expr $AHBPERIPH_BASE + 0x0444] -set DMA2_Channel5_BASE [expr $AHBPERIPH_BASE + 0x0458] -set RCC_BASE [expr $AHBPERIPH_BASE + 0x1000] -set CRC_BASE [expr $AHBPERIPH_BASE + 0x3000] - -# /*Flash registers base address */ -set FLASH_R_BASE [expr $AHBPERIPH_BASE + 0x2000] -# /*Flash Option Bytes base address */ -set OB_BASE 0x1FFFF800 - -# /*FSMC Bankx registers base address */ -set FSMC_Bank1_R_BASE [expr $FSMC_R_BASE + 0x0000] -set FSMC_Bank1E_R_BASE [expr $FSMC_R_BASE + 0x0104] -set FSMC_Bank2_R_BASE [expr $FSMC_R_BASE + 0x0060] -set FSMC_Bank3_R_BASE [expr $FSMC_R_BASE + 0x0080] -set FSMC_Bank4_R_BASE [expr $FSMC_R_BASE + 0x00A0] - -# /*Debug MCU registers base address */ -set DBGMCU_BASE 0xE0042000 - -# /*System Control Space memory map */ -set SCS_BASE 0xE000E000 - -set SysTick_BASE [expr $SCS_BASE + 0x0010] -set NVIC_BASE [expr $SCS_BASE + 0x0100] -set SCB_BASE [expr $SCS_BASE + 0x0D00] -- cgit v1.2.3