diff options
Diffstat (limited to 'circuit/fridge-lock.dsn')
| -rw-r--r-- | circuit/fridge-lock.dsn | 539 |
1 files changed, 539 insertions, 0 deletions
diff --git a/circuit/fridge-lock.dsn b/circuit/fridge-lock.dsn new file mode 100644 index 0000000..f3f56aa --- /dev/null +++ b/circuit/fridge-lock.dsn @@ -0,0 +1,539 @@ +(pcb "/home/trygvis/dev/no.bitraf/fridge-lock/circuit/fridge-lock.dsn" + (parser + (string_quote ") + (space_in_quoted_tokens on) + (host_cad "Kicad's PCBNEW") + (host_version "(2010-03-14)-final") + ) + (resolution mil 10) + (unit mil) + (structure + (layer Front + (type signal) + (property + (index 0) + ) + ) + (layer Back + (type signal) + (property + (index 1) + ) + ) + (boundary + (path pcb 0 1900 -1250 1900 -4900 4250 -4900 4250 -1250 1900 -1250) + ) + (via "Via[0-1]_47.2:25_mil" "Via[0-1]_47.2:0_mil") + (rule + (width 15.7) + (clearance 8) + (clearance 8 (type default_smd)) + (clearance 1.975 (type smd_smd)) + ) + ) + (placement + (component "connect-CLAMP-02" + (place P4 4040 -1480 front 270 (PN CONN_2)) + ) + (component "crystal-HC49UP" + (place X1 3840 -2880 front 0 (PN CRYSTAL)) + ) + (component "DIP-6__300_ELL" + (place OK1 3840 -2045 front 0 (PN MOC3023M)) + ) + (component "molex-microusb" + (place J1 2260 -1320 front 270 (PN USB)) + ) + (component pin_array_3x2 + (place P3 2840 -1860 front 180 (PN ISP)) + ) + (component SM1206 + (place R7 3420 -1760 front 0 (PN 39)) + (place R6 3420 -1880 front 0 (PN 330)) + (place R5 3500 -2200 front 180 (PN 220)) + (place R4 2240 -2620 front 0 (PN 10k)) + (place R3 2240 -1700 front 90 (PN 22)) + (place R2 2120 -1700 front 90 (PN 22)) + (place C7 3660 -1760 front 0 (PN 10n)) + (place C6 4020 -2480 front 180 (PN 100n)) + (place C5 4020 -2640 front 180 (PN 18p)) + (place C4 3680 -2640 front 0 (PN 18p)) + (place C1 2240 -2780 front 0 (PN 1u)) + ) + (component SM1206POL + (place C3 3680 -2480 front 180 (PN 10u)) + ) + (component SO8E + (place U2 3140 -2700 front 270 (PN LM75)) + ) + (component TQFP32 + (place U1 2480 -2220 front 90 (PN AT90USB162)) + ) + (component pin_array_4x2 + (place P2 3180 -2240 front 270 (PN EXPANSION)) + ) + (component "TO220-TRIAC" + (place U3 3280 -1520 front 180 (PN TRIAC)) + ) + ) + (library + (image "connect-CLAMP-02" + (outline (path signal 5 197 200 197 -200)) + (outline (path signal 5 -197 200 -197 -200)) + (outline (path signal 5 -197 200 197 200)) + (outline (path signal 5 197 -200 -197 -200)) + (outline (path signal 5 -48 52 -165 -35)) + (outline (path signal 5 -35 35 -153 -52)) + (outline (path signal 20 -50 35 -150 -35)) + (outline (path signal 10 -40 36 -49 46)) + (outline (path signal 10 -152 -46 -159 -37)) + (outline (path signal 5 48 52 135 -65)) + (outline (path signal 5 65 65 152 -53)) + (outline (path signal 20 65 50 135 -50)) + (outline (path signal 10 64 60 54 50.9)) + (outline (path signal 10 146 -52 137 -59)) + (outline (path signal 2 -165 180 195 180)) + (outline (path signal 2 -170 160 195 160)) + (outline (path signal 2 -180 140 195 140)) + (outline (path signal 2 -165 -180 195 -180)) + (outline (path signal 2 -170 -160 195 -160)) + (outline (path signal 2 -180 -140 195 -140)) + (outline (path signal 2 195 -120 -190 -120)) + (outline (path signal 2 -190 120 195 120)) + (outline (path signal 2.5 -47 0 -49.6 -16.3 -57.1 -31.1 -68.9 -42.9 -83.7 -50.4 + -100 -53 -116.3 -50.4 -131.1 -42.9 -142.9 -31.1 -150.4 -16.3 + -153 0 -150.4 16.3 -142.9 31.1 -131.1 42.9 -116.3 50.4 -100 53 + -83.7 50.4 -68.9 42.9 -57.1 31.1 -49.6 16.3)) + (outline (path signal 2.5 153 0 150.4 -16.3 142.9 -31.1 131.1 -42.9 116.3 -50.4 + 100 -53 83.7 -50.4 68.9 -42.9 57.1 -31.1 49.6 -16.3 47 0 + 49.6 16.3 57.1 31.1 68.9 42.9 83.7 50.4 100 53 116.3 50.4 + 131.1 42.9 142.9 31.1 150.4 16.3)) + (pin Round[TB]Pad_90_mil 1 -100 0) + (pin Round[TB]Pad_90_mil 2 100 0) + ) + (image "crystal-HC49UP" + (outline (path signal 2.6 -260 -120 260 -120)) + (outline (path signal 2.6 260 -120 260 120)) + (outline (path signal 2.6 -260 120 260 120)) + (outline (path signal 2.6 -260 -120 -260 120)) + (outline (path signal 6 -225 45 -225 85)) + (outline (path signal 6 225 45 225 85)) + (outline (path signal 2 135 -50 -135 -50)) + (outline (path signal 2 135 -80 -135 -80)) + (outline (path signal 2 -135 50 135 50)) + (outline (path signal 6 215 -95 -215 -95)) + (outline (path signal 6 225 -15 255 -15)) + (outline (path signal 6 225 15 255 15)) + (outline (path signal 6 255 -15 255 15)) + (outline (path signal 6 225 -45 225 45)) + (outline (path signal 6 225 -85 225 -45)) + (outline (path signal 6 -255 -15 -255 15)) + (outline (path signal 6 -225 -45 -225 -15)) + (outline (path signal 6 -225 -15 -225 15)) + (outline (path signal 6 -225 15 -225 45)) + (outline (path signal 6 -225 -85 -225 -45)) + (outline (path signal 6 -225 -15 -255 -15)) + (outline (path signal 6 -225 15 -255 15)) + (outline (path signal 2 -135 80 135 80)) + (outline (path signal 6 215 95 -215 95)) + (outline (path signal 6 -10 25 -10 -25)) + (outline (path signal 6 -10 -25 10 -25)) + (outline (path signal 6 10 -25 10 25)) + (outline (path signal 6 10 25 -10 25)) + (outline (path signal 6 -25 25 -25 0)) + (outline (path signal 6 -25 0 -25 -25)) + (outline (path signal 2 -25 0 -40 0)) + (outline (path signal 6 25 25 25 0)) + (outline (path signal 6 25 0 25 -25)) + (outline (path signal 2 25 0 40 0)) + (pin Rect[T]Pad_210x76_mil 1 -190 0) + (pin Rect[T]Pad_210x76_mil 2 190 0) + ) + (image "DIP-6__300_ELL" + (outline (path signal 15 -175 100 175 100)) + (outline (path signal 15 175 100 175 -100)) + (outline (path signal 15 175 -100 -175 -100)) + (outline (path signal 15 -175 -100 -175 100)) + (outline (path signal 15 -175 25 -125 25)) + (outline (path signal 15 -125 25 -125 -25)) + (outline (path signal 15 -125 -25 -175 -25)) + (pin Rect[A]Pad_62x90_mil 1 -100 -150) + (pin Oval[A]Pad_62x90_mil 2 0 -150) + (pin Oval[A]Pad_62x90_mil 3 100 -150) + (pin Oval[A]Pad_62x90_mil 4 100 150) + (pin Oval[A]Pad_62x90_mil 5 0 150) + (pin Oval[A]Pad_62x90_mil 6 -100 150) + ) + (image "molex-microusb" + (outline (path signal 5 -58.7 -280.7 -58.7 -294.9)) + (outline (path signal 5 -58.7 61 -58.7 74.8)) + (outline (path signal 5 -85 60.2 -85 -281.5)) + (outline (path signal 5 -58.7 60.2 -58.7 -279.1)) + (pin Rect[T]Pad_54.3x15.7_mil @1 104.6 -139) + (pin Rect[T]Pad_54.3x15.7_mil 3 104.6 -113.4) + (pin Rect[T]Pad_82.7x47.3_mil @2 90.3 -16.4) + (pin Rect[T]Pad_54.3x15.7_mil 1 104.5 -62.2) + (pin Rect[T]Pad_82.7x47.2_mil @3 90.3 -210.2) + (pin Rect[T]Pad_74.8x93.3_mil @4 -0.1 -227.9) + (pin Rect[T]Pad_74.8x93.3_mil @5 -0.1 1.3) + (pin Rect[T]Pad_74.8x46.3_mil @6 -0.1 -80.2) + (pin Rect[T]Pad_74.8x46.3_mil @7 -0.1 -146.4) + (pin Rect[T]Pad_54.3x15.7_mil 2 104.6 -87.8) + (pin Rect[T]Pad_54.3x15.7_mil 5 104.6 -164.6) + ) + (image pin_array_3x2 + (outline (path signal 8 150 -100 -150 -100)) + (outline (path signal 8 -150 100 150 100)) + (outline (path signal 8 150 100 150 -100)) + (outline (path signal 8 -150 -100 -150 100)) + (pin Rect[A]Pad_60x60_mil 1 -100 -50) + (pin Round[A]Pad_60_mil 2 -100 50) + (pin Round[A]Pad_60_mil 3 0 -50) + (pin Round[A]Pad_60_mil 4 0 50) + (pin Round[A]Pad_60_mil 5 100 -50) + (pin Round[A]Pad_60_mil 6 100 50) + ) + (image SM1206 + (outline (path signal 5 -100 45 -100 -45)) + (outline (path signal 5 -100 -45 -35 -45)) + (outline (path signal 5 35 45 100 45)) + (outline (path signal 5 100 45 100 -45)) + (outline (path signal 5 100 -45 35 -45)) + (outline (path signal 5 -35 45 -100 45)) + (pin Rect[T]Pad_60x80_mil 1 -65 0) + (pin Rect[T]Pad_60x80_mil 2 65 0) + ) + (image SM1206POL + (outline (path signal 5 -100 45 -110 45)) + (outline (path signal 5 -110 45 -110 -45)) + (outline (path signal 5 -110 -45 -100 -45)) + (outline (path signal 5 -100 45 -100 -45)) + (outline (path signal 5 -100 -45 -35 -45)) + (outline (path signal 5 35 45 100 45)) + (outline (path signal 5 100 45 100 -45)) + (outline (path signal 5 100 -45 35 -45)) + (outline (path signal 5 -35 45 -100 45)) + (pin Rect[T]Pad_60x80_mil 1 -65 0) + (pin Rect[T]Pad_60x80_mil 2 65 0) + ) + (image SO8E + (outline (path signal 5 -105 -70 -105 -75)) + (outline (path signal 5 -105 -75 105 -75)) + (outline (path signal 5 105 75 -105 75)) + (outline (path signal 5 -105 75 -105 -70)) + (outline (path signal 5 -105 20 -85 20)) + (outline (path signal 5 -85 20 -85 -20)) + (outline (path signal 5 -85 -20 -105 -20)) + (outline (path signal 5 105 75 105 -75)) + (pin Rect[T]Pad_20x45_mil 8 -75 105) + (pin Rect[T]Pad_20x45_mil 1 -75 -105) + (pin Rect[T]Pad_20x45_mil 7 -25 105) + (pin Rect[T]Pad_20x45_mil 6 25 105) + (pin Rect[T]Pad_20x45_mil 5 75 105) + (pin Rect[T]Pad_20x45_mil 2 -25 -105) + (pin Rect[T]Pad_20x45_mil 3 25 -105) + (pin Rect[T]Pad_20x45_mil 4 75 -105) + ) + (image TQFP32 + (outline (path signal 6 198 -109 153 -109)) + (outline (path signal 6 198 109 154 109)) + (outline (path signal 6 198 -109 198 109)) + (outline (path signal 6 110 -156 110 -199)) + (outline (path signal 6 -111 -157 -111 -199)) + (outline (path signal 6 -112 -199 110 -200)) + (outline (path signal 6 -110 198 107 199)) + (outline (path signal 6 -153 129 -153 -154)) + (outline (path signal 6 108 198 108 157)) + (outline (path signal 6 -128 153 150 153)) + (outline (path signal 6 152 -155 152 149)) + (outline (path signal 6 -153 -155 147 -155)) + (outline (path signal 6 -198 112 -198 -110)) + (outline (path signal 6 -198 -110 -153 -110)) + (outline (path signal 6 -152.6 130 -129.6 153)) + (outline (path signal 6 -197.8 112 -152.6 112)) + (outline (path signal 6 -110 153 -110 198.2)) + (outline (path signal 6 -93 112.6 -93.9 106.8 -96.6 101.6 -100.8 97.4 -106 94.7 + -111.8 93.8 -117.6 94.7 -122.8 97.4 -127 101.6 -129.7 106.8 + -130.6 112.6 -129.7 118.4 -127 123.6 -122.8 127.8 -117.6 130.5 + -111.8 131.4 -106 130.5 -100.8 127.8 -96.6 123.6 -93.9 118.4)) + (pin Rect[T]Pad_78.7x17.7_mil 8 -189.6 -109.3) + (pin Rect[T]Pad_78.7x17.7_mil 7 -189.6 -77.8) + (pin Rect[T]Pad_78.7x17.7_mil 6 -189.6 -46.3) + (pin Rect[T]Pad_78.7x17.7_mil 5 -189.6 -14.8) + (pin Rect[T]Pad_78.7x17.7_mil 4 -189.6 16.7) + (pin Rect[T]Pad_78.7x17.7_mil 3 -189.6 48.2) + (pin Rect[T]Pad_78.7x17.7_mil 2 -189.6 79.7) + (pin Rect[T]Pad_78.7x17.7_mil 1 -189.6 111.2) + (pin Rect[T]Pad_78.7x17.7_mil 24 187 111) + (pin Rect[T]Pad_78.7x17.7_mil 17 187 -110) + (pin Rect[T]Pad_78.7x17.7_mil 18 187 -78) + (pin Rect[T]Pad_78.7x17.7_mil 19 187 -46) + (pin Rect[T]Pad_78.7x17.7_mil 20 187 -15) + (pin Rect[T]Pad_78.7x17.7_mil 21 187 17) + (pin Rect[T]Pad_78.7x17.7_mil 22 187 48) + (pin Rect[T]Pad_78.7x17.7_mil 23 187 80) + (pin Rect[T]Pad_17.7x78.7_mil 32 -111.2 190) + (pin Rect[T]Pad_17.7x78.7_mil 31 -79.8 190) + (pin Rect[T]Pad_17.7x78.7_mil 30 -48.2 190) + (pin Rect[T]Pad_17.7x78.7_mil 29 -16.8 190) + (pin Rect[T]Pad_17.7x78.7_mil 28 14.8 190) + (pin Rect[T]Pad_17.7x78.7_mil 27 46.2 190) + (pin Rect[T]Pad_17.7x78.7_mil 26 77.8 190) + (pin Rect[T]Pad_17.7x78.7_mil 25 109.2 190) + (pin Rect[T]Pad_17.7x78.7_mil 9 -111 -188) + (pin Rect[T]Pad_17.7x78.7_mil 10 -80 -188) + (pin Rect[T]Pad_17.7x78.7_mil 11 -48 -188) + (pin Rect[T]Pad_17.7x78.7_mil 12 -17 -188) + (pin Rect[T]Pad_17.7x78.7_mil 13 14 -188) + (pin Rect[T]Pad_17.7x78.7_mil 14 46 -188) + (pin Rect[T]Pad_17.7x78.7_mil 15 78 -188) + (pin Rect[T]Pad_17.7x78.7_mil 16 110 -188) + ) + (image pin_array_4x2 + (outline (path signal 12 -200 100 200 100)) + (outline (path signal 12 200 100 200 -100)) + (outline (path signal 12 200 -100 -200 -100)) + (outline (path signal 12 -200 -100 -200 100)) + (pin Rect[A]Pad_60x60_mil 1 -150 -50) + (pin Round[A]Pad_60_mil 2 -150 50) + (pin Round[A]Pad_60_mil 3 -50 -50) + (pin Round[A]Pad_60_mil 4 -50 50) + (pin Round[A]Pad_60_mil 5 50 -50) + (pin Round[A]Pad_60_mil 6 50 50) + (pin Round[A]Pad_60_mil 7 150 -50) + (pin Round[A]Pad_60_mil 8 150 50) + ) + (image "TO220-TRIAC" + (outline (path signal 12 0 100 200 100)) + (outline (path signal 12 0 0 200 0)) + (outline (path signal 12 0 -100 200 -100)) + (outline (path signal 12 200 -200 800 -200)) + (outline (path signal 12 800 -200 800 200)) + (outline (path signal 12 800 200 200 200)) + (outline (path signal 12 200 200 200 -200)) + (outline (path signal 12 500 -150 500 200)) + (outline (path signal 12 500 -150 500 -200)) + (pin Rect[A]Pad_90x90_mil 3 0 -100) + (pin Round[A]Pad_90_mil 1 0 100) + (pin Round[A]Pad_90_mil 2 0 0) + (pin Rect[A]Pad_350x350_mil 4 650 0) + ) + (padstack Round[A]Pad_60_mil + (shape (circle Front 60)) + (shape (circle Back 60)) + (attach off) + ) + (padstack Round[A]Pad_90_mil + (shape (circle Front 90)) + (shape (circle Back 90)) + (attach off) + ) + (padstack Round[TB]Pad_90_mil + (shape (circle Front 90)) + (shape (circle Back 90)) + (attach off) + ) + (padstack Oval[A]Pad_62x90_mil + (shape (path Front 62 0 -14 0 14)) + (shape (path Back 62 0 -14 0 14)) + (attach off) + ) + (padstack Rect[T]Pad_20x45_mil + (shape (rect Front -10 -22.5 10 22.5)) + (attach off) + ) + (padstack Rect[T]Pad_210x76_mil + (shape (rect Front -105 -38 105 38)) + (attach off) + ) + (padstack Rect[A]Pad_350x350_mil + (shape (rect Front -175 -175 175 175)) + (shape (rect Back -175 -175 175 175)) + (attach off) + ) + (padstack Rect[T]Pad_54.3x15.7_mil + (shape (rect Front -27.15 -7.85 27.15 7.85)) + (attach off) + ) + (padstack Rect[A]Pad_60x60_mil + (shape (rect Front -30 -30 30 30)) + (shape (rect Back -30 -30 30 30)) + (attach off) + ) + (padstack Rect[T]Pad_60x80_mil + (shape (rect Front -30 -40 30 40)) + (attach off) + ) + (padstack Rect[A]Pad_62x90_mil + (shape (rect Front -31 -45 31 45)) + (shape (rect Back -31 -45 31 45)) + (attach off) + ) + (padstack Rect[T]Pad_74.8x46.3_mil + (shape (rect Front -37.4 -23.15 37.4 23.15)) + (attach off) + ) + (padstack Rect[T]Pad_74.8x93.3_mil + (shape (rect Front -37.4 -46.65 37.4 46.65)) + (attach off) + ) + (padstack Rect[T]Pad_78.7x17.7_mil + (shape (rect Front -39.35 -8.85 39.35 8.85)) + (attach off) + ) + (padstack Rect[T]Pad_82.7x47.2_mil + (shape (rect Front -41.35 -23.6 41.35 23.6)) + (attach off) + ) + (padstack Rect[T]Pad_82.7x47.3_mil + (shape (rect Front -41.35 -23.65 41.35 23.65)) + (attach off) + ) + (padstack Rect[A]Pad_90x90_mil + (shape (rect Front -45 -45 45 45)) + (shape (rect Back -45 -45 45 45)) + (attach off) + ) + (padstack Rect[T]Pad_17.7x78.7_mil + (shape (rect Front -8.85 -39.35 8.85 39.35)) + (attach off) + ) + (padstack "Via[0-1]_47.2:25_mil" + (shape (circle Front 47.2)) + (shape (circle Back 47.2)) + (attach off) + ) + (padstack "Via[0-1]_47.2:0_mil" + (shape (circle Front 47.2)) + (shape (circle Back 47.2)) + (attach off) + ) + ) + (network + (net /hot1 + (pins P4-1 R7-1 R6-1 U3-2) + ) + (net /hot2 + (pins P4-2 C7-2 U3-1) + ) + (net GND + (pins OK1-2 J1-5 P3-6 C6-2 C5-2 C4-2 C3-2 U2-8 U2-7 U2-6 U2-4 U1-3 U1-28 P2-1 + C1-2) + ) + (net "N-000011" + (pins OK1-6 R6-2) + ) + (net "N-000013" + (pins OK1-1 R5-1) + ) + (net "N-000014" + (pins OK1-4 U3-3) + ) + (net "N-000018" + (pins U2-1 U1-7) + ) + (net "N-000020" + (pins U1-10 P2-6) + ) + (net "N-000021" + (pins U2-2 U1-6) + ) + (net "N-000022" + (pins X1-1 C4-1 U1-1) + ) + (net "N-000023" + (pins U1-27 C1-1) + ) + (net "N-000024" + (pins J1-3 R2-2) + ) + (net "N-000025" + (pins J1-2 R3-2) + ) + (net "N-000026" + (pins R2-1 U1-29) + ) + (net "N-000027" + (pins R3-1 U1-30) + ) + (net "N-000028" + (pins P3-1 U1-17) + ) + (net "N-000029" + (pins R5-2 U1-18) + ) + (net "N-000030" + (pins U1-12 P2-4) + ) + (net "N-000031" + (pins U1-14 P2-2) + ) + (net "N-000032" + (pins P3-5 R4-2 U1-24) + ) + (net "N-000033" + (pins P3-4 U1-16) + ) + (net "N-000034" + (pins P3-3 U1-15) + ) + (net "N-000035" + (pins U1-13 P2-3) + ) + (net "N-000036" + (pins U1-11 P2-5) + ) + (net "N-000037" + (pins U1-9 P2-7) + ) + (net "N-000038" + (pins R7-2 C7-1) + ) + (net "N-000039" + (pins X1-2 C5-1 U1-2) + ) + (net VCC + (pins J1-1 P3-2 R4-1 C6-1 C3-1 U2-5 U1-4 U1-31 P2-8) + ) + (class kicad_default "" GND "N-000011" "N-000013" "N-000014" "N-000018" + "N-000020" "N-000021" "N-000022" "N-000023" "N-000024" "N-000025" "N-000026" + "N-000027" "N-000028" "N-000029" "N-000030" "N-000031" "N-000032" "N-000033" + "N-000034" "N-000035" "N-000036" "N-000037" "N-000038" "N-000039" VCC + (circuit + (use_via Via[0-1]_47.2:25_mil) + ) + (rule + (width 15.7) + (clearance 8) + ) + ) + (class PWR /hot1 /hot2 + (circuit + (use_via Via[0-1]_47.2:25_mil) + ) + (rule + (width 80) + (clearance 8) + ) + ) + ) + (wiring + (wire (path Front 15.7 3355 -1760 3355 -1880)(net /hot1)(type protect)) + (wire (path Front 15.7 3280 -1520 3240 -1520)(net /hot1)(type protect)) + (wire (path Front 15.7 3220 -1760 3355 -1760)(net /hot1)(type protect)) + (wire (path Front 15.7 3180 -1720 3220 -1760)(net /hot1)(type protect)) + (wire (path Front 15.7 3180 -1580 3180 -1720)(net /hot1)(type protect)) + (wire (path Front 15.7 3240 -1520 3180 -1580)(net /hot1)(type protect)) + (wire (path Front 80 3280 -1520 3900 -1520 4040 -1380)(net /hot1)(type protect)) + (wire (path Front 15.7 3725 -1760 3860 -1760 4040 -1580)(net /hot2)(type protect)) + (wire (path Front 80 3280 -1620 4000 -1620 4040 -1580)(net /hot2)(type protect)) + (wire (path Front 15.7 3485 -1880 3725 -1880 3740 -1895)(net "N-000011")(type protect)) + (wire (path Front 15.7 3280 -1420 3420 -1280)(net "N-000014")(type protect)) + (wire (path Front 15.7 4085 -1895 3940 -1895)(net "N-000014")(type protect)) + (wire (path Front 15.7 4160 -1820 4085 -1895)(net "N-000014")(type protect)) + (wire (path Front 15.7 4160 -1360 4160 -1820)(net "N-000014")(type protect)) + (wire (path Front 15.7 4080 -1280 4160 -1360)(net "N-000014")(type protect)) + (wire (path Front 15.7 3420 -1280 4080 -1280)(net "N-000014")(type protect)) + (wire (path Front 15.7 3595 -1760 3485 -1760)(net "N-000038")(type protect)) + ) +) |