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author | Trygve Laugstøl <trygvis@inamo.no> | 2012-04-04 18:37:20 +0200 |
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committer | Trygve Laugstøl <trygvis@inamo.no> | 2012-04-04 18:37:20 +0200 |
commit | 2fbf53d7f5546fa467c84c129d49e3a76f5db9fd (patch) | |
tree | dea6b1e120533ae44af73eb8e56eeefa9b209d1f /firmware/VirtualSerial.c | |
parent | 3c548bf37a6e69acbde582218277e3170418b8d3 (diff) | |
download | bitraf-fridge-master.tar.gz bitraf-fridge-master.tar.bz2 bitraf-fridge-master.tar.xz bitraf-fridge-master.zip |
Diffstat (limited to 'firmware/VirtualSerial.c')
-rw-r--r-- | firmware/VirtualSerial.c | 88 |
1 files changed, 68 insertions, 20 deletions
diff --git a/firmware/VirtualSerial.c b/firmware/VirtualSerial.c index 05bff31..a88f473 100644 --- a/firmware/VirtualSerial.c +++ b/firmware/VirtualSerial.c @@ -84,10 +84,35 @@ USB_ClassInfo_CDC_Device_t VirtualSerial_CDC_Interface = */
static FILE USBSerialStream;
-#define LM74_SIO PD4
-#define LM74_SCL PD5
-#define LM74_CS PD3
-#define LM74_DBG PD6
+#define BOARD_REV 2
+
+#if (BOARD_REV == 1)
+ #define LM74_SIO PD4
+ #define LM74_SIO_PIN PIND
+ #define LM74_SIO_DDR DDRD
+ #define LM74_SCL PD5
+ #define LM74_SCL_PORT PORTD
+ #define LM74_SCL_DDR DDRD
+ #define LM74_CS PD3
+ #define LM74_CS_PORT PORTD
+ #define LM74_CS_DDR DDRD
+
+ #define LM74_DBG PD6
+ #define LM74_DBG_PORT PORTD
+ #define LM74_DBG_DDR DDRD
+#elif (BOARD_REV == 2)
+ #define LM74_SIO PD0
+ #define LM74_SIO_PIN PIND
+ #define LM74_SIO_DDR DDRD
+ #define LM74_SCL PC2
+ #define LM74_SCL_PORT PORTC
+ #define LM74_SCL_DDR DDRC
+ #define LM74_CS PD1
+ #define LM74_CS_PORT PORTD
+ #define LM74_CS_DDR DDRD
+#else
+ #error BOARD_REV has to be defined as 'A' or 'B'.
+#endif
/**
* Data is clocked out on the falling edge of the serial clock (SC), while data is clocked in on the rising edge of SC.
@@ -96,15 +121,15 @@ static int lm74_transaction(double *out) {
uint16_t tmp = 0;
- PORTD &= ~_BV(LM74_CS);
+ LM74_CS_PORT &= ~_BV(LM74_CS);
for(int i = 0; i < 16; i++) {
tmp <<= 1;
- PORTD |= _BV(LM74_SCL);
- if (PIND & (1 << LM74_SIO))
+ LM74_SCL_PORT |= _BV(LM74_SCL);
+ if (LM74_SIO_PIN & (1 << LM74_SIO))
tmp |= 1;
- PORTD &= ~_BV(LM74_SCL);
+ LM74_SCL_PORT &= ~_BV(LM74_SCL);
}
- PORTD |= _BV(LM74_CS);
+ LM74_CS_PORT |= _BV(LM74_CS);
/* Replay the data for debugging
PORTD &= ~_BV(LM74_CS);
@@ -135,12 +160,18 @@ static int lm74_transaction(double *out) static void lm74_init(void)
{
- PORTD |= (1 << LM74_SCL) | (1 << LM74_CS);
- PORTD |= (1 << LM74_DBG);
+ LM74_SCL_PORT |= (1 << LM74_SCL);
+ LM74_SCL_DDR |= (1 << LM74_SCL);
- DDRD |= (1 << LM74_SCL) | (1 << LM74_CS);
- DDRD |= (1 << LM74_DBG);
- DDRD &= ~(1 << LM74_SIO);
+ LM74_CS_PORT |= (1 << LM74_CS);
+ LM74_CS_DDR |= (1 << LM74_CS);
+
+ LM74_SIO_DDR &= ~(1 << LM74_SIO);
+
+#ifdef LM74_DBG_PORT
+ LM74_DBG_PORT |= (1 << LM74_DBG);
+ LM74_DBG_DDR |= (1 << LM74_DBG);
+#endif
}
static void temp_timer_setup(void)
@@ -158,22 +189,41 @@ static void temp_timer_setup(void) TIMSK1 = (1 << OCIE1A);
}
-/** Compressor
- *
+/**
+ * Compressor
*/
+static void compressor_init(void)
+{
+#if (BOARD_REV == 1)
+ DDRB |= (1 << PB4) | (1 << PB0);
+
+ PORTB |= 1 << PB4;
+#elif (BOARD_REV == 2)
+ DDRC |= 1 << PC5;
+ PORTC |= 1 << PC5;
+#endif
+}
+
static void start_compressor(void)
{
compressor_running = true;
+#if (BOARD_REV == 1)
PORTB |= 1 << PB4;
- PORTB |= 1 << PB0;
+#elif (BOARD_REV == 2)
+ PORTC |= 1 << PC5;
+#endif
}
static void stop_compressor(void)
{
compressor_running = false;
+#if (BOARD_REV == 1)
PORTB &= ~(1 << PB4);
PORTB &= ~(1 << PB0);
+#elif (BOARD_REV == 2)
+ PORTC &= ~(1 << PC5);
+#endif
}
/** Main program entry point. This routine contains the overall program flow, including initial
@@ -181,11 +231,9 @@ static void stop_compressor(void) */
int main(void)
{
- DDRB = 1 << PB0 | 1 << PB4 | 0 << PB5;
- PORTB = 0 << PB0;
-
SetupHardware();
lm74_init();
+ compressor_init();
target_temp = eeprom_read_float(&eeprom_target_temperature);
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