summaryrefslogtreecommitdiff
path: root/meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch
diff options
context:
space:
mode:
authorTomas Frydrych <tf@openedhand.com>2006-09-06 15:12:59 +0000
committerTomas Frydrych <tf@openedhand.com>2006-09-06 15:12:59 +0000
commite9b762802b039e8c19e70b054ecc64e7ab07e4d8 (patch)
treeb912494b2fc2845d4f9a67694b4120b2f585ed00 /meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch
parent8f47d85143c108040aa921b32aa9974b8edb0ba1 (diff)
downloadopenembedded-core-e9b762802b039e8c19e70b054ecc64e7ab07e4d8.tar.gz
openembedded-core-e9b762802b039e8c19e70b054ecc64e7ab07e4d8.tar.bz2
openembedded-core-e9b762802b039e8c19e70b054ecc64e7ab07e4d8.tar.xz
openembedded-core-e9b762802b039e8c19e70b054ecc64e7ab07e4d8.zip
configuration for csl2006q1-6 compiler and binutils
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@697 311d38ba-8fff-0310-9ca6-ca027cbcb966
Diffstat (limited to 'meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch')
-rw-r--r--meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch25
1 files changed, 25 insertions, 0 deletions
diff --git a/meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch b/meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch
new file mode 100644
index 000000000..9d16011a0
--- /dev/null
+++ b/meta/packages/binutils/binutils-2.17+csl-arm-2006q1-6/binutils-2.17-csl-tc-arm-mmxwc-polymorphism.patch
@@ -0,0 +1,25 @@
+--- binutils-2.17/gas/config/tc-arm.c.orig 2006-09-05 14:59:25.000000000 +0100
++++ binutils-2.17/gas/config/tc-arm.c 2006-09-05 14:59:25.000000000 +0100
+@@ -1252,13 +1252,15 @@
+ }
+
+ /* Undo polymorphism when a set of register types may be accepted. */
+- if ((type == REG_TYPE_NDQ
+- && (reg->type == REG_TYPE_NQ || reg->type == REG_TYPE_VFD))
+- || (type == REG_TYPE_VFSD
+- && (reg->type == REG_TYPE_VFS || reg->type == REG_TYPE_VFD))
+- || (type == REG_TYPE_NSDQ
+- && (reg->type == REG_TYPE_VFS || reg->type == REG_TYPE_VFD
+- || reg->type == REG_TYPE_NQ)))
++ if (((type == REG_TYPE_NDQ
++ && (reg->type == REG_TYPE_NQ || reg->type == REG_TYPE_VFD))
++ || (type == REG_TYPE_VFSD
++ && (reg->type == REG_TYPE_VFS || reg->type == REG_TYPE_VFD))
++ || (type == REG_TYPE_NSDQ
++ && (reg->type == REG_TYPE_VFS || reg->type == REG_TYPE_VFD
++ || reg->type == REG_TYPE_NQ)))
++ ||(type == REG_TYPE_MMXWC
++ && (reg->type == REG_TYPE_MMXWCG)))
+ type = reg->type;
+
+ if (type != reg->type)