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| author | Qing He <qing.he@intel.com> | 2010-08-19 13:32:07 +0800 |
|---|---|---|
| committer | Richard Purdie <rpurdie@linux.intel.com> | 2010-08-31 17:18:55 +0100 |
| commit | adfd0e04343ad7770642eadf07a7f9185be6e25d (patch) | |
| tree | 51888646c08a50095710f000ff83102a0f305b81 /meta/packages/boost/files/arm-intrinsics.patch | |
| parent | d1f7c3f9cc59477ef926c35eb980833d5a0246de (diff) | |
| download | openembedded-core-adfd0e04343ad7770642eadf07a7f9185be6e25d.tar.gz openembedded-core-adfd0e04343ad7770642eadf07a7f9185be6e25d.tar.bz2 openembedded-core-adfd0e04343ad7770642eadf07a7f9185be6e25d.tar.xz openembedded-core-adfd0e04343ad7770642eadf07a7f9185be6e25d.zip | |
boost: upgrade to 1.44.0
from version 1.36.0
which won't compile with gcc 4.5.0
also moved to meta form meta-moblin
changes:
- .so files should go to -dev instead of sub packages
- create libboostX-mt.{so,a} symlinks for compatibility
- meta package 'boost' should set ALLOW_EMPTY
- fix a bug that caused boost-dev being automatically renamed to
libboost_prg_exec_monitor-dev, packages boost, boost-dev and
boost-test now work as intended
- rebased patch arm-intrinsic
Signed-off-by: Qing He <qing.he@intel.com>
Diffstat (limited to 'meta/packages/boost/files/arm-intrinsics.patch')
| -rw-r--r-- | meta/packages/boost/files/arm-intrinsics.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/meta/packages/boost/files/arm-intrinsics.patch b/meta/packages/boost/files/arm-intrinsics.patch new file mode 100644 index 000000000..3f9c620eb --- /dev/null +++ b/meta/packages/boost/files/arm-intrinsics.patch @@ -0,0 +1,53 @@ +8/17/2010 - rebased to 1.44 by Qing He <qing.he@intel.com> + +diff --git a/boost/smart_ptr/detail/atomic_count_sync.hpp b/boost/smart_ptr/detail/atomic_count_sync.hpp +index b6359b5..78b1cc2 100644 +--- a/boost/smart_ptr/detail/atomic_count_sync.hpp ++++ b/boost/smart_ptr/detail/atomic_count_sync.hpp +@@ -33,17 +33,46 @@ public: + + long operator++() + { ++#ifdef __ARM_ARCH_7A__ ++ int v1, tmp; ++ asm volatile ("1: \n\t" ++ "ldrex %0, %1 \n\t" ++ "add %0 ,%0, #1 \n\t" ++ "strex %2, %0, %1 \n\t" ++ "cmp %2, #0 \n\t" ++ "bne 1b \n\t" ++ : "=&r" (v1), "+Q"(value_), "=&r"(tmp) ++ ); ++#else + return __sync_add_and_fetch( &value_, 1 ); ++#endif + } + + long operator--() + { ++#ifdef __ARM_ARCH_7A__ ++ int v1, tmp; ++ asm volatile ("1: \n\t" ++ "ldrex %0, %1 \n\t" ++ "sub %0 ,%0, #1 \n\t" ++ "strex %2, %0, %1 \n\t" ++ "cmp %2, #0 \n\t" ++ "bne 1b \n\t" ++ : "=&r" (v1), "+Q"(value_), "=&r"(tmp) ++ ); ++ return value_; ++#else + return __sync_add_and_fetch( &value_, -1 ); ++#endif + } + + operator long() const + { ++#if __ARM_ARCH_7A__ ++ return value_; ++#else + return __sync_fetch_and_add( &value_, 0 ); ++#endif + } + + private: |