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author | Marcin Juszkiewicz <hrw@openedhand.com> | 2008-03-04 16:33:10 +0000 |
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committer | Marcin Juszkiewicz <hrw@openedhand.com> | 2008-03-04 16:33:10 +0000 |
commit | 4c117c12857ff176faee157b49250e0a12895de7 (patch) | |
tree | 92839f106628019c1edafdf88a2e98fcaadcc1b8 /meta/packages/gcc/gcc-4.2.2/arm-crunch-neg.patch | |
parent | e14e1e23c42f61c40b3686c49907ea16fa4004a6 (diff) | |
download | openembedded-core-4c117c12857ff176faee157b49250e0a12895de7.tar.gz openembedded-core-4c117c12857ff176faee157b49250e0a12895de7.tar.bz2 openembedded-core-4c117c12857ff176faee157b49250e0a12895de7.tar.xz openembedded-core-4c117c12857ff176faee157b49250e0a12895de7.zip |
gcc: added 4.2.2 from OE
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@3902 311d38ba-8fff-0310-9ca6-ca027cbcb966
Diffstat (limited to 'meta/packages/gcc/gcc-4.2.2/arm-crunch-neg.patch')
-rw-r--r-- | meta/packages/gcc/gcc-4.2.2/arm-crunch-neg.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/meta/packages/gcc/gcc-4.2.2/arm-crunch-neg.patch b/meta/packages/gcc/gcc-4.2.2/arm-crunch-neg.patch new file mode 100644 index 000000000..f14ae0190 --- /dev/null +++ b/meta/packages/gcc/gcc-4.2.2/arm-crunch-neg.patch @@ -0,0 +1,30 @@ +WARNING: adding this patch causes copysign1.c and mzero3.c to fail... +diff -urN gcc-4.1.2/gcc/config/arm/arm.md-original gcc-4.1.2/gcc/config/arm/arm.md +--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-12 12:48:14.000000000 +1000 ++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-12 12:49:53.000000000 +1000 +@@ -2985,14 +2985,14 @@ + (define_expand "negsf2" + [(set (match_operand:SF 0 "s_register_operand" "") + (neg:SF (match_operand:SF 1 "s_register_operand" "")))] +- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" + "" + ) + + (define_expand "negdf2" + [(set (match_operand:DF 0 "s_register_operand" "") + (neg:DF (match_operand:DF 1 "s_register_operand" "")))] +- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" + "") + + ;; abssi2 doesn't really clobber the condition codes if a different register +@@ -4097,7 +4097,7 @@ + [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m") + (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))] + "TARGET_ARM +- && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP)) ++ && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP || TARGET_MAVERICK)) + && !TARGET_IWMMXT" + "* + switch (which_alternative) |