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author | Marcin Juszkiewicz <hrw@openedhand.com> | 2008-03-25 15:47:54 +0000 |
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committer | Marcin Juszkiewicz <hrw@openedhand.com> | 2008-03-25 15:47:54 +0000 |
commit | 85e3e7265be8389f65c52f4585ad9b4667c96dc2 (patch) | |
tree | b10bfe0154668dbf0a322f7a379bab1f549da6db /meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch | |
parent | c6422207156a33edaf2d8dd72a37ef2d7ce7e966 (diff) | |
download | openembedded-core-85e3e7265be8389f65c52f4585ad9b4667c96dc2.tar.gz openembedded-core-85e3e7265be8389f65c52f4585ad9b4667c96dc2.tar.bz2 openembedded-core-85e3e7265be8389f65c52f4585ad9b4667c96dc2.tar.xz openembedded-core-85e3e7265be8389f65c52f4585ad9b4667c96dc2.zip |
u-boot-mkimage-native: use 1.3.2 version instead of Openmoko patched version
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@4114 311d38ba-8fff-0310-9ca6-ca027cbcb966
Diffstat (limited to 'meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch')
-rw-r--r-- | meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch deleted file mode 100644 index 6efe24651..000000000 --- a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch +++ /dev/null @@ -1,45 +0,0 @@ -Index: u-boot/include/s3c2410.h -=================================================================== ---- u-boot.orig/include/s3c2410.h -+++ u-boot/include/s3c2410.h -@@ -233,4 +233,40 @@ static inline S3C2410_SDI * S3C2410_GetB - rINTPND;\ - } - /* Wait until rINTPND is changed for the case that the ISR is very short. */ -+ -+#define S3C2410_MISCCR_USBDEV (0<<3) -+#define S3C2410_MISCCR_USBHOST (1<<3) -+ -+#define S3C2410_MISCCR_CLK0_MPLL (0<<4) -+#define S3C2410_MISCCR_CLK0_UPLL (1<<4) -+#define S3C2410_MISCCR_CLK0_FCLK (2<<4) -+#define S3C2410_MISCCR_CLK0_HCLK (3<<4) -+#define S3C2410_MISCCR_CLK0_PCLK (4<<4) -+#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4) -+#define S3C2410_MISCCR_CLK0_MASK (7<<4) -+ -+#define S3C2410_MISCCR_CLK1_MPLL (0<<8) -+#define S3C2410_MISCCR_CLK1_UPLL (1<<8) -+#define S3C2410_MISCCR_CLK1_FCLK (2<<8) -+#define S3C2410_MISCCR_CLK1_HCLK (3<<8) -+#define S3C2410_MISCCR_CLK1_PCLK (4<<8) -+#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8) -+#define S3C2410_MISCCR_CLK1_MASK (7<<8) -+ -+#define S3C2410_MISCCR_USBSUSPND0 (1<<12) -+#define S3C2410_MISCCR_USBSUSPND1 (1<<13) -+ -+#define S3C2410_MISCCR_nRSTCON (1<<16) -+ -+#define S3C2410_MISCCR_nEN_SCLK0 (1<<17) -+#define S3C2410_MISCCR_nEN_SCLK1 (1<<18) -+#define S3C2410_MISCCR_nEN_SCLKE (1<<19) -+#define S3C2410_MISCCR_SDSLEEP (7<<17) -+ -+#define S3C2410_CLKSLOW_UCLK_OFF (1<<7) -+#define S3C2410_CLKSLOW_MPLL_OFF (1<<5) -+#define S3C2410_CLKSLOW_SLOW (1<<4) -+#define S3C2410_CLKSLOW_SLOWVAL(x) (x) -+#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) -+ - #endif /*__S3C2410_H__*/ |