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authorTrygve Laugstøl <trygvis@inamo.no>2017-01-25 20:51:35 +0100
committerTrygve Laugstøl <trygvis@inamo.no>2017-01-25 20:51:35 +0100
commit8a3fedbcb8fc58dae8b43db3cae39688ec0332ef (patch)
treeb148bde0a9191bc44e1f7ace5dada5ac4677bec3 /gdb-apps
parentb485617e1578ade7cb02e65a674d56315098b18c (diff)
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o i2c test
o Misc other stuff.
Diffstat (limited to 'gdb-apps')
-rw-r--r--gdb-apps207
1 files changed, 207 insertions, 0 deletions
diff --git a/gdb-apps b/gdb-apps
new file mode 100644
index 0000000..f4be9b7
--- /dev/null
+++ b/gdb-apps
@@ -0,0 +1,207 @@
+# Source this file to get all the defined commands.
+
+define flash_can1_a
+ shell cd build && make can1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/can1/can1.elf
+ load build/apps/can1/can1.elf
+ set confirm on
+
+ hbreak halt
+end
+
+define flash_can1_b
+ shell cd build && make can1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/can1/can1.elf
+ load build/apps/can1/can1.elf
+ set confirm on
+
+ hbreak halt
+ hbreak main
+ c
+ set variable is_client = 1
+end
+
+define flash_test1
+ shell cd build && make test1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/test1/test1.elf
+ load build/apps/test1/test1.elf
+ set confirm on
+
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+ hbreak halt
+end
+
+define flash_serial1
+ shell cd build && make serial1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/serial1/serial1.elf
+ load build/apps/serial1/serial1.elf
+ set confirm on
+
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+ hbreak halt
+end
+
+define flash_serial2
+ shell cd build && make serial2.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/serial2/serial2.elf
+ load build/apps/serial2/serial2.elf
+ set confirm on
+
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+ hbreak halt
+end
+
+define flash_stepper1
+ shell cd build && make stepper1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/stepper1/stepper1.elf
+ load build/apps/stepper1/stepper1.elf
+ set confirm on
+
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+ hbreak halt
+end
+
+define flash_stepper2
+ shell cd build && make stepper2.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/stepper2/stepper2.elf
+ load build/apps/stepper2/stepper2.elf
+ set confirm on
+
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+ hbreak halt
+end
+
+define flash_i2c1
+ shell cd build && make i2c1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/i2c1/i2c1.elf
+ load build/apps/i2c1/i2c1.elf
+ set confirm on
+
+ set $r0=0, $r1=-1, $r2=-2, $r3=-3, $r4=-4, $r5=-5, $r6=-6, $r7=-7, $r8=-8, $r9=-9, $r10=-10, $r11=-11, $r12=-12
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+
+ echo Run this if first run:\n hbreak halt\n hbreak job1\n hbreak PendSV_Handler\n
+end
+
+define flash_os1
+ shell cd build && make os1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/os1/os1.elf
+ load build/apps/os1/os1.elf
+ set confirm on
+
+ set $r0=0, $r1=-1, $r2=-2, $r3=-3, $r4=-4, $r5=-5, $r6=-6, $r7=-7, $r8=-8, $r9=-9, $r10=-10, $r11=-11, $r12=-12
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+
+ echo Run this if first run:\n hbreak halt\n hbreak job1\n hbreak PendSV_Handler\n
+end
+
+define flash_os2
+ shell cd build && make os2.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/os2/os2.elf
+ load build/apps/os2/os2.elf
+ set confirm on
+
+ set $r0=0, $r1=-1, $r2=-2, $r3=-3, $r4=-4, $r5=-5, $r6=-6, $r7=-7, $r8=-8, $r9=-9, $r10=-10, $r11=-11, $r12=-12
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+
+ echo Run this if first run:\n hbreak halt\n hbreak job1\n hbreak PendSV_Handler\n
+end
+
+define flash_dma1
+ shell cd build && make dma1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/dma1/dma1.elf
+ load build/apps/dma1/dma1.elf
+ set confirm on
+
+ set $r0=0, $r1=-1, $r2=-2, $r3=-3, $r4=-4, $r5=-5, $r6=-6, $r7=-7, $r8=-8, $r9=-9, $r10=-10, $r11=-11, $r12=-12
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+
+ echo Run this if first run:\n hbreak halt\n
+end
+
+define flash_cpp1
+ shell cd build && make cpp1.elf
+
+ monitor arm semihosting enable
+ monitor reset halt
+
+ set confirm off
+ file build/apps/cpp1/cpp1.elf
+ load build/apps/cpp1/cpp1.elf
+ set confirm on
+
+ set $r0=0, $r1=-1, $r2=-2, $r3=-3, $r4=-4, $r5=-5, $r6=-6, $r7=-7, $r8=-8, $r9=-9, $r10=-10, $r11=-11, $r12=-12
+ monitor stm32f1x.cpu mwb 0x20000000 0x5a 20480
+
+ echo Run this if first run:\n hbreak halt\n
+end
+
+define flash_sim1
+ shell cd build && make sim1.elf
+
+ set confirm off
+ target remote tcp:localhost:3333
+ file build/apps/sim1/sim1.elf
+ load build/apps/sim1/sim1.elf
+ set confirm on
+
+ set $r0=0, $r1=-1, $r2=-2, $r3=-3, $r4=-4, $r5=-5, $r6=-6, $r7=-7, $r8=-8, $r9=-9, $r10=-10, $r11=-11, $r12=-12
+
+ hbreak halt
+end
+