diff options
Diffstat (limited to 'thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot')
10 files changed, 1240 insertions, 0 deletions
diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/STM32F10x_XL_Bank1.lsl b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/STM32F10x_XL_Bank1.lsl new file mode 100644 index 0000000..0271fb5 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/STM32F10x_XL_Bank1.lsl @@ -0,0 +1,173 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl new file mode 100644 index 0000000..3e6d303 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_appl.scr b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_appl.scr new file mode 100644 index 0000000..d90eb15 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/setstack.asm b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/setstack.asm new file mode 100644 index 0000000..2c11b4c --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/setstack.asm @@ -0,0 +1,4 @@ + .section .bss.stack + .global _stacklabel +_stacklabel: + .endsec
\ No newline at end of file diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/STM32F10x_XL_Bank2.lsl b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/STM32F10x_XL_Bank2.lsl new file mode 100644 index 0000000..72adf78 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/STM32F10x_XL_Bank2.lsl @@ -0,0 +1,173 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08080000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08080000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/StartupScript.scr b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/StartupScript.scr new file mode 100644 index 0000000..e3dbe23 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/cstart_thumb2.asm b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/cstart_thumb2.asm new file mode 100644 index 0000000..12dc0d0 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..a3b6606 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZG +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.cproject b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.cproject new file mode 100644 index 0000000..8134951 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.cproject @@ -0,0 +1,263 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> 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(C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file FLASH/Dual_Boot/readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Description of the XL-Density devices FLASH Dual Boot capability example. + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Example Description + +This example demonstrates the dual Flash boot capability of XL-Density devices: +boot from Flash memory Bank1 or Bank2. + +At startup, if BFB2 option bit is reset and the boot pins are in the boot from main +Flash memory configuration, the device boots from Flash memory Bank1 or Bank2, +depending on the activation of the bank. The active banks are checked in the following +order: Bank2, followed by Bank1. +The active bank is identified by the value programmed at the base address of the +bank (corresponding to the initial stack pointer value in the interrupt vector table). +For further details, please refer to AN2606 "STM32 microcontroller system memory boot mode." + +To demonstrate this feature, this example provides two programs: + - 1st program will be loaded in Flash Bank1 (starting from @ 0x08000000), for this + you have to enable BOOT_FROM_BANK1 define in main.c + - 2nd program will be loaded in Flash Bank2 (starting from @ 0x08080000), for this + you have to enable BOOT_FROM_BANK2 define in main.c + +Once these two programs are loaded and boot pins set in boot from Flash memory, +after reset the device will boot from Bank1 (default). Then you have to follow +the instructions provided on the LCD: + - "Joystick-DOWN: reset BFB2 bit to Boot from Bank2" => when pushing the Joystick + DOWN button, BFB2 option bit will be reset then a system (SW) reset will be + generated. After startup from reset, the device will boot from Bank2. + - Note: when booting from Bank2 the same menu will be displayed + + - "Joystick-UP: set BFB2 bit to Boot from Bank1" => when pushing the Joystick + UP button, BFB2 option bit will be set then a system (SW) reset will be + generated. After startup from reset, the device will boot from Bank1. + + - "Joystick-SEL: program to 0x0 the base @ of Bank1/2" => when pushing the Joystick + SEL button, the content of address 0x08080000 and 0x08000000 will be programmed to 0x0. + - If the program was previously booting from Bank2 (i.e. BFB2 bit is reset), + in this case after reset no program is executed and the Bootloader code + is executed instead. + - If the program was previously booting from Bank1 (i.e. BFB2 bit is set), + in this case after reset no program is executed. + - You have to load again the two programs to Bank1 and Bank2. + +@b Important Note +================= +When BFB2 bit is cleared and Bank2 or/and Bank1 contain valid user application code, +the Bootloader will always jump to this code and never continue normal code execution +(i.e. it’s no more possible to use the Bootloader for code upgrade and option bytes +programming). As consequence, if the user has cleared BFB2 bit (to boot from Bank2), +in order to be able to execute the embedded Bootloader code he has to: + - either, set BFB2 bit to 1 + - or, program the content of address 0x08080000 and 0x08000000 to 0x0 +=> This example allows performing the two actions described above. + + +@par Directory contents + + - FLASH/Dual_Boot/stm32f10x_conf.h Library Configuration file + - FLASH/Dual_Boot/stm32f10x_it.h Interrupt handlers header file + - FLASH/Dual_Boot/stm32f10x_it.c Interrupt handlers + - FLASH/Dual_Boot/main.c Main program + - FLASH/Dual_Boot/system_stm32f10x.c STM32F10x system source file + +@par Hardware and Software environment + + - This example runs only on STM32F10x XL-Density Devices. + + - This example has been tested with STMicroelectronics STM3210E-EVAL (XL-Density) + evaluation board and can be easily tailored to any development board. + + +@par How to use it ? + +In order to load the IAP code, you have to do the following: + - EWARM: + - Open the Project.eww workspace + - In the workspace toolbar select the project config: + - STM32F10X_XL_BANK1: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + - STM32F10X_XL_BANK2: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - Rebuild all files: Project->Rebuild all + - Load project image: Project->Debug + - Run program: Debug->Go(F5) + + - HiTOP + - Open the HiTOP toolchain. + - Browse to open: + -STM32F10X_XL_BANK1.htp: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + -STM32F10X_XL_BANK2.htp: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - A "Download application" window is displayed, click "cancel". + - Rebuild all files: Project->Rebuild all + - Load project image : Click "ok" in the "Download application" window. + - Run the "RESET_GO_MAIN" script to set the PC at the "main" + - Run program: Debug->Go(F5). + + - MDK-ARM + - Open Project.uvproj project + - In the build toolbar select the project config: + - STM32F10X_XL_BANK1: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + - STM32F10X_XL_BANK2: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - Rebuild all files: Project->Rebuild all target files + - Load project image: Debug->Start/Stop Debug Session + - Run program: Debug->Run (F5) + + - TrueSTUDIO + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM32F10X_XL_BANK1: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + - STM32F10X_XL_BANK2: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> + */ |