diff options
Diffstat (limited to 'tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot')
40 files changed, 13163 insertions, 0 deletions
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.ewd b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.ewd new file mode 100644 index 0000000..505bd47 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.ewd @@ -0,0 +1,1403 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM32F10X_XL_BANK1</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>21</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\iostm32f10xxe.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>0</state> + </option> + <option> + <name>OCProductVersion</name> + <state>5.30.0.51236</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>JLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>5.41.2.51798</state> + </option> + <option> + <name>OCDownloadAttachToProgram</name> + <state>0</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxG.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>ANGEL_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCAngelHeartbeat</name> + <state>1</state> + </option> + <option> + <name>CAngelCommunication</name> + <state>1</state> + </option> + <option> + <name>CAngelCommBaud</name> + <version>0</version> + <state>3</state> + </option> + <option> + <name>CAngelCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>ANGELTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoAngelLogfile</name> + <state>0</state> + </option> + <option> + <name>AngelLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>GDBSERVER_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + </data> + </settings> + <settings> + <name>IARROM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRomLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRomLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CRomCommunication</name> + <state>0</state> + </option> + <option> + <name>CRomCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CRomCommBaud</name> + <version>0</version> + <state>7</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>JLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>10</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>JLinkSpeed</name> + <state>32</state> + </option> + <option> + <name>CCJLinkDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCJLinkLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJLinkHWResetDelay</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JLinkInitialSpeed</name> + <state>32</state> + </option> + <option> + <name>CCDoJlinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>CCJLinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCJLinkIRLength</name> + <state>0</state> + </option> + <option> + <name>CCJLinkCommRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>CCJLinkSpeedRadioV2</name> + <state>0</state> + </option> + <option> + <name>CCUSBDevice</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCJLinkBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJLinkUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCJLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>OCJLinkAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCJLinkResetList</name> + <version>2</version> + <state>7</state> + </option> + <option> + <name>CCJLinkInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>LMIFTDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>LmiftdiSpeed</name> + <state>500</state> + </option> + <option> + <name>CCLmiftdiDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCLmiftdiLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCLmiFtdiInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCLmiFtdiInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>MACRAIGOR_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>3</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>jtag</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>EmuSpeed</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>DoEmuMultiTarget</name> + <state>0</state> + </option> + <option> + <name>EmuMultiTarget</name> + <state>0@ARM7TDMI</state> + </option> + <option> + <name>EmuHWReset</name> + <state>0</state> + </option> + <option> + <name>CEmuCommBaud</name> + <version>0</version> + <state>4</state> + </option> + <option> + <name>CEmuCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>jtago</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>UnusedAddr</name> + <state>0x00800000</state> + </option> + <option> + <name>CCMacraigorHWResetDelay</name> + <state></state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCMacraigorInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCMacraigorInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>RDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRDIDriverDll</name> + <state>Browse to your RDI driver</state> + </option> + <option> + <name>CRDILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRDILogFileEdit</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCRDIHWReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCRDIUseETM</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>STLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>THIRDPARTY_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CThirdPartyDriverDll</name> + <state>Browse to your third-party driver</state> + </option> + <option> + <name>CThirdPartyLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CThirdPartyLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <debuggerPlugins> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB5_Plugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> + <configuration> + <name>STM32F10X_XL_BANK2</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>21</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\iostm32f10xxe.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>0</state> + </option> + <option> + <name>OCProductVersion</name> + <state>5.30.0.51236</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>JLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>5.41.2.51798</state> + </option> + <option> + <name>OCDownloadAttachToProgram</name> + <state>0</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxG.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>ANGEL_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCAngelHeartbeat</name> + <state>1</state> + </option> + <option> + <name>CAngelCommunication</name> + <state>1</state> + </option> + <option> + <name>CAngelCommBaud</name> + <version>0</version> + <state>3</state> + </option> + <option> + <name>CAngelCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>ANGELTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoAngelLogfile</name> + <state>0</state> + </option> + <option> + <name>AngelLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>GDBSERVER_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + </data> + </settings> + <settings> + <name>IARROM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRomLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRomLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CRomCommunication</name> + <state>0</state> + </option> + <option> + <name>CRomCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CRomCommBaud</name> + <version>0</version> + <state>7</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>JLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>10</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>JLinkSpeed</name> + <state>32</state> + </option> + <option> + <name>CCJLinkDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCJLinkLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJLinkHWResetDelay</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JLinkInitialSpeed</name> + <state>32</state> + </option> + <option> + <name>CCDoJlinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>CCJLinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCJLinkIRLength</name> + <state>0</state> + </option> + <option> + <name>CCJLinkCommRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>CCJLinkSpeedRadioV2</name> + <state>0</state> + </option> + <option> + <name>CCUSBDevice</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCJLinkBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJLinkUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCJLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>OCJLinkAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCJLinkResetList</name> + <version>2</version> + <state>7</state> + </option> + <option> + <name>CCJLinkInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>LMIFTDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>LmiftdiSpeed</name> + <state>500</state> + </option> + <option> + <name>CCLmiftdiDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCLmiftdiLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCLmiFtdiInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCLmiFtdiInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>MACRAIGOR_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>3</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>jtag</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>EmuSpeed</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>DoEmuMultiTarget</name> + <state>0</state> + </option> + <option> + <name>EmuMultiTarget</name> + <state>0@ARM7TDMI</state> + </option> + <option> + <name>EmuHWReset</name> + <state>0</state> + </option> + <option> + <name>CEmuCommBaud</name> + <version>0</version> + <state>4</state> + </option> + <option> + <name>CEmuCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>jtago</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>UnusedAddr</name> + <state>0x00800000</state> + </option> + <option> + <name>CCMacraigorHWResetDelay</name> + <state></state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCMacraigorInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCMacraigorInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>RDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRDIDriverDll</name> + <state>Browse to your RDI driver</state> + </option> + <option> + <name>CRDILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRDILogFileEdit</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCRDIHWReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCRDIUseETM</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>STLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>THIRDPARTY_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CThirdPartyDriverDll</name> + <state>Browse to your third-party driver</state> + </option> + <option> + <name>CThirdPartyLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CThirdPartyLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <debuggerPlugins> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB5_Plugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.ewp b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.ewp new file mode 100644 index 0000000..2e02b84 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.ewp @@ -0,0 +1,1664 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM32F10X_XL_BANK1</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>General</name> + <archiveVersion>3</archiveVersion> + <data> + <version>17</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>ExePath</name> + <state>STM32F10X_XL_BANK1\Exe</state> + </option> + <option> + <name>ObjPath</name> + <state>STM32F10X_XL_BANK1\Obj</state> + </option> + <option> + <name>ListPath</name> + <state>STM32F10X_XL_BANK1\List</state> + </option> + <option> + <name>Variant</name> + <version>13</version> + <state>36</state> + </option> + <option> + <name>GEndianMode</name> + <state>0</state> + </option> + <option> + <name>Input variant</name> + <version>1</version> + <state>0</state> + </option> + <option> + <name>Input description</name> + <state>Full formatting.</state> + </option> + <option> + <name>Output variant</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>Output description</name> + <state>Full formatting.</state> + </option> + <option> + <name>GOutputBinary</name> + <state>0</state> + </option> + <option> + <name>FPU</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>OGCoreOrChip</name> + <state>1</state> + </option> + <option> + <name>GRuntimeLibSelect</name> + <version>0</version> + <state>2</state> + </option> + <option> + <name>GRuntimeLibSelectSlave</name> + <version>0</version> + <state>2</state> + </option> + <option> + <name>RTDescription</name> + <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state> + </option> + <option> + <name>RTConfigPath</name> + <state>$TOOLKIT_DIR$\INC\DLib_Config_Full.h</state> + </option> + <option> + <name>OGProductVersion</name> + <state>4.41A</state> + </option> + <option> + <name>OGLastSavedByProductVersion</name> + <state>5.41.2.51798</state> + </option> + <option> + <name>GeneralEnableMisra</name> + <state>0</state> + </option> + <option> + <name>GeneralMisraVerbose</name> + <state>0</state> + </option> + <option> + <name>OGChipSelectEditMenu</name> + <state>STM32F10xxG ST STM32F10xxG</state> + </option> + <option> + <name>GenLowLevelInterface</name> + <state>1</state> + </option> + <option> + <name>GEndianModeBE</name> + <state>1</state> + </option> + <option> + <name>OGBufferedTerminalOutput</name> + <state>0</state> + </option> + <option> + <name>GenStdoutInterface</name> + <state>0</state> + </option> + <option> + <name>GeneralMisraRules98</name> + <version>0</version> + <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state> + </option> + <option> + <name>GeneralMisraVer</name> + <state>0</state> + </option> + <option> + <name>GeneralMisraRules04</name> + <version>0</version> + <state>011111111111111110110111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state> + </option> + </data> + </settings> + <settings> + <name>ICCARM</name> + <archiveVersion>2</archiveVersion> + <data> + <version>21</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCDefines</name> + <state>USE_STDPERIPH_DRIVER</state> + <state>STM32F10X_XL</state> + <state>USE_STM3210E_EVAL</state> + <state>BOOT_FROM_BANK1</state> + </option> + <option> + <name>CCPreprocFile</name> + <state>0</state> + </option> + <option> + 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</option> + <option> + <name>CrcSize</name> + <version>0</version> + <state>1</state> + </option> + <option> + <name>CrcAlign</name> + <state>1</state> + </option> + <option> + <name>CrcAlgo</name> + <state>1</state> + </option> + <option> + <name>CrcPoly</name> + <state>0x11021</state> + </option> + <option> + <name>CrcCompl</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CrcBitOrder</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CrcInitialValue</name> + <state>0x0</state> + </option> + <option> + <name>DoCrc</name> + <state>0</state> + </option> + <option> + <name>IlinkBE8Slave</name> + <state>1</state> + </option> + <option> + <name>IlinkBufferedTerminalOutput</name> + <state>1</state> + </option> + <option> + <name>IlinkStdoutInterfaceSlave</name> + <state>1</state> + </option> + <option> + <name>CrcFullSize</name> + <state>0</state> + </option> + <option> + <name>IlinkIElfToolPostProcess</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>IARCHIVE</name> + <archiveVersion>0</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>IarchiveInputs</name> + <state></state> + </option> + <option> + <name>IarchiveOverride</name> + <state>0</state> + </option> + <option> + <name>IarchiveOutput</name> + <state>###Unitialized###</state> + </option> + </data> + </settings> + <settings> + <name>BILINK</name> + <archiveVersion>0</archiveVersion> + <data/> + </settings> + </configuration> + <group> + <name>CMSIS</name> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c</name> + </file> + </group> + <group> + <name>Doc</name> + <file> + <name>$PROJ_DIR$\..\readme.txt</name> + </file> + </group> + <group> + <name>EWARMv5</name> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\iar\startup_stm32f10x_xl.s</name> + </file> + </group> + <group> + <name>StdPeriph_Driver</name> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c</name> + </file> + </group> + <group> + <name>STM32_EVAL</name> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\..\Utilities\STM32_EVAL\stm32_eval.c</name> + </file> + </group> + <group> + <name>User</name> + <file> + <name>$PROJ_DIR$\..\main.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\stm32f10x_it.c</name> + </file> + </group> +</project> + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.eww b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.eww new file mode 100644 index 0000000..e0fd14b --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/Project.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<workspace> + <project> + <path>$WS_DIR$\Project.ewp</path> + </project> + <batchBuild/> +</workspace> + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/stm32f10x_flash_xl_bank1.icf b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/stm32f10x_flash_xl_bank1.icf new file mode 100644 index 0000000..2c2e0d6 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/stm32f10x_flash_xl_bank1.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/stm32f10x_flash_xl_bank2.icf b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/stm32f10x_flash_xl_bank2.icf new file mode 100644 index 0000000..2d868e1 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/EWARM/stm32f10x_flash_xl_bank2.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08080000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08080000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/STM3210X-XL_BANK1.htp b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/STM3210X-XL_BANK1.htp new file mode 100644 index 0000000..9eb095c --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/STM3210X-XL_BANK1.htp @@ -0,0 +1,1103 @@ +<?xml version="1.0" encoding="UTF-8"?> + + +<HiTOPProject> + <Windows> + <MDIState RTOS="0" Trace="0" Source="1" Maximized="1" SFRWindow="0" CoverageWindow="0"/> + <Window Id="SFRWindow"> + <SFRDefinitions File="$(SYSTEMDIR)\Derivatives\ST Microelectronics\STM32F103ZG.xsfr"/> + <WindowState State="Normal"/> + <Rectangle State="Normal"> + <Size cx="497" cy="278"/> + <Position x="22" y="22"/> + </Rectangle> + <Rectangle State="Maximized"> + <Size cx="615" cy="415"/> + <Position x="-4" y="-23"/> + </Rectangle> + </Window> + <Window Id="Disassembly"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="0" Order="0" Title="State" Width="24" Visible="1" Alignment="LEFT"/> + <Column Id="11" Order="1" Title="Address" Visible="1" RelWidth="0.1722678" Alignment="LEFT"/> + <Column Id="12" Order="2" Title="OpCode" Visible="1" RelWidth="0.1325328" Alignment="LEFT"/> + <Column Id="13" Order="3" Title="Instruction" Visible="1" RelWidth="0.6954468" Alignment="LEFT"/> + </List> + <Tabs Count="0"/> + </Window> + <Window Id="Source"> + <UpdateOnRunning Update="0"/> + <WindowState State="Maximized"></WindowState> + <Rectangle State="Minimized"> + <Size cx="160" cy="24"></Size> + <Position x="0" y="352"></Position> + </Rectangle> + <Rectangle State="Normal"> + <Size cx="830" cy="485"></Size> + <Position x="0" y="0"></Position> + </Rectangle> + <Rectangle State="Maximized"> + <Size cx="844" cy="610"></Size> + <Position x="-4" y="-23"></Position> + </Rectangle> + <Tabs Count="4" Active="3"> + <Tab Pos="0" PosX="11" PosY="20" Module="readme.txt" TopLine="9" FilePath="$(PROJECTDIR)\..\..\readme.txt" Application="STM3210X-XL_BANK1"/> + <Tab Pos="1" PosX="60" PosY="97" Module="STM32F10x_XL_Bank1.lsl" TopLine="85" FilePath="$(PROJECTDIR)\Settings\STM32F10x_XL_Bank1.lsl" Application=""/> + <Tab Pos="2" PosX="11" PosY="250" Module="main" TopLine="248" FilePath="$(PROJECTDIR)\..\..\main.c" Application="STM3210X-XL_BANK1"/> + <Tab Pos="3" PosX="0" PosY="46" Module="cstart_thumb2" TopLine="29" FilePath="$(PROJECTDIR)\cstart_thumb2.asm" Application="STM3210X-XL_BANK1"/> + </Tabs> + </Window> + <Window Id="Watch"> + <Tabs Sel="0" Count="2"> + <Tab Pos="0" Title="Locals"> + <UpdateOnRunning Update="0"/> + <DisplayMode Mode="0"/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="12" Order="0" Title="Variables" Visible="1" RelWidth="0.3722838" Alignment="LEFT"/> + <Column Id="13" Order="1" Title="Value" Visible="1" RelWidth="0.6277578" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1" Title="Watch1"> + <UpdateOnRunning Update="0"/> + <DisplayMode Mode="0"/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="ID" Visible="1" RelWidth="0.1941638" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Expression" Visible="1" RelWidth="0.3000458" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Value" Visible="1" RelWidth="0.5059278" Alignment="LEFT"/> + <Watches/> + </List> + </Tab> + </Tabs> + </Window> + <Window Id="Memory"> + <Tabs Sel="0" Count="4"> + <Tab Pos="0" Title="Mem0"> + <UpdateOnRunning Update="0"/> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x20004C00" Symbol="_lc_ub_stack"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="94" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1" Title="Flash"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x08000030" Symbol="0x08000030"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="198" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + <UpdateOnRunning Update="0"/> + </Tab> + <Tab Pos="2" Title="RAM"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x200000E0" Symbol="0x200000E0"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="198" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + <UpdateOnRunning Update="0"/> + </Tab> + <Tab Pos="3" Title="Base"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x00000000" Symbol="_lc_t2_longveneertarget"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="198" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + <UpdateOnRunning Update="0"/> + </Tab> + </Tabs> + </Window> + <Window Id="Emulator State"> + <Tabs> + <Tab Pos="0"> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="10" Order="0" Title="No" Visible="1" RelWidth="0.1250128" Alignment="LEFT"/> + <Column Id="11" Order="1" Title="Id" Visible="1" RelWidth="0.2500128" Alignment="LEFT"/> + <Column Id="12" Order="2" Title="Counter" Visible="1" RelWidth="0.2500128" Alignment="LEFT"/> + <Column Id="13" Order="3" Title="Use" Visible="1" RelWidth="0.2500128" Alignment="LEFT"/> + <Column Id="14" Order="4" Title="Occured" Visible="1" RelWidth="0.1250128" Alignment="LEFT"/> + </List> + </Tab> + </Tabs> + </Window> + <Window Id="Breakpoint"> + <Tabs Sel="0"> + <Tab Pos="0" Title="Code"> + <Breaks/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="ID" Visible="1" RelWidth="0.2500088" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Address" Visible="1" RelWidth="0.3106148" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Length" Visible="1" RelWidth="0.0833418" Alignment="LEFT"/> + <Column Id="16" Order="3" Title="Type" Visible="1" RelWidth="0.3560698" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1" Title="Data"> + <Breaks/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="ID" Visible="1" RelWidth="0.2500018" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Address" Visible="1" RelWidth="0.3106078" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Length" Visible="1" RelWidth="0.0833348" Alignment="LEFT"/> + <Column Id="16" Order="3" Title="Type" Visible="1" RelWidth="0.3560628" Alignment="LEFT"/> + </List> + </Tab> + </Tabs> + </Window> + <Window Id="TraceFilter"> + <Tabs> + <Tab Pos="0"> + <Triggers/> + </Tab> + <Tab Pos="1"> + <Regions/> + </Tab> + </Tabs> + </Window> + <Window Id="Profile"> + <Tabs> + <Tab Pos="0"> + <UpdateOnRunning Update="0"/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Id" Visible="1" RelWidth="0.2275868" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Address" Visible="1" RelWidth="0.2827598" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Activity" Visible="1" RelWidth="0.4000008" Alignment="LEFT"/> + <Column Id="14" Order="3" Title="Time" Visible="1" RelWidth="0.0896558" Alignment="LEFT"/> + </List> + <State ModeAbsolute="0" UpdateEnabled="0"/> + </Tab> + </Tabs> + <List Id=""/> + </Window> + <Window Id="FileView" RelativePath="Relative2Project"> + <ApplFolder Id="STM3210X-XL_BANK1" State="Expanded"> + <Folder Id="CMSIS" State="Expanded"> + <File Id="..\..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.c"/> + <File Id="..\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c"/> + </Folder> + <Folder Id="HiTOP" State="Expanded"> + <File Id=".\cstart_thumb2.asm"/> + </Folder> + <Folder Id="StdPeriph_Driver" State="Expanded"> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c"/> + </Folder> + <Folder Id="STM32_EVAL" State="Expanded"> + <File Id="..\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c"/> + <File Id="..\..\..\..\..\..\Utilities\STM32_EVAL\stm32_eval.c"/> + </Folder> + <Folder Id="User" State="Expanded"> + <File Id="..\..\main.c"/> + <File Id=".\setstack.asm"/> + <File Id="..\..\stm32f10x_it.c"/> + </Folder> + <Folder Id="Source Files" State="Not_Expanded" RelativePath=""/> + <Folder Id="Doc" State="Expanded"> + <File Id="..\..\readme.txt"/> + </Folder> + </ApplFolder> + </Window> + </Windows> + <Version>V5.20</Version> + <DebugDevice> + <TargetProcessor Id="PARM"/> + <Derivative Id="STM32F103ZG" File="$(SYSTEMDIR)\Derivatives\ST Microelectronics\.\..\Arm\Default.drv" Vendor="ST Microelectronics"> + <InternalFlash Count="1"> + <Device Id="STM32F103xG" Index="0" RAMBase="" FlashBase="" Manufacturer="ST"/> + </InternalFlash> + </Derivative> + <Communication> + <Port>USB</Port> + <DeviceName>Tantino for Cortex-10083</DeviceName> + <PortAddress Value="-2147483648"/> + <BaudRate Value="0"/> + </Communication> + <SystemDir Path="C:\Program Files\Hitex\HiTOP53-CTX\Tantino-Cortex"/> + <ARMConfiguration Id="STM32F103ZG" SWJDP="1" Vendor="ST Microelectronics" EMB_ICE="0" Endianes="0" ProcType="30" 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Number="0" Enabled="0"/> + <Vector Number="1" Enabled="0"/> + <Vector Number="2" Enabled="0"/> + <Vector Number="3" Enabled="0"/> + <Vector Number="4" Enabled="0"/> + <Vector Number="5" Enabled="0"/> + <Vector Number="6" Enabled="0"/> + <Vector Number="7" Enabled="0"/> + <Vector Number="8" Enabled="0"/> + <Vector Number="9" Enabled="0"/> + <Vector Number="10" Enabled="0"/> + <Vector Number="11" Enabled="0"/> + <Vector Number="12" Enabled="0"/> + <Vector Number="13" Enabled="0"/> + <Vector Number="14" Enabled="0"/> + <Vector Number="15" Enabled="0"/> + <Vector Number="16" Enabled="0"/> + <Vector Number="17" Enabled="0"/> + <Vector Number="18" Enabled="0"/> + <Vector Number="19" Enabled="0"/> + <Vector Number="20" Enabled="0"/> + <Vector Number="21" Enabled="0"/> + <Vector Number="22" Enabled="0"/> + <Vector Number="23" Enabled="0"/> + <Vector Number="24" Enabled="0"/> + <Vector Number="25" Enabled="0"/> + <Vector Number="26" Enabled="0"/> + <Vector Number="27" Enabled="0"/> + <Vector Number="28" Enabled="0"/> + <Vector Number="29" Enabled="0"/> + <Vector Number="30" Enabled="0"/> + <Vector Number="31" Enabled="0"/> + <Vector Number="32" Enabled="0"/> + <Vector Number="33" Enabled="0"/> + <Vector Number="34" Enabled="0"/> + <Vector Number="35" Enabled="0"/> + <Vector Number="36" Enabled="0"/> + <Vector Number="37" Enabled="0"/> + <Vector Number="38" Enabled="0"/> + <Vector Number="39" Enabled="0"/> + <Vector Number="40" Enabled="0"/> + <Vector Number="41" Enabled="0"/> + <Vector Number="42" Enabled="0"/> + <IRQ Name="WWDG" Number="0"/> + <IRQ Name="PVD" Number="1"/> + <IRQ Name="TAMPER" Number="2"/> + <IRQ Name="RTC" Number="3"/> + <IRQ Name="FLASH" Number="4"/> + <IRQ Name="RCC" Number="5"/> + <IRQ Name="EXTI 0" Number="6"/> + <IRQ Name="EXTI 1" Number="7"/> + <IRQ Name="EXTI 2" Number="8"/> + <IRQ Name="EXTI 3" Number="9"/> + <IRQ Name="EXTI 4" Number="10"/> + <IRQ Name="DMA Channel 1" Number="11"/> + <IRQ Name="DMA Channel 2" Number="12"/> + <IRQ Name="DMA Channel 3" Number="13"/> + <IRQ Name="DMA Channel 4" Number="14"/> + <IRQ Name="DMA Channel 5" Number="15"/> + <IRQ Name="DMA Channel 6" Number="16"/> + <IRQ Name="DMA Channel 7" Number="17"/> + <IRQ Name="ADC" Number="18"/> + <IRQ Name="USB_HP_CAN_TX" Number="19"/> + <IRQ Name="USB_LP_CAN_RX 0" Number="20"/> + <IRQ Name="CAN_RX 1" Number="21"/> + <IRQ Name="CAN_SCE" Number="22"/> + <IRQ Name="EXTI 5-9" Number="23"/> + <IRQ Name="TIM 1 BRK" Number="24"/> + <IRQ Name="TIM 1 UP" Number="25"/> + <IRQ Name="TIM 1 TRG COM" Number="26"/> + <IRQ Name="TIM 1 CC" Number="27"/> + <IRQ Name="TIM 2" Number="28"/> + <IRQ Name="TIM 3" Number="29"/> + <IRQ Name="TIM 4" Number="30"/> + <IRQ Name="I2C 1 EV" Number="31"/> + <IRQ Name="I2C 1 ER" Number="32"/> + <IRQ Name="I2C 2 EV" Number="33"/> + <IRQ Name="I2C 2 ER" Number="34"/> + <IRQ Name="SPI 1" Number="35"/> + <IRQ Name="SPI 2" Number="36"/> + <IRQ Name="USART 1" Number="37"/> + <IRQ Name="USART 2" Number="38"/> + <IRQ Name="USART 3" Number="39"/> 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ScreenSize="1280, 1024"> + <BarInfo0 BarId="1" MRUWidth="32767" MRUDockPos="0, 1, 1024, 24"></BarInfo0> + <BarInfo1 BarId="10066" MRUWidth="32767" PointPos="333, 49" MRUDockPos="318, 54, 634, 81"></BarInfo1> + <BarInfo2 BarId="9025" MRUWidth="32767" PointPos="455, 23" MRUDockPos="522, 21, 758, 48"></BarInfo2> + <BarInfo3 BarId="9017" MRUWidth="32767" PointPos="683, 23" MRUDockPos="600, 18, 761, 45"></BarInfo3> + <BarInfo4 BarId="4004" MRUWidth="32767" PointPos="0, 49" MRUDockPos="-4, 57, 319, 84"></BarInfo4> + <BarInfo5 BarId="1053" MRUWidth="32767" PointPos="0, 23" MRUDockPos="17, 26, 472, 52"></BarInfo5> + </DockState> + <DockBars> + <DockBar0 Id1="1" Id3="1053" Id4="9017" Id5="9025" Id7="10066" Id8="4004" Count="10"></DockBar0> + </DockBars> + </Layout> + </CommandBars> + </Layout> + <Layout Description="FlashTool"> + <Dockinglayout> + <FlashTool> + <Summary Panes="14" Client="8" TopContainer="4"/> + <Pane-1 Type="5" Panes="0" Direction="0"/> + <Pane-2 Type="5" Panes="0" Direction="1"/> + <Pane-3 Type="5" Panes="0" Direction="3"/> + <Pane-4 Type="2" Panes="2" Pane-1="5" Pane-2="12" DockingCY="615"/> + <Pane-5 Type="2" Horiz="1" Panes="1" Pane-1="6" DockingCY="510"/> + <Pane-6 Type="2" Panes="2" Pane-1="7" Pane-2="9" DockingCX="791" DockingCY="510"/> + <Pane-7 Type="2" Horiz="1" Panes="1" Pane-1="8" DockingCY="401"/> + <Pane-8 Type="4"/> + <Pane-9 Type="2" Horiz="1" Panes="1" Pane-1="10" DockingCX="200" DockingCY="105"/> + <Pane-10 Type="1" Panes="1" Pane-1="11" Selected="11" DockingCX="200" DockingCY="120"/> + <Pane-11 ID="40050" Type="0" Title="Memory - Mem0\nMem0" DockingCX="200" DockingCY="120" LastHolder="10" DockingHolder="10"/> + <Pane-12 Type="2" Horiz="1" Panes="1" Pane-1="13" DockingCX="995" DockingCY="101"/> + <Pane-13 Type="1" Panes="1" Pane-1="14" Selected="14" DockingCX="728" DockingCY="101"/> + <Pane-14 ID="10001" Type="0" Title="Output" DockingCX="200" DockingCY="120" LastHolder="13" DockingHolder="13"/> + </FlashTool> + </Dockinglayout> + <Windows> + <MDIState RTOS="0" Trace="0" Source="0" Maximized="1" SFRWindow="0" CoverageWindow="0"/> + <Window Id="Source"> + <WindowState State="Maximized"/> + <Rectangle State="Minimized"> + <Size cx="160" cy="24"/> + <Position x="0" y="352"/> + </Rectangle> + <Rectangle State="Normal"> + <Size cx="534" cy="471"/> + <Position x="-4" y="-23"/> + </Rectangle> + <Rectangle State="Maximized"> + <Size cx="566" cy="421"/> + <Position x="-4" y="-30"/> + </Rectangle> + </Window> + <Window Id="SFRWindow"> + <WindowState State="Maximized"/> + <Rectangle State="Normal"> + <Size cx="300" cy="200"/> + <Position x="-4" y="-30"/> + </Rectangle> + <Rectangle State="Maximized"> + <Position x="-4" y="-30"/> + <Size cx="746" cy="219"/> + </Rectangle> + </Window> + </Windows> + <CommandBars> + <Layout> + <DockState Count="5" Version="8" ScreenSize="1024, 768"> + <BarInfo0 BarId="1" MRUWidth="32767"/> + <BarInfo1 BarId="10066" MRUWidth="32767" PointPos="346, 50" MRUDockPos="318, 54, 634, 81"/> + <BarInfo2 BarId="9025" MRUWidth="32767" PointPos="375, 23" MRUDockPos="374, 23, 610, 50"/> + <BarInfo3 BarId="4004" MRUWidth="32767" PointPos="0, 50" MRUDockPos="-4, 57, 319, 84"/> + <BarInfo4 BarId="128" MRUWidth="32767" PointPos="0, 23" MRUDockPos="-12, 27, 363, 54"/> + </DockState> + <DockBars> + <DockBar0 Id1="1" Id3="9025" Id4="128" Id6="10066" Id7="4004" Count="9"/> + </DockBars> + </Layout> + </CommandBars> + </Layout> + </RecentScreenLayouts> + <FlashProgramming RAMBase="0x20000000" RAMLength="0x3000" NumDevices="1" SaveRestoreRAM="1" EnableProgramming="1"> + <FlashDevice Type="STM32F103xG" Index="0" BusWidth="32" DeviceMode="32" BaseAddress="0x08000000" Manufacturer="ST"> + <Sectors Count="0"/> + </FlashDevice> + </FlashProgramming> + <LinkerApplications Count="1" RelPath="1" AutoLoad="0" CurrentIdeApp="STM3210X-XL_BANK1" AutoDetectChanges="1"> + <Loader Id="TaskingCED"/> + <Application Pos="0" Load="1" AppName="STM3210X-XL_BANK1" CodeFile=".\objects\STM3210X-XL_BANK1.htx" LinkerFile=".\objects\STM3210X-XL_BANK1.abs" CurrentBuild="STM3210X-XL_BANK1"> + <SymbolLoader ProjRel="1" MessageFile="" LoaderVersion="sparmed52.dll : 5.20.736.0" NeedsSymprepRun="0" SymbolFileFormat="V2.4.0"> + <Options Cache="128" Reload="RELOAD" CmdFile="" DestDir=".\objects\" OnlySym="0" StdCode="" Verbose="1" CtrlFile="" WarnLevel="0"> + <SourcePath> + <Path Text="..\..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport\"/> + <Path Text="..\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\"/> + <Path Text=".\"/> + <Path Text="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\"/> + <Path Text="..\..\..\..\..\..\Utilities\STM32_EVAL\"/> + <Path Text="..\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\"/> + <Path Text="..\..\"/> + </SourcePath> + <ProcessorSpecific> + <Option Text="FW_TYPES"/> + </ProcessorSpecific> + <DebugModules Include="1"/> + </Options> + </SymbolLoader> + <RTOS Id="" Dll=""/> + <BuildConfiguration Id="STM3210X-XL_BANK1" File="" ToolId="IdeTaskingARM" BuildCfgChanged="false"> + <General OutputPath=".\objects\" TargetName="STM3210X-XL_BANK1.abs"> + <IncludePath Path="..\..\" Position="0"/> + <IncludePath Path="..\..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport\" Position="1"/> + <IncludePath Path="..\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\" Position="2"/> + <IncludePath Path="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\" Position="3"/> + <IncludePath Path="..\..\..\..\..\..\Utilities\STM32_EVAL\" Position="4"/> + <IncludePath Path="..\..\..\..\..\..\Utilities\STM32_EVAL\Common\" Position="5"/> + <IncludePath Path="..\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\" Position="6"/> + </General> + <Assembler Options="-co -CARMv7M -Wa-il -Wa-gs -v "/> + <Compiler Defines="USE_STDPERIPH_DRIVER;STM32F10X_XL;USE_STM3210E_EVAL; BOOT_FROM_BANK1" Options="-co -CARMv7M -Wc--align-composites=n -Wc-O1 -Wc-c99 -Wc-AGx -Wc-ga -v -Wa-L1 -Wc-w560 -Wc-w523 -Wc-t4 "/> + <Linker File=".\Settings\link.lnk" Options="-Wl-L"$(TOOLDIR)..\lib" -Wl-OcLtXy -CARMv7M -Wl-lfpthumb -o"$(TargetDir)$(Target)" " PostBuild=""/> + </BuildConfiguration> + </Application> + </LinkerApplications> + <ScriptBarSettings> + <ScriptButton Id="1" File=".\Settings\reset_appl.scr" ButtonText="RESET_APPL" ProjRelative="1"/> + <ScriptButton Id="2" File=".\Settings\reset_go_main.scr" ButtonText="RESET_GO_MAIN" ProjRelative="1"/> + <ScriptButton Id="3" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="4" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="5" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="6" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="7" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="8" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="9" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="10" File="" ButtonText="" ProjRelative="1"/> + </ScriptBarSettings> +</HiTOPProject> + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/STM32F10x_XL_Bank1.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/STM32F10x_XL_Bank1.lsl new file mode 100644 index 0000000..0271fb5 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/STM32F10x_XL_Bank1.lsl @@ -0,0 +1,173 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/StartupScript.scr b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/StartupScript.scr new file mode 100644 index 0000000..e3dbe23 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl new file mode 100644 index 0000000..3e6d303 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/link.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/link.lnk new file mode 100644 index 0000000..423d253 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_XL_Bank1.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_appl.scr b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_appl.scr new file mode 100644 index 0000000..d90eb15 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_go_main.scr b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_go_main.scr new file mode 100644 index 0000000..3e9c066 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/cstart_thumb2.asm b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/cstart_thumb2.asm new file mode 100644 index 0000000..12dc0d0 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/setstack.asm b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/setstack.asm new file mode 100644 index 0000000..2c11b4c --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/setstack.asm @@ -0,0 +1,4 @@ + .section .bss.stack + .global _stacklabel +_stacklabel: + .endsec
\ No newline at end of file diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/STM3210X-XL_BANK2.htp b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/STM3210X-XL_BANK2.htp new file mode 100644 index 0000000..96444cb --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/STM3210X-XL_BANK2.htp @@ -0,0 +1,1110 @@ +<?xml version="1.0" encoding="UTF-8"?> + + +<HiTOPProject> + <Windows> + <MDIState RTOS="0" Trace="0" Source="1" Maximized="1" SFRWindow="0" CoverageWindow="0"/> + <Window Id="SFRWindow"> + <SFRDefinitions File="$(SYSTEMDIR)\Derivatives\ST Microelectronics\STM32F103ZG.xsfr"/> + <WindowState State="Normal"/> + <Rectangle State="Normal"> + <Size cx="497" cy="278"/> + <Position x="22" y="22"/> + </Rectangle> + <Rectangle State="Maximized"> + <Size cx="615" cy="415"/> + <Position x="-4" y="-23"/> + </Rectangle> + </Window> + <Window Id="Disassembly"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="0" Order="0" Title="State" Width="24" Visible="1" Alignment="LEFT"/> + <Column Id="11" Order="1" Title="Address" Visible="1" RelWidth="0.1722648" Alignment="LEFT"/> + <Column Id="12" Order="2" Title="OpCode" Visible="1" RelWidth="0.1325298" Alignment="LEFT"/> + <Column Id="13" Order="3" Title="Instruction" Visible="1" RelWidth="0.6954438" Alignment="LEFT"/> + </List> + <Tabs Count="0"/> + </Window> + <Window Id="Source"> + <UpdateOnRunning Update="0"/> + <WindowState State="Maximized"></WindowState> + <Rectangle State="Minimized"> + <Size cx="160" cy="24"></Size> + <Position x="0" y="352"></Position> + </Rectangle> + <Rectangle State="Normal"> + <Size cx="830" cy="485"></Size> + <Position x="0" y="0"></Position> + </Rectangle> + <Rectangle State="Maximized"> + <Size cx="844" cy="610"></Size> + <Position x="-4" y="-23"></Position> + </Rectangle> + <Tabs Count="3" Active="2"> + <Tab Pos="0" PosX="52" PosY="91" Module="STM32F10x_XL_Bank2.lsl" TopLine="69" FilePath="$(PROJECTDIR)\Settings\STM32F10x_XL_Bank2.lsl" Application=""/> + <Tab Pos="1" PosX="16" PosY="260" Module="main" TopLine="248" FilePath="$(PROJECTDIR)\..\..\main.c" Application="STM3210X-XL_BANK2"/> + <Tab Pos="2" PosX="47" PosY="51" Module="cstart_thumb2" TopLine="29" FilePath="$(PROJECTDIR)\cstart_thumb2.asm" Application="STM3210X-XL_BANK2"/> + </Tabs> + </Window> + <Window Id="Watch"> + <Tabs Sel="0" Count="2"> + <Tab Pos="0" Title="Locals"> + <UpdateOnRunning Update="0"/> + <DisplayMode Mode="0"/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="12" Order="0" Title="Variables" Visible="1" RelWidth="0.3722838" Alignment="LEFT"/> + <Column Id="13" Order="1" Title="Value" Visible="1" RelWidth="0.6277578" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1" Title="Watch1"> + <UpdateOnRunning Update="0"/> + <DisplayMode Mode="0"/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="ID" Visible="1" RelWidth="0.1941628" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Expression" Visible="1" RelWidth="0.3000448" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Value" Visible="1" RelWidth="0.5059268" Alignment="LEFT"/> + <Watches/> + </List> + </Tab> + </Tabs> + </Window> + <Window Id="Memory"> + <Tabs Sel="0" Count="4"> + <Tab Pos="0" Title="Mem0"> + <UpdateOnRunning Update="0"/> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x20004C00" Symbol="_lc_ub_stack"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="94" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1" Title="Flash"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x08080030" Symbol="0x08080030"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="198" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + <UpdateOnRunning Update="0"/> + </Tab> + <Tab Pos="2" Title="RAM"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x200000E0" Symbol="0x200000E0"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="198" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + <UpdateOnRunning Update="0"/> + </Tab> + <Tab Pos="3" Title="Base"> + <List Id="" BkColor="16777215" TextColor="0" DisableColSizing="0"> + <Memory Format="DWORD" SymbolicAddresses="1"> + <Address Hex="0x00000000" Symbol="_lc_t2_longveneertarget"/> + </Memory> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Address" Width="198" Visible="1" Alignment="RIGHT"/> + <Column Id="12" Order="1" Title="Data" Width="302" Visible="1" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="ASCII" Width="142" Visible="1" Alignment="LEFT"/> + </List> + <UpdateOnRunning Update="0"/> + </Tab> + </Tabs> + </Window> + <Window Id="Emulator State"> + <Tabs> + <Tab Pos="0"> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="10" Order="0" Title="No" Visible="1" RelWidth="0.1250128" Alignment="LEFT"/> + <Column Id="11" Order="1" Title="Id" Visible="1" RelWidth="0.2500128" Alignment="LEFT"/> + <Column Id="12" Order="2" Title="Counter" Visible="1" RelWidth="0.2500128" Alignment="LEFT"/> + <Column Id="13" Order="3" Title="Use" Visible="1" RelWidth="0.2500128" Alignment="LEFT"/> + <Column Id="14" Order="4" Title="Occured" Visible="1" RelWidth="0.1250128" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1"> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="10" Order="0" Title="No" Visible="1" RelWidth="0.1250008" Alignment="LEFT"/> + <Column Id="11" Order="1" Title="Id" Visible="1" RelWidth="0.2500008" Alignment="LEFT"/> + <Column Id="12" Order="2" Title="Counter" Visible="1" RelWidth="0.2500008" Alignment="LEFT"/> + <Column Id="13" Order="3" Title="Use" Visible="1" RelWidth="0.2500008" Alignment="LEFT"/> + <Column Id="14" Order="4" Title="Occurred" Visible="1" RelWidth="0.1250008" Alignment="LEFT"/> + </List> + </Tab> + </Tabs> + </Window> + <Window Id="Breakpoint"> + <Tabs Sel="0"> + <Tab Pos="0" Title="Code"> + <Breaks/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="ID" Visible="1" RelWidth="0.2500088" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Address" Visible="1" RelWidth="0.3106148" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Length" Visible="1" RelWidth="0.0833418" Alignment="LEFT"/> + <Column Id="16" Order="3" Title="Type" Visible="1" RelWidth="0.3560698" Alignment="LEFT"/> + </List> + </Tab> + <Tab Pos="1" Title="Data"> + <Breaks/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="ID" Visible="1" RelWidth="0.2500018" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Address" Visible="1" RelWidth="0.3106078" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Length" Visible="1" RelWidth="0.0833348" Alignment="LEFT"/> + <Column Id="16" Order="3" Title="Type" Visible="1" RelWidth="0.3560628" Alignment="LEFT"/> + </List> + </Tab> + </Tabs> + </Window> + <Window Id="TraceFilter"> + <Tabs> + <Tab Pos="0"> + <Triggers/> + </Tab> + <Tab Pos="1"> + <Regions/> + </Tab> + </Tabs> + </Window> + <Window Id="Profile"> + <Tabs> + <Tab Pos="0"> + <UpdateOnRunning Update="0"/> + <List Id="" BkColor="16777215" SortAsc="1" SortCol="-1" TextColor="0" DisableColSizing="0"> + <Header Bold="1"/> + <Column Id="11" Order="0" Title="Id" Visible="1" RelWidth="0.2275868" Alignment="LEFT"/> + <Column Id="12" Order="1" Title="Address" Visible="1" RelWidth="0.2827598" Alignment="LEFT"/> + <Column Id="13" Order="2" Title="Activity" Visible="1" RelWidth="0.4000008" Alignment="LEFT"/> + <Column Id="14" Order="3" Title="Time" Visible="1" RelWidth="0.0896558" Alignment="LEFT"/> + </List> + <State ModeAbsolute="0" UpdateEnabled="0"/> + </Tab> + </Tabs> + <List Id=""/> + </Window> + <Window Id="FileView" RelativePath="Relative2Project"> + <ApplFolder Id="STM3210X-XL_BANK2" State="Expanded"> + <Folder Id="CMSIS" State="Expanded"> + <File Id="..\..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport\core_cm3.c"/> + <File Id="..\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c"/> + </Folder> + <Folder Id="DOC" State="Not_Expanded"/> + <Folder Id="HiTOP" State="Expanded"> + <File Id=".\cstart_thumb2.asm"/> + </Folder> + <Folder Id="StdPeriph_Driver" State="Expanded"> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c"/> + <File Id="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c"/> + </Folder> + <Folder Id="STM32_EVAL" State="Expanded"> + <File Id="..\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\stm3210e_eval_lcd.c"/> + <File Id="..\..\..\..\..\..\Utilities\STM32_EVAL\stm32_eval.c"/> + </Folder> + <Folder Id="User" State="Expanded"> + <File Id="..\..\main.c"/> + <File Id=".\setstack.asm"/> + <File Id="..\..\stm32f10x_it.c"/> + </Folder> + <Folder Id="Source Files" State="Not_Expanded" RelativePath=""/> + </ApplFolder> + </Window> + </Windows> + <Version>V5.20</Version> + <DebugDevice> + <TargetProcessor Id="PARM"/> + <Derivative Id="STM32F103ZG" File="$(SYSTEMDIR)\Derivatives\ST Microelectronics\.\..\Arm\Default.drv" Vendor="ST Microelectronics"> + <InternalFlash Count="1"> + <Device Id="STM32F103xG" Index="0" RAMBase="" FlashBase="" Manufacturer="ST"/> + </InternalFlash> + </Derivative> + <Communication> + <Port>USB</Port> + <DeviceName>Tantino for Cortex-10083</DeviceName> + <PortAddress Value="-2147483648"/> + <BaudRate Value="0"/> + </Communication> + <SystemDir Path="C:\Program Files\Hitex\HiTOP53-CTX\Tantino-Cortex"/> + <ARMConfiguration Id="STM32F103ZG" SWJDP="1" Vendor="ST Microelectronics" EMB_ICE="0" Endianes="0" ProcType="30" ETM_EXIST="0" MCUFamily="STM32" RTCK_USED="0" Exceptions="STM32xxx_C_D_E" TRACE_AVAIL="1" DeviceToTest="2" ExtMemoryItf="YES" OnChipRAMAdr="0x20000000" OnChipRAMSize="0x18000" EndianessFixed="1" OnChipFlashAdr="0x8000000" OnChipFlashSize="0x100000" IR_CountBitsOfTD="4" CountDevicesInChain="2" IR_CountBitsBeforeTD="5" IR_CountBitsBehindTD="0"/>TANTINO_CORTEX_M3 + </DebugDevice> + <StartupScript File=".\Settings\StartupScript.scr" Execute="1" ProjRelative="1"/> + <EditorOptions Version="1"> + <Font lfHeight="-12" lfWeight="400" ColorBack="16777215" ColorText="0" lfCharSet="0" lfQuality="0" lfFaceName="Courier New" lfOutPrecision="0" ColorHiLiteBack="12937777" ColorHiLiteText="16777215" lfClipPrecision="0" lfPitchAndFamily="0"/> + <Tabulators Size="4" TabWithSpace="0"/> + <Options WideCaret="0" AutoIndent="1" AutoReload="1" HScrollBar="1" VScrollBar="1" LineNumbers="0" VirtualSpace="0" SyntaxColoring="1"/> + </EditorOptions> + <ConfigurationOptions> + <ProcessorSettings> + <ProcessorSetting Id="TarResHi" Value="0" Element=" 50ms"/> + <ProcessorSetting Id="DefMemAc" Value="2" Element=" 32bit"/> + <ProcessorSetting Id="TarReTAP" Value="0" Element=" no"/> + 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Count="10"/> + </DockBars> + </Layout> + </CommandBars> + </Layout> + </ScreenLayouts> + <HitopObjects> + <Watches> + <Watch Id="O3" Expr="RCC"/> + <Watch Id="O4" Expr="tmp"/> + <Watch Id="O5" Expr="0x1f&0x20"/> + <Watch Id="O1" Expr="SCB"/> + <Watch Id="O2" Expr="TimingDelay"/> + </Watches> + <Breakpoints/> + <MiniSequences/> + <TimerTriggers/> + </HitopObjects> + <DownloadOptions Verify="0"> + <PreLoadScript File="" Execute="0" ProjRelative="1"/> + </DownloadOptions> + <ExceptionAssistant> + <Exceptions Id="ARM low vectors" Count="7"> + <Exception Name="Reset" Number="0"/> + <Exception Name="Undefined Instruction" Number="1"/> + <Exception Name="SWI" Number="2"/> + <Exception Name="Prefetch Abort" Number="3"/> + <Exception Name="Data abort" Number="4"/> + <Exception Name="IRQ" Number="5"/> + <Exception Name="FIQ" Number="6"/> + </Exceptions> + <Interrupts Id="STR9 2x ARM - PL190" Count="64" VectorCount="32"> + <IRQ Name="Watchdog" Number="0"/> + <IRQ Name="Software interrupt" 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3" Number="29"/> + <IRQ Name="USB" Number="30"/> + <IRQ Name="PFW-BC" Number="31"/> + <IRQ Name="IRQ 32" Number="32"/> + <IRQ Name="IRQ 33" Number="33"/> + <IRQ Name="IRQ 34" Number="34"/> + <IRQ Name="IRQ 35" Number="35"/> + <IRQ Name="IRQ 36" Number="36"/> + <IRQ Name="IRQ 37" Number="37"/> + <IRQ Name="IRQ 38" Number="38"/> + <IRQ Name="IRQ 39" Number="39"/> + <IRQ Name="IRQ 40" Number="40"/> + <IRQ Name="IRQ 41" Number="41"/> + <IRQ Name="IRQ 42" Number="42"/> + <IRQ Name="IRQ 43" Number="43"/> + <IRQ Name="IRQ 44" Number="44"/> + <IRQ Name="IRQ 45" Number="45"/> + <IRQ Name="IRQ 46" Number="46"/> + <IRQ Name="IRQ 47" Number="47"/> + <IRQ Name="IRQ 48" Number="48"/> + <IRQ Name="IRQ 49" Number="49"/> + <IRQ Name="IRQ 50" Number="50"/> + <IRQ Name="IRQ 51" Number="51"/> + <IRQ Name="IRQ 52" Number="52"/> + <IRQ Name="IRQ 53" Number="53"/> + <IRQ Name="IRQ 54" Number="54"/> + <IRQ Name="IRQ 55" Number="55"/> + <IRQ Name="IRQ 56" Number="56"/> + <IRQ Name="IRQ 57" Number="57"/> + <IRQ Name="IRQ 58" Number="58"/> + <IRQ Name="IRQ 59" Number="59"/> + <IRQ Name="IRQ 60" Number="60"/> + <IRQ Name="IRQ 61" Number="61"/> + <IRQ Name="IRQ 62" Number="62"/> + <IRQ Name="IRQ 63" Number="63"/> + </Interrupts> + <Exceptions Id="cortex-M3 vectors" Count="10"> + <Exception Name="Reset" Number="0"/> + <Exception Name="NMI" Number="1"/> + <Exception Name="HardFault" Number="2"/> + <Exception Name="MemManage" Number="3"/> + <Exception Name="BusFault" Number="4"/> + <Exception Name="UsageFault" Number="5"/> + <Exception Name="SVCall" Number="6"/> + <Exception Name="DebugMon" Number="7"/> + <Exception Name="PendSV" Number="8"/> + <Exception Name="SysTick" Number="9"/> + </Exceptions> + <Interrupts Id="STM32_NVIC" Count="43" VectorCount="43"> + <Vector Number="0" Enabled="0"/> + <Vector Number="1" Enabled="0"/> + <Vector Number="2" Enabled="0"/> + <Vector Number="3" Enabled="0"/> + <Vector Number="4" Enabled="0"/> + <Vector Number="5" Enabled="0"/> + <Vector Number="6" Enabled="0"/> + <Vector Number="7" Enabled="0"/> + <Vector Number="8" Enabled="0"/> + <Vector Number="9" Enabled="0"/> + <Vector Number="10" Enabled="0"/> + <Vector Number="11" Enabled="0"/> + <Vector Number="12" Enabled="0"/> + <Vector Number="13" Enabled="0"/> + <Vector Number="14" Enabled="0"/> + <Vector Number="15" Enabled="0"/> + <Vector Number="16" Enabled="0"/> + <Vector Number="17" Enabled="0"/> + <Vector Number="18" Enabled="0"/> + <Vector Number="19" Enabled="0"/> + <Vector Number="20" Enabled="0"/> + <Vector Number="21" Enabled="0"/> + <Vector Number="22" Enabled="0"/> + <Vector Number="23" Enabled="0"/> + <Vector Number="24" Enabled="0"/> + <Vector Number="25" Enabled="0"/> + <Vector Number="26" Enabled="0"/> + <Vector Number="27" Enabled="0"/> + <Vector Number="28" Enabled="0"/> + <Vector Number="29" Enabled="0"/> + <Vector Number="30" Enabled="0"/> + <Vector Number="31" Enabled="0"/> + <Vector Number="32" Enabled="0"/> + <Vector Number="33" Enabled="0"/> + <Vector Number="34" Enabled="0"/> + <Vector Number="35" Enabled="0"/> + <Vector Number="36" Enabled="0"/> + <Vector Number="37" Enabled="0"/> + <Vector Number="38" Enabled="0"/> + <Vector Number="39" Enabled="0"/> + <Vector Number="40" Enabled="0"/> + <Vector Number="41" Enabled="0"/> + <Vector Number="42" Enabled="0"/> + <IRQ Name="WWDG" Number="0"/> + <IRQ Name="PVD" Number="1"/> + <IRQ Name="TAMPER" Number="2"/> + <IRQ Name="RTC" Number="3"/> + <IRQ Name="FLASH" Number="4"/> + <IRQ Name="RCC" Number="5"/> + <IRQ Name="EXTI 0" Number="6"/> + <IRQ Name="EXTI 1" Number="7"/> + <IRQ Name="EXTI 2" Number="8"/> + <IRQ Name="EXTI 3" Number="9"/> + <IRQ Name="EXTI 4" Number="10"/> + <IRQ Name="DMA Channel 1" Number="11"/> + <IRQ Name="DMA Channel 2" Number="12"/> + <IRQ Name="DMA Channel 3" Number="13"/> + <IRQ Name="DMA Channel 4" Number="14"/> + <IRQ Name="DMA Channel 5" Number="15"/> + <IRQ Name="DMA Channel 6" Number="16"/> + <IRQ Name="DMA Channel 7" Number="17"/> + <IRQ Name="ADC" Number="18"/> + <IRQ Name="USB_HP_CAN_TX" Number="19"/> + <IRQ Name="USB_LP_CAN_RX 0" Number="20"/> + <IRQ Name="CAN_RX 1" Number="21"/> + <IRQ Name="CAN_SCE" Number="22"/> + <IRQ Name="EXTI 5-9" Number="23"/> + <IRQ Name="TIM 1 BRK" Number="24"/> + <IRQ Name="TIM 1 UP" Number="25"/> + <IRQ Name="TIM 1 TRG COM" Number="26"/> + <IRQ Name="TIM 1 CC" Number="27"/> + <IRQ Name="TIM 2" Number="28"/> + <IRQ Name="TIM 3" Number="29"/> + <IRQ Name="TIM 4" Number="30"/> + <IRQ Name="I2C 1 EV" Number="31"/> + <IRQ Name="I2C 1 ER" Number="32"/> + <IRQ Name="I2C 2 EV" Number="33"/> + <IRQ Name="I2C 2 ER" Number="34"/> + <IRQ Name="SPI 1" Number="35"/> + <IRQ Name="SPI 2" Number="36"/> + <IRQ Name="USART 1" Number="37"/> + <IRQ Name="USART 2" Number="38"/> + <IRQ Name="USART 3" Number="39"/> + <IRQ Name="EXTI 10-15" Number="40"/> + <IRQ Name="RTC ALARM" Number="41"/> + <IRQ Name="USB Wakeup" Number="42"/> + </Interrupts> + <Exceptions Id="STM32xxx_C_D_E" Count="76"> + <Exception Name="" Number="0"/> + <Exception Name="Reset" Number="1"/> + <Exception Name="NMI" Number="2"/> + <Exception Name="HardFault" Number="3"/> + <Exception Name="MemManage" Number="4"/> + <Exception Name="BusFault" Number="5"/> + <Exception Name="UsageFault" Number="6"/> + <Exception Name="Reserved" Number="7"/> + <Exception Name="Reserved" Number="8"/> + <Exception Name="Reserved" Number="9"/> + <Exception Name="Reserved" Number="10"/> + <Exception Name="SVCall" Number="11"/> + <Exception Name="DebugMon" Number="12"/> + <Exception Name="Reserved" Number="13"/> + <Exception Name="PendSV" Number="14"/> + <Exception Name="SysTick" Number="15"/> + <Exception Name="WWDG" Number="16"/> + <Exception Name="PVD" Number="17"/> + <Exception Name="TAMPER" Number="18"/> + <Exception Name="RTC" Number="19"/> + <Exception Name="FLASH" Number="20"/> + <Exception Name="RCC" Number="21"/> + <Exception Name="EXTI_0" Number="22"/> + <Exception Name="EXTI_1" Number="23"/> + <Exception Name="EXTI_2" Number="24"/> + <Exception Name="EXTI_3" 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MRUWidth="32767" PointPos="0, 23" MRUDockPos="-12, 27, 363, 54"/> + </DockState> + <DockBars> + <DockBar0 Id1="1" Id3="9025" Id4="128" Id6="10066" Id7="4004" Count="9"/> + </DockBars> + </Layout> + </CommandBars> + </Layout> + </RecentScreenLayouts> + <LinkerApplications Count="1" RelPath="1" AutoLoad="0" CurrentIdeApp="STM3210X-XL_BANK2" AutoDetectChanges="1"> + <Loader Id="TaskingCED"/> + <Application Pos="0" Load="1" AppName="STM3210X-XL_BANK2" CodeFile=".\objects\STM3210X-XL_BANK2.htx" LinkerFile=".\objects\STM3210X-XL_BANK2.abs" CurrentBuild="STM3210X-XL_BANK2"> + <SymbolLoader ProjRel="1" MessageFile="" LoaderVersion="sparmed52.dll : 5.20.736.0" NeedsSymprepRun="0" SymbolFileFormat="V2.4.0"> + <Options Cache="128" Reload="RELOAD" CmdFile="" DestDir=".\objects\" OnlySym="0" StdCode="" Verbose="1" CtrlFile="" WarnLevel="0"> + <SourcePath> + <Path Text="..\..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport\"/> + <Path Text="..\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\"/> + <Path Text=".\"/> + <Path Text="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\"/> + <Path Text="..\..\..\..\..\..\Utilities\STM32_EVAL\"/> + <Path Text="..\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\"/> + <Path Text="..\..\"/> + </SourcePath> + <ProcessorSpecific> + <Option Text="FW_TYPES"/> + </ProcessorSpecific> + <DebugModules Include="1"/> + </Options> + </SymbolLoader> + <RTOS Id="" Dll=""/> + <BuildConfiguration Id="STM3210X-XL_BANK2" File="" ToolId="IdeTaskingARM" BuildCfgChanged="false"> + <General OutputPath=".\objects\" TargetName="STM3210X-XL_BANK2.abs"> + <IncludePath Path="..\..\" Position="0"/> + <IncludePath Path="..\..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport\" Position="1"/> + <IncludePath Path="..\..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\" Position="2"/> + <IncludePath Path="..\..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc\" Position="3"/> + <IncludePath Path="..\..\..\..\..\..\Utilities\STM32_EVAL\" Position="4"/> + <IncludePath Path="..\..\..\..\..\..\Utilities\STM32_EVAL\Common\" Position="5"/> + <IncludePath Path="..\..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL\" Position="6"/> + </General> + <Assembler Options="-co -CARMv7M -Wa-il -Wa-gs -v "/> + <Compiler Defines="USE_STDPERIPH_DRIVER;STM32F10X_XL;USE_STM3210E_EVAL; BOOT_FROM_BANK2" Options="-co -CARMv7M -Wc--align-composites=n -Wc-O1 -Wc-c99 -Wc-AGx -Wc-ga -v -Wa-L1 -Wc-w560 -Wc-w523 -Wc-t4 "/> + <Linker File=".\Settings\link.lnk" Options="-Wl-L"$(TOOLDIR)..\lib" -Wl-OcLtXy -CARMv7M -Wl-lfpthumb -o"$(TargetDir)$(Target)" " PostBuild=""/> + </BuildConfiguration> + </Application> + </LinkerApplications> + <ScriptBarSettings> + <ScriptButton Id="1" File=".\Settings\reset_appl.scr" ButtonText="RESET_APPL" ProjRelative="1"/> + <ScriptButton Id="2" File=".\Settings\reset_go_main.scr" ButtonText="RESET_GO_MAIN" ProjRelative="1"/> + <ScriptButton Id="3" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="4" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="5" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="6" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="7" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="8" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="9" File="" ButtonText="" ProjRelative="1"/> + <ScriptButton Id="10" File="" ButtonText="" ProjRelative="1"/> + </ScriptBarSettings> +</HiTOPProject> + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/STM32F10x_XL_Bank2.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/STM32F10x_XL_Bank2.lsl new file mode 100644 index 0000000..72adf78 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/STM32F10x_XL_Bank2.lsl @@ -0,0 +1,173 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08080000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08080000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ +section_layout ::linear +{ + group( contiguous ) + { + select ".bss.stack"; + select "stack"; + } +} + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/StartupScript.scr b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/StartupScript.scr new file mode 100644 index 0000000..e3dbe23 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/StartupScript.scr @@ -0,0 +1,9 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/arm_arch.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/arm_arch.lsl new file mode 100644 index 0000000..3e6d303 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/arm_arch.lsl @@ -0,0 +1,287 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : arm_arch.lsl +// +// Version : @(#)arm_arch.lsl 1.4 09/04/17 +// +// Description : Generic LSL file for ARM architectures +// +// Copyright 2008-2009 Altium BV +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __STACK +# define __STACK 32k +#endif +#ifndef __HEAP +# define __HEAP 32k +#endif +#ifndef __STACK_FIQ +# define __STACK_FIQ 8 +#endif +#ifndef __STACK_IRQ +# define __STACK_IRQ 8 +#endif +#ifndef __STACK_SVC +# define __STACK_SVC 8 +#endif +#ifndef __STACK_ABT +# define __STACK_ABT 8 +#endif +#ifndef __STACK_UND +# define __STACK_UND 8 +#endif +#ifndef __PROCESSOR_MODE +# define __PROCESSOR_MODE 0x1F /* SYS mode */ +#endif +#ifndef __IRQ_BIT +# define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ +#endif +#ifndef __FIQ_BIT +# define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ +#endif + +#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x00000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + +#if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) +# ifndef __NR_OF_VECTORS +# define __NR_OF_VECTORS 16 +# endif +# define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) +#else +# ifdef __PIC_VECTORS +# define __VECTOR_TABLE_SIZE 64 +# else +# ifdef __FIQ_HANDLER_INLINE +# define __VECTOR_TABLE_SIZE 28 +# define __NR_OF_VECTORS 7 +# else +# define __VECTOR_TABLE_SIZE 32 +# define __NR_OF_VECTORS 8 +# endif +# endif +#endif + +#ifndef __VECTOR_TABLE_RAM_SPACE +# undef __VECTOR_TABLE_RAM_COPY +#endif + +#ifndef __XVWBUF +# define __XVWBUF 0 /* buffer used by CrossView Pro */ +#endif + +#define BOUNDS_GROUP_NAME grp_bounds +#define BOUNDS_GROUP_SELECT "bounds" + +architecture ARM +{ + endianness + { + little; + big; + } + + space linear + { + id = 1; + mau = 8; + map (size = 4G, dest = bus:local_bus); + + copytable + ( + align = 4, + copy_unit = 1, + dest = linear + ); + + start_address + ( + // It is not strictly necessary to define a run_addr for _START + // because hardware starts execution at address 0x0 which should + // be the vector table with a jump to the relocatable _START, but + // an absolute address can prevent the branch to be out-of-range. + // Or _START may be the entry point at reset and the reset handler + // copies the vector table to address 0x0 after some ROM/RAM memory + // re-mapping. In that case _START should be at a fixed address + // in ROM, specifically the alias of address 0x0 before memory + // re-mapping. +#ifdef __START + run_addr = __START, +#endif + symbol = "_START" + ); + + stack "stack" + ( +#ifdef __STACK_FIXED + fixed, +#endif + align = 4, + min_size = __STACK, + grows = high_to_low + ); + + heap "heap" + ( +#ifdef __HEAP_FIXED + fixed, +#endif + align = 4, + min_size=__HEAP + ); + +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + stack "stack_fiq" + ( + fixed, + align = 4, + min_size = __STACK_FIQ, + grows = high_to_low + ); + stack "stack_irq" + ( + fixed, + align = 4, + min_size = __STACK_IRQ, + grows = high_to_low + ); + stack "stack_svc" + ( + fixed, + align = 4, + min_size = __STACK_SVC, + grows = high_to_low + ); + stack "stack_abt" + ( + fixed, + align = 4, + min_size = __STACK_ABT, + grows = high_to_low + ); + stack "stack_und" + ( + fixed, + align = 4, + min_size = __STACK_UND, + grows = high_to_low + ); +#endif + +#if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) +# if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work + vector ( id = 1, fill = "_START" ); + } +# else +# ifdef __PIC_VECTORS + // vector table with ldrpc instructions from handler table + vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_ldrpc", + template_symbol = "_lc_vector_ldrpc", + vector_prefix = "_vector_ldrpc_", + fill = loop + ) + { + } + // subsequent vector table (data pool) with addresses of handlers + vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop[-32], + no_inline + ) + { + vector ( id = 0, fill = "_START" ); + } +# else + // vector table with branch instructions to handlers + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.vector_branch", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop + ) + { + vector ( id = 0, fill = "_START" ); + } +# endif +# endif +#endif + section_layout + { +#if defined(__NO_AUTO_VECTORS) + "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; + "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; +#endif +#ifdef __VECTOR_TABLE_RAM_SPACE + // reserve space to copy vector table from ROM to RAM + group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) + reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); +#endif +#ifdef __VECTOR_TABLE_RAM_COPY + // provide copy address symbols for copy routine + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; +#else + // prevent copy: copy address equals orig address + "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; + "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; +#endif + // define buffer for string input via Crossview Pro debugger + group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); + + // define labels for bounds begin and end as used in C library +#ifndef BOUNDS_GROUP_REDEFINED + group BOUNDS_GROUP_NAME (ordered, contiguous) + { + select BOUNDS_GROUP_SELECT; + } +#endif + "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); + "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); + +#ifdef __HEAPADDR + group ( ordered, run_addr=__HEAPADDR ) + { + select "heap"; + } +#endif +#ifdef __STACKADDR + group ( ordered, run_addr=__STACKADDR ) + { + select "stack"; + } +#endif +#if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) + // symbol to set mode bits and interrupt disable bits + // in cstart module before calling the application (main) + "_APPLICATION_MODE_" = __APPLICATION_MODE; +#endif + } + } + + bus local_bus + { + mau = 8; + width = 32; + } +} diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/link.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/link.lnk new file mode 100644 index 0000000..a3b94a1 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/link.lnk @@ -0,0 +1,4 @@ +-d"./settings/STM32F10x_XL_Bank2.lsl" +--optimize=0 +--map-file-format=2 +$(LinkObjects) diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/reset_appl.scr b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/reset_appl.scr new file mode 100644 index 0000000..d90eb15 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/reset_appl.scr @@ -0,0 +1,8 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application + +// Reset +RESET TARGET + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/reset_go_main.scr b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/reset_go_main.scr new file mode 100644 index 0000000..3e9c066 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/Settings/reset_go_main.scr @@ -0,0 +1,12 @@ +// Hitex/Lue/11.02.2008 +// Executable Script file for HiTOP Debugger +// Reset application & Go main + +// Reset +RESET TARGET + + +// execute program till main +Go UNTIL main +wait + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/cstart_thumb2.asm b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/cstart_thumb2.asm new file mode 100644 index 0000000..12dc0d0 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/cstart_thumb2.asm @@ -0,0 +1,148 @@ + + +;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M, +;; we will only use 16-bit Thumb intructions. + + .extern _lc_ub_stack ; usr/sys mode stack pointer + .extern _lc_ue_stack ; symbol required by debugger + .extern _lc_ub_table ; ROM to RAM copy table + .extern main + .extern _Exit + .extern exit + .weak exit + .global __get_argcv + .weak __get_argcv + .extern __argcvbuf + .weak __argcvbuf + .extern __init_hardware + .extern __init_vector_table + .extern SystemInit + + .if @defined('__PROF_ENABLE__') + .extern __prof_init + .endif + .if @defined('__POSIX__') + .extern posix_main + .extern _posix_boot_stack_top + .endif + + .global _START + + .section .text.cstart + + .thumb +_START: + ;; anticipate possible ROM/RAM remapping + ;; by loading the 'real' program address + ldr r1,=_Next + bx r1 +_Next: + ;; initialize the stack pointer + ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table + mov sp,r1 + + ;; call a user function which initializes hardware + ;; such as ROM/RAM re-mapping or MMU configuration + bl __init_hardware + + ;ldr r0, =SystemInit + ;bx r0 + bl SystemInit + + ;; copy initialized sections from ROM to RAM + ;; and clear uninitialized data sections in RAM + + ldr r3,=_lc_ub_table + movs r0,#0 +cploop: + ldr r4,[r3,#0] ; load type + ldr r5,[r3,#4] ; dst address + ldr r6,[r3,#8] ; src address + ldr r7,[r3,#12] ; size + + cmp r4,#1 + beq copy + cmp r4,#2 + beq clear + b done + +copy: + subs r7,r7,#1 + ldrb r1,[r6,r7] + strb r1,[r5,r7] + bne copy + + adds r3,r3,#16 + b cploop + +clear: + subs r7,r7,#1 + strb r0,[r5,r7] + bne clear + + adds r3,r3,#16 + b cploop + +done: + ;; initialize or copy the vector table + bl __init_vector_table + + .if @defined('__POSIX__') + + ;; posix stack buffer for system upbringing + ldr r0,=_posix_boot_stack_top + ldr r0, [r0] + mov sp,r0 + + .else + + ;; load r10 with end of USR/SYS stack, which is + ;; needed in case stack overflow checking is on + ;; NOTE: use 16-bit instructions only, for ARMv6M + ldr r0,=_lc_ue_stack + mov r10,r0 + + .endif + + .if @defined('__PROF_ENABLE__') + bl __prof_init + .endif + + .if @defined('__POSIX__') + ;; call posix_main with no arguments + bl posix_main + .else + ;; retrieve argc and argv (default argv[0]==NULL & argc==0) + bl __get_argcv + ldr r1,=__argcvbuf + ;; call main + bl main + .endif + + ;; call exit using the return value from main() + ;; Note. Calling exit will also run all functions + ;; that were supplied through atexit(). + bl exit + +__get_argcv: ; weak definition + movs r0,#0 + bx lr + + .ltorg + .endsec + + .calls '_START','__init_hardware' + .calls '_START','__init_vector_table' + .if @defined('__PROF_ENABLE__') + .calls '_START','__prof_init' + .endif + .if @defined('__POSIX__') + .calls '_START','posix_main' + .else + .calls '_START','__get_argcv' + .calls '_START','main' + .endif + .calls '_START','exit' + .calls '_START','',0 + + .end diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/setstack.asm b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/setstack.asm new file mode 100644 index 0000000..2c11b4c --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK2/setstack.asm @@ -0,0 +1,4 @@ + .section .bss.stack + .global _stacklabel +_stacklabel: + .endsec
\ No newline at end of file diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvopt b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvopt new file mode 100644 index 0000000..eca625f --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvopt @@ -0,0 +1,2262 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>STM32F10X_XL_BANK1</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32F10X_XL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Reference Manual</Title> + <Path>DATASHTS\ST\STM32F10xxx.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZG</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZG</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UV0579U9E -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_1024 -FS08000000 -FL0100000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32F10X_XL_BANK2</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32F10X_XL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Reference Manual</Title> + <Path>DATASHTS\ST\STM32F10xxx.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZG</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZG</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + 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</Window> + <Window> + <WinId>35890</WinId> + <ItemNo>48</ItemNo> + <Name>not set</Name> + <AnchorWinID>35889</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + <DockedRect_bottom>600</DockedRect_bottom> + <DockedRect_right>210</DockedRect_right> + <FloatingRect_top>0</FloatingRect_top> + <FloatingRect_left>0</FloatingRect_left> + <FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + <Window> + <WinId>35891</WinId> + <ItemNo>49</ItemNo> + <Name>not set</Name> + <AnchorWinID>35890</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + 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</Window> + <Window> + <WinId>35895</WinId> + <ItemNo>53</ItemNo> + <Name>not set</Name> + <AnchorWinID>35894</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + <DockedRect_bottom>600</DockedRect_bottom> + <DockedRect_right>210</DockedRect_right> + <FloatingRect_top>0</FloatingRect_top> + <FloatingRect_left>0</FloatingRect_left> + <FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + <Window> + <WinId>35896</WinId> + <ItemNo>54</ItemNo> + <Name>not set</Name> + <AnchorWinID>35895</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + 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</Window> + <Window> + <WinId>35900</WinId> + <ItemNo>58</ItemNo> + <Name>not set</Name> + <AnchorWinID>35899</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + <DockedRect_bottom>600</DockedRect_bottom> + <DockedRect_right>210</DockedRect_right> + <FloatingRect_top>0</FloatingRect_top> + <FloatingRect_left>0</FloatingRect_left> + <FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + <Window> + <WinId>35901</WinId> + <ItemNo>59</ItemNo> + <Name>not set</Name> + <AnchorWinID>35900</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + <DockedRect_bottom>600</DockedRect_bottom> + <DockedRect_right>210</DockedRect_right> + <FloatingRect_top>0</FloatingRect_top> + <FloatingRect_left>0</FloatingRect_left> + <FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + <Window> + <WinId>35902</WinId> + <ItemNo>60</ItemNo> + <Name>not set</Name> + <AnchorWinID>35901</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + 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<FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + <Window> + <WinId>35904</WinId> + <ItemNo>62</ItemNo> + <Name>not set</Name> + <AnchorWinID>35903</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + <DockedRect_bottom>600</DockedRect_bottom> + <DockedRect_right>210</DockedRect_right> + <FloatingRect_top>0</FloatingRect_top> + <FloatingRect_left>0</FloatingRect_left> + <FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + <Window> + <WinId>35905</WinId> + <ItemNo>63</ItemNo> + <Name>not set</Name> + <AnchorWinID>35904</AnchorWinID> + <AnchorWinName>???</AnchorWinName> + <OtherWinID>0</OtherWinID> + <OtherWinName></OtherWinName> + <WinType>1</WinType> + <DockType>4</DockType> + <DockLocation>2</DockLocation> + <Pinned>0</Pinned> + <DockedRect_top>0</DockedRect_top> + <DockedRect_left>0</DockedRect_left> + <DockedRect_bottom>600</DockedRect_bottom> + <DockedRect_right>210</DockedRect_right> + <FloatingRect_top>0</FloatingRect_top> + <FloatingRect_left>0</FloatingRect_left> + <FloatingRect_bottom>600</FloatingRect_bottom> + <FloatingRect_right>250</FloatingRect_right> + <ContainerPercent>100</ContainerPercent> + <ActiveTab>0</ActiveTab> + <Visible>0</Visible> + <Dynamic>0</Dynamic> + </Window> + </View> + </WinLayout> + + <MDIGroups> + <Orientation>1</Orientation> + <ActiveMDIGroup>0</ActiveMDIGroup> + <MDIGroup> + <Size>100</Size> + <ActiveTab>0</ActiveTab> + <Documents> + <Doc> + <Name>..\main.c</Name> + <ColumnNumber>4</ColumnNumber> + <TopLine>79</TopLine> + <CurrentLine>85</CurrentLine> + </Doc> + </Documents> + </MDIGroup> + </MDIGroups> + +</ProjectOpt> diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvproj b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvproj new file mode 100644 index 0000000..d63a62b --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/MDK-ARM/Project.uvproj @@ -0,0 +1,1007 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>STM32F10X_XL_BANK1</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103ZG</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x20017FFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32F10x.s" ("STM32 Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000)</FlashDriverDll> + <DeviceId>5094</DeviceId> + <RegisterFile>stm32f10x_lib.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F10x\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\STM32F10X_XL\</OutputDirectory> + <OutputName>STM32F10X_XL_BANK1</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\STM32F10X_XL\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments>-pSTM32F103ZG</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pSTM32F103ZG</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\UL2CM3.DLL</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_STDPERIPH_DRIVER, STM32F10X_XL, USE_STM3210E_EVAL, BOOT_FROM_BANK1</Define> + <Undefine></Undefine> + <IncludePath>..\;..\..\..\..\..\Libraries\CMSIS\CM3\CoreSupport;..\..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;..\..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\..\..\..\Utilities\STM32_EVAL;..\..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL;..\..\..\..\..\Utilities\STM32_EVAL\Common</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + 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a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.project b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.project new file mode 100644 index 0000000..cb11100 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.project @@ -0,0 +1,196 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32F10X_XL_BANK1</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM32F103ZG/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>STM32_EVAL</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>StdPeriph_Driver</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>CMSIS/core_cm3.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/readme.txt</locationURI> + </link> + <link> + <name>STM32_EVAL/stm3210e_eval_lcd.c</name> + <type>1</type> + <locationURI>CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_lcd.c</locationURI> + </link> + <link> + <name>STM32_EVAL/stm32_eval.c</name> + <type>1</type> + <locationURI>CurPath/Utilities/STM32_EVAL/stm32_eval.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_dma.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_flash.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_fsmc.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_i2c.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_sdio.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_spi.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_xl.s</name> + <type>1</type> + <locationURI>CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_xl.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.c</locationURI> + </link> + <link> + <name>User/stm32f10x_it.c</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..a3b6606 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZG +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/stm32f10x_flash_xl_bank1.ld b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/stm32f10x_flash_xl_bank1.ld new file mode 100644 index 0000000..f9c3fbf --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK1/stm32f10x_flash_xl_bank1.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32f10x_flash_xl_bank1.ld +** +** Abstract : Linker script for loading program in BANK1 of STM32F103ZG flash +** memory. +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of 96K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.cproject b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.cproject new file mode 100644 index 0000000..8134951 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.cproject @@ -0,0 +1,263 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> +<storageModule moduleId="org.eclipse.cdt.core.settings"> +<cconfiguration id="com.atollic.truestudio.exe.debug.189815562"> +<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.atollic.truestudio.exe.debug.189815562" moduleId="org.eclipse.cdt.core.settings" name="Debug"> +<externalSettings/> +<extensions> +<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/> +<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> +<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> +<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> +</extensions> +</storageModule> +<storageModule moduleId="cdtBuildSystem" version="4.0.0"> +<configuration artifactExtension="elf" artifactName="STM32F10X_XL_BANK2" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="" id="com.atollic.truestudio.exe.debug.189815562" name="Debug" parent="com.atollic.truestudio.exe.debug" postbuildStep="" prebuildStep=""> +<folderInfo id="com.atollic.truestudio.exe.debug.189815562." name="/" resourcePath=""> +<toolChain id="com.atollic.truestudio.exe.debug.toolchain.1571285751" name="Atollic ARM Tools" superClass="com.atollic.truestudio.exe.debug.toolchain"> +<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.GNU_ELF" id="com.atollic.truestudio.exe.debug.toolchain.platform.1739352405" isAbstract="false" name="Debug platform" superClass="com.atollic.truestudio.exe.debug.toolchain.platform"/> +<builder buildPath="${workspace_loc:/STM32F103ZG/Debug}" id="com.atollic.truestudio.mbs.builder1.61462586" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="CDT Internal Builder" superClass="com.atollic.truestudio.mbs.builder1"/> +<tool command="arm-atollic-eabi-gcc -c" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX} ${OUTPUT} ${INPUTS}" id="com.atollic.truestudio.exe.debug.toolchain.as.371140336" name="Assembler" superClass="com.atollic.truestudio.exe.debug.toolchain.as"> +<option id="com.atollic.truestudio.common_options.target.endianess.1578134158" name="Endianess" superClass="com.atollic.truestudio.common_options.target.endianess"/> +<option id="com.atollic.truestudio.common_options.target.mcpu.1314431980" name="Microcontroller" superClass="com.atollic.truestudio.common_options.target.mcpu" value="STM32F103ZE" valueType="enumerated"/> +<option id="com.atollic.truestudio.common_options.target.instr_set.387750939" name="Instruction set" superClass="com.atollic.truestudio.common_options.target.instr_set" value="com.atollic.truestudio.common_options.target.instr_set.thumb2" valueType="enumerated"/> +<inputType id="com.atollic.truestudio.as.input.1699410786" name="Input" superClass="com.atollic.truestudio.as.input"/> +</tool> +<tool commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX} ${OUTPUT} ${INPUTS}" id="com.atollic.truestudio.exe.debug.toolchain.gcc.486923113" name="C Compiler" superClass="com.atollic.truestudio.exe.debug.toolchain.gcc"> +<option id="com.atollic.truestudio.gcc.directories.select.1744802288" name="Include path" superClass="com.atollic.truestudio.gcc.directories.select" valueType="includePath"> +<listOptionValue builtIn="false" value=""../..\..\""/> +<listOptionValue builtIn="false" value="../../../../../../../Libraries/CMSIS/CM3/CoreSupport"/> +<listOptionValue builtIn="false" value="../../../../../../../Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x"/> +<listOptionValue builtIn="false" value="../../../../../../../Libraries/STM32F10x_StdPeriph_Driver/inc"/> +<listOptionValue builtIn="false" value="../../../../../../../Utilities/STM32_EVAL"/> +<listOptionValue builtIn="false" value="../../../../../../../Utilities/STM32_EVAL/Common"/> +<listOptionValue builtIn="false" value="../../../../../../../Utilities/STM32_EVAL/STM3210E_EVAL"/> +</option> +<option id="com.atollic.truestudio.gcc.symbols.defined.1922813422" name="Defined symbols" superClass="com.atollic.truestudio.gcc.symbols.defined" valueType="definedSymbols"> +<listOptionValue builtIn="false" value="USE_STDPERIPH_DRIVER"/> +<listOptionValue builtIn="false" value="USE_STM3210E_EVAL"/> +<listOptionValue builtIn="false" value="STM32F10X_XL"/> +<listOptionValue builtIn="false" value="BOOT_FROM_BANK2"/> +</option> +<option id="com.atollic.truestudio.common_options.target.endianess.529651997" name="Endianess" superClass="com.atollic.truestudio.common_options.target.endianess"/> +<option id="com.atollic.truestudio.common_options.target.mcpu.1684401938" name="Microcontroller" superClass="com.atollic.truestudio.common_options.target.mcpu" value="STM32F103ZE" valueType="enumerated"/> +<option id="com.atollic.truestudio.common_options.target.instr_set.1997653104" name="Instruction set" superClass="com.atollic.truestudio.common_options.target.instr_set" value="com.atollic.truestudio.common_options.target.instr_set.thumb2" valueType="enumerated"/> +<option id="com.atollic.truestudio.gcc.optimization.prep_garbage.586288316" name="Prepare dead code removal" superClass="com.atollic.truestudio.gcc.optimization.prep_garbage" value="true" valueType="boolean"/> +<option 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b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.project new file mode 100644 index 0000000..d32fbd6 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.project @@ -0,0 +1,196 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32F10X_XL_BANK2</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + 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</arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>STM32_EVAL</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>StdPeriph_Driver</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/.metadata/Link</locationURI> + </link> + <link> + <name>CMSIS/core_cm3.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/readme.txt</locationURI> + </link> + <link> + <name>STM32_EVAL/stm3210e_eval_lcd.c</name> + <type>1</type> + <locationURI>CurPath/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_lcd.c</locationURI> + </link> + <link> + <name>STM32_EVAL/stm32_eval.c</name> + <type>1</type> + <locationURI>CurPath/Utilities/STM32_EVAL/stm32_eval.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_dma.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_flash.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_fsmc.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_i2c.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_sdio.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_spi.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</locationURI> + </link> + <link> + <name>StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>CurPath/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_xl.s</name> + <type>1</type> + <locationURI>CurPath/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_xl.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.c</locationURI> + </link> + <link> + <name>User/stm32f10x_it.c</name> + <type>1</type> + <locationURI>CurPath/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..a3b6606 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,11 @@ +#Tue Jul 13 09:06:52 GMT+01:00 2010 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZG +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=1 +TARGET=STM32 +VERSION=1.4.0 +eclipse.preferences.version=1 diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/stm32f10x_flash_xl_bank2.ld b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/stm32f10x_flash_xl_bank2.ld new file mode 100644 index 0000000..2b96afe --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/TrueSTUDIO/STM32F10X_XL_BANK2/stm32f10x_flash_xl_bank2.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32f10x_flash_xl_bank2.ld +** +** Abstract : Linker script for loading program in BANK2 of STM32F103ZG flash +** memory. +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of 96K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08080000, LENGTH = 512K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.c new file mode 100644 index 0000000..9a1b53e --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.c @@ -0,0 +1,300 @@ +/** + ****************************************************************************** + * @file FLASH/Dual_Boot/main.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main program body + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + +/** @addtogroup Dual_Boot + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus; + +/* Private define ------------------------------------------------------------*/ +/* Uncomment one of the lines below to select which bank to boot from */ +#if !defined(BOOT_FROM_BANK1) && !defined(BOOT_FROM_BANK2) +//#define BOOT_FROM_BANK1 /* The program will be loaded on Flash Bank1 */ +//#define BOOT_FROM_BANK2 /* The program will be loaded on Flash Bank2 */ +#endif + +#if defined(BOOT_FROM_BANK1) + #define MESSAGE4 " Running from Bank 1" +#elif defined(BOOT_FROM_BANK2) + #define MESSAGE4 " Running from Bank 2" +#else + #error "Select Boot from Bank1 or Bank2 using defines:BOOT_FROM_BANK1 or BOOT_FROM_BANK2!" +#endif + +#define MESSAGE1 " STM32 XL Density " +#define MESSAGE2 " Device running on " +#define MESSAGE3 " STM3210E-EVAL " + +#define MESSAGE5 " Joystick-DOWN: reset BFB2" +#define MESSAGE6 " bit to Boot from Bank2 " +#define MESSAGE7 " Joystick-UP: set BFB2 " +#define MESSAGE8 " bit to Boot from Bank1 " + +#define MESSAGE9 " Joystick-SEL: program to " +#define MESSAGE10 " 0x0 the base @ of Bank1/2" + +#define MESSAGE11 " Operation Failed !" +#define MESSAGE12 "Bank 1/2 base @ -> 0" + +#define BANK1_START_ADDRESS 0x08000000 +#define BANK2_START_ADDRESS 0x08080000 + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +USART_InitTypeDef USART_InitStructure; + +static __IO uint32_t TimingDelay; +RCC_ClocksTypeDef RCC_Clocks; + +/* Private function prototypes -----------------------------------------------*/ +void Delay(__IO uint32_t nTime); + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Main program + * @param None + * @retval None + */ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + + /* Set the vector table address */ +#if defined(BOOT_FROM_BANK1) + /* Set the vector table to the Bank1 start address */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, BANK1_START_ADDRESS); +#elif defined(BOOT_FROM_BANK2) + /* Set the vector table to the Bank1 start address */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, BANK2_START_ADDRESS); +#endif /* BOOT_FROM_BANK1 */ + + /* Initialize LEDs, Buttons and LCD on STM3210E-EVAL board *****************/ + STM_EVAL_LEDInit(LED1); + STM_EVAL_LEDInit(LED2); + STM_EVAL_LEDInit(LED3); + STM_EVAL_LEDInit(LED4); + + /* SysTick end of count event each 10ms */ + RCC_GetClocksFreq(&RCC_Clocks); + SysTick_Config(RCC_Clocks.HCLK_Frequency / 100); + + /* Configure the Joystick buttons */ + STM_EVAL_PBInit(BUTTON_UP, BUTTON_MODE_GPIO); + STM_EVAL_PBInit(BUTTON_SEL, BUTTON_MODE_GPIO); + STM_EVAL_PBInit(BUTTON_DOWN, BUTTON_MODE_GPIO); + /* Initialize the LCD */ + STM3210E_LCD_Init(); + + /* Display message on STM3210E-EVAL LCD *************************************/ + /* Clear the LCD */ + LCD_Clear(LCD_COLOR_WHITE); + + /* Set the LCD Back Color */ +#if defined(BOOT_FROM_BANK1) + LCD_SetBackColor(LCD_COLOR_BLUE); +#elif defined(BOOT_FROM_BANK2) + LCD_SetBackColor(LCD_COLOR_RED); +#endif /* BOOT_FROM_BANK1 */ + + /* Set the LCD Text Color */ + LCD_SetTextColor(LCD_COLOR_WHITE); + LCD_DisplayStringLine(LCD_LINE_0, MESSAGE1); + LCD_DisplayStringLine(LCD_LINE_1, MESSAGE2); + LCD_DisplayStringLine(LCD_LINE_2, MESSAGE3); + LCD_DisplayStringLine(LCD_LINE_4, MESSAGE4); + + LCD_SetFont(&Font12x12); + LCD_DisplayStringLine(LCD_LINE_12, MESSAGE5); + LCD_DisplayStringLine(LCD_LINE_13, MESSAGE6); + LCD_DisplayStringLine(LCD_LINE_15, MESSAGE7); + LCD_DisplayStringLine(LCD_LINE_16, MESSAGE8); + LCD_DisplayStringLine(LCD_LINE_18, MESSAGE9); + LCD_DisplayStringLine(LCD_LINE_19, MESSAGE10); + LCD_SetFont(&Font16x24); + + /* Turn on leds available on STM3210E-EVAL **********************************/ + STM_EVAL_LEDOn(LED1); + STM_EVAL_LEDOn(LED2); + STM_EVAL_LEDOn(LED3); + STM_EVAL_LEDOn(LED4); + + /* Infinite loop */ + while (1) + { + /*--- If Joystick DOWN button is pushed, reset BFB2 bit to enable boot from Bank2 + (active after next reset, w/ Boot pins set in Boot from Flash memory position ---*/ + if (STM_EVAL_PBGetState(BUTTON_DOWN) == 0) + { + /* Reset BFB2 bit to enable boot from Flash Bank2 */ + FLASH_Unlock(); + FLASH_EraseOptionBytes(); + + if (FLASH_BootConfig(FLASH_BOOT_Bank2) == FLASH_COMPLETE) + { + /* Generate System Reset to load the new option byte values */ + NVIC_SystemReset(); + } + else + { + /* Display information */ + LCD_DisplayStringLine(LCD_LINE_6, MESSAGE11); + } + } + + /*--- If Joystick UP button is pushed, set BFB2 bit to enable boot from Bank1 + (active after next reset, w/ Boot pins set in Boot from Flash memory position ---*/ + if (STM_EVAL_PBGetState(BUTTON_UP) == 0) + { + /* Set BFB2 bit to enable boot from Flash Bank2 */ + FLASH_Unlock(); + FLASH_EraseOptionBytes(); + if (FLASH_BootConfig(FLASH_BOOT_Bank1) == FLASH_COMPLETE) + { + /* Generate System Reset to load the new option byte values */ + NVIC_SystemReset(); + } + else + { + /* Display information */ + LCD_DisplayStringLine(LCD_LINE_6, MESSAGE11); + } + } + + /*--- If Joystick UP button is pushed, program the content of address 0x08080000 + (base address of Bank2) and 0x08000000(base address of Bank1) to 0x00 --*/ + if (STM_EVAL_PBGetState(BUTTON_SEL) == 0) + { + FLASH_Unlock(); + /* Erase stack pointer value at Bank 2 start address */ + FLASH_ProgramWord(BANK2_START_ADDRESS, 0x00); + /* Erase stack pointer value at Bank 1 start address */ + FLASH_ProgramWord(BANK1_START_ADDRESS, 0x00); + FLASH_Lock(); + + LCD_ClearLine(LCD_LINE_7); + LCD_ClearLine(LCD_LINE_8); + LCD_ClearLine(LCD_LINE_9); + + /* Check if erase operation is OK */ + if ((uint32_t)(*(uint32_t *)BANK2_START_ADDRESS) == 0x00) + { + if ((uint32_t)(*(uint32_t *)BANK1_START_ADDRESS) != 0x00) + { + /* Display information */ + LCD_DisplayStringLine(LCD_LINE_6, MESSAGE11); + } + else + { + /* Display information */ + LCD_DisplayStringLine(LCD_LINE_6, MESSAGE12); + } + } + else + { + /* Display information */ + LCD_DisplayStringLine(LCD_LINE_6, MESSAGE11); + } + } + + /* Toggle LD3 */ + STM_EVAL_LEDToggle(LED3); + + /* Insert 50 ms delay */ + Delay(5); + + /* Toggle LD2 */ + STM_EVAL_LEDToggle(LED2); + + /* Insert 100 ms delay */ + Delay(10); + } +} + +/** + * @brief Inserts a delay time. + * @param nTime: specifies the delay time length, in 10 ms. + * @retval None + */ +void Delay(__IO uint32_t nTime) +{ + TimingDelay = nTime; + + while (TimingDelay != 0); +} + +/** + * @brief Decrements the TimingDelay variable. + * @param None + * @retval None + */ +void TimingDelay_Decrement(void) +{ + if (TimingDelay != 0x00) + { + TimingDelay--; + } +} + +#ifdef USE_FULL_ASSERT + +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + while (1) + {} +} + +#endif + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.h new file mode 100644 index 0000000..dd55adf --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/main.h @@ -0,0 +1,39 @@ +/** + ****************************************************************************** + * @file FLASH/Dual_Boot/main.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Header for main.c module + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" +#include "stm32_eval.h" +#include "stm3210e_eval_lcd.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void TimingDelay_Decrement(void); + +#endif /* __MAIN_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/readme.txt b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/readme.txt new file mode 100644 index 0000000..b27b7b4 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/readme.txt @@ -0,0 +1,164 @@ +/** + @page Dual_Boot XL-Density devices FLASH Dual Boot capability example + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file FLASH/Dual_Boot/readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Description of the XL-Density devices FLASH Dual Boot capability example. + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Example Description + +This example demonstrates the dual Flash boot capability of XL-Density devices: +boot from Flash memory Bank1 or Bank2. + +At startup, if BFB2 option bit is reset and the boot pins are in the boot from main +Flash memory configuration, the device boots from Flash memory Bank1 or Bank2, +depending on the activation of the bank. The active banks are checked in the following +order: Bank2, followed by Bank1. +The active bank is identified by the value programmed at the base address of the +bank (corresponding to the initial stack pointer value in the interrupt vector table). +For further details, please refer to AN2606 "STM32 microcontroller system memory boot mode." + +To demonstrate this feature, this example provides two programs: + - 1st program will be loaded in Flash Bank1 (starting from @ 0x08000000), for this + you have to enable BOOT_FROM_BANK1 define in main.c + - 2nd program will be loaded in Flash Bank2 (starting from @ 0x08080000), for this + you have to enable BOOT_FROM_BANK2 define in main.c + +Once these two programs are loaded and boot pins set in boot from Flash memory, +after reset the device will boot from Bank1 (default). Then you have to follow +the instructions provided on the LCD: + - "Joystick-DOWN: reset BFB2 bit to Boot from Bank2" => when pushing the Joystick + DOWN button, BFB2 option bit will be reset then a system (SW) reset will be + generated. After startup from reset, the device will boot from Bank2. + - Note: when booting from Bank2 the same menu will be displayed + + - "Joystick-UP: set BFB2 bit to Boot from Bank1" => when pushing the Joystick + UP button, BFB2 option bit will be set then a system (SW) reset will be + generated. After startup from reset, the device will boot from Bank1. + + - "Joystick-SEL: program to 0x0 the base @ of Bank1/2" => when pushing the Joystick + SEL button, the content of address 0x08080000 and 0x08000000 will be programmed to 0x0. + - If the program was previously booting from Bank2 (i.e. BFB2 bit is reset), + in this case after reset no program is executed and the Bootloader code + is executed instead. + - If the program was previously booting from Bank1 (i.e. BFB2 bit is set), + in this case after reset no program is executed. + - You have to load again the two programs to Bank1 and Bank2. + +@b Important Note +================= +When BFB2 bit is cleared and Bank2 or/and Bank1 contain valid user application code, +the Bootloader will always jump to this code and never continue normal code execution +(i.e. it’s no more possible to use the Bootloader for code upgrade and option bytes +programming). As consequence, if the user has cleared BFB2 bit (to boot from Bank2), +in order to be able to execute the embedded Bootloader code he has to: + - either, set BFB2 bit to 1 + - or, program the content of address 0x08080000 and 0x08000000 to 0x0 +=> This example allows performing the two actions described above. + + +@par Directory contents + + - FLASH/Dual_Boot/stm32f10x_conf.h Library Configuration file + - FLASH/Dual_Boot/stm32f10x_it.h Interrupt handlers header file + - FLASH/Dual_Boot/stm32f10x_it.c Interrupt handlers + - FLASH/Dual_Boot/main.c Main program + - FLASH/Dual_Boot/system_stm32f10x.c STM32F10x system source file + +@par Hardware and Software environment + + - This example runs only on STM32F10x XL-Density Devices. + + - This example has been tested with STMicroelectronics STM3210E-EVAL (XL-Density) + evaluation board and can be easily tailored to any development board. + + +@par How to use it ? + +In order to load the IAP code, you have to do the following: + - EWARM: + - Open the Project.eww workspace + - In the workspace toolbar select the project config: + - STM32F10X_XL_BANK1: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + - STM32F10X_XL_BANK2: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - Rebuild all files: Project->Rebuild all + - Load project image: Project->Debug + - Run program: Debug->Go(F5) + + - HiTOP + - Open the HiTOP toolchain. + - Browse to open: + -STM32F10X_XL_BANK1.htp: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + -STM32F10X_XL_BANK2.htp: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - A "Download application" window is displayed, click "cancel". + - Rebuild all files: Project->Rebuild all + - Load project image : Click "ok" in the "Download application" window. + - Run the "RESET_GO_MAIN" script to set the PC at the "main" + - Run program: Debug->Go(F5). + + - MDK-ARM + - Open Project.uvproj project + - In the build toolbar select the project config: + - STM32F10X_XL_BANK1: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + - STM32F10X_XL_BANK2: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - Rebuild all files: Project->Rebuild all target files + - Load project image: Debug->Start/Stop Debug Session + - Run program: Debug->Run (F5) + + - TrueSTUDIO + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM32F10X_XL_BANK1: to load the program in Flash bank1 (BOOT_FROM_BANK1 + already defined in the project preprocessor) + - STM32F10X_XL_BANK2: to load the program in Flash bank2 (BOOT_FROM_BANK2 + already defined in the project preprocessor) + - Under Windows->Preferences->General->Workspace->Linked Resources, add + a variable path named "CurPath" which points to the folder containing + "Libraries", "Project" and "Utilities" folders. + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> + */ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_conf.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_conf.h new file mode 100644 index 0000000..c4654a7 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_conf.h @@ -0,0 +1,77 @@ +/** + ****************************************************************************** + * @file FLASH/Dual_Boot/stm32f10x_conf.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_cec.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.c new file mode 100644 index 0000000..03dedc2 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.c @@ -0,0 +1,169 @@ +/** + ****************************************************************************** + * @file FLASH/Dual_Boot/stm32f10x_it.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and peripherals + * interrupt service routine. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_it.h" +#include "main.h" + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + +/** @addtogroup Dual_Boot + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M3 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSV_Handler exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + TimingDelay_Decrement(); +} + +/******************************************************************************/ +/* STM32F10x Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f10x_xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles PPP interrupt request. + * @param None + * @retval None + */ +/*void PPP_IRQHandler(void) +{ +}*/ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.h new file mode 100644 index 0000000..1050471 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/stm32f10x_it.h @@ -0,0 +1,46 @@ +/** + ****************************************************************************** + * @file FLASH/Dual_Boot/stm32f10x_it.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IT_H +#define __STM32F10x_IT_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#endif /* __STM32F10x_IT_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c new file mode 100644 index 0000000..6fccb6d --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c @@ -0,0 +1,1094 @@ +/** + ****************************************************************************** + * @file FLASH/Dual_Boot/system_stm32f10x.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depedning on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + +#ifndef STM32F10X_CL + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#else + if (HSE_VALUE <= 24000000) + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + } + else + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + } +#endif /* STM32F10X_CL */ +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); + + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); + + /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + +#else + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL7); +#else + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); +#else + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |