diff options
Diffstat (limited to 'tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/stm32f10x_it.c')
| -rw-r--r-- | tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/stm32f10x_it.c | 256 |
1 files changed, 0 insertions, 256 deletions
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/stm32f10x_it.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/stm32f10x_it.c deleted file mode 100644 index 6e79c77..0000000 --- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/stm32f10x_it.c +++ /dev/null @@ -1,256 +0,0 @@ -/** - ****************************************************************************** - * @file RCC/RCC_ClockConfig/stm32f10x_it.c - * @author MCD Application Team - * @version V3.5.0 - * @date 08-April-2011 - * @brief Main Interrupt Service Routines. - * This file provides template for all exceptions handler and peripherals - * interrupt service routine. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_it.h" -#include "main.h" - -/** @addtogroup STM32F10x_StdPeriph_Examples - * @{ - */ - -/** @addtogroup RCC_ClockConfig - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************/ -/* Cortex-M3 Processor Exceptions Handlers */ -/******************************************************************************/ - -/** - * @brief This function handles NMI exception. - * @param None - * @retval None - */ -void NMI_Handler(void) -{ - /* This interrupt is generated when HSE clock fails */ - - if (RCC_GetITStatus(RCC_IT_CSS) != RESET) - {/* At this stage: HSE, PLL are disabled (but no change on PLL config) and HSI - is selected as system clock source */ - - /* Enable HSE */ - RCC_HSEConfig(RCC_HSE_ON); - - /* Enable HSE Ready interrupt */ - RCC_ITConfig(RCC_IT_HSERDY, ENABLE); - -#ifndef SYSCLK_HSE - #ifdef STM32F10X_CL - /* Enable PLL and PLL2 Ready interrupts */ - RCC_ITConfig(RCC_IT_PLLRDY | RCC_IT_PLL2RDY, ENABLE); - #else - /* Enable PLL Ready interrupt */ - RCC_ITConfig(RCC_IT_PLLRDY, ENABLE); - #endif /* STM32F10X_CL */ -#endif /* SYSCLK_HSE */ - - /* Clear Clock Security System interrupt pending bit */ - RCC_ClearITPendingBit(RCC_IT_CSS); - - /* Once HSE clock recover, the HSERDY interrupt is generated and in the RCC ISR - routine the system clock will be reconfigured to its previous state (before - HSE clock failure) */ - } -} - -/** - * @brief This function handles Hard Fault exception. - * @param None - * @retval None - */ -void HardFault_Handler(void) -{ - /* Go to infinite loop when Hard Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Memory Manage exception. - * @param None - * @retval None - */ -void MemManage_Handler(void) -{ - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Bus Fault exception. - * @param None - * @retval None - */ -void BusFault_Handler(void) -{ - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Usage Fault exception. - * @param None - * @retval None - */ -void UsageFault_Handler(void) -{ - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles SVCall exception. - * @param None - * @retval None - */ -void SVC_Handler(void) -{ -} - -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -void DebugMon_Handler(void) -{ -} - -/** - * @brief This function handles PendSV_Handler exception. - * @param None - * @retval None - */ -void PendSV_Handler(void) -{ -} - -/** - * @brief This function handles SysTick Handler. - * @param None - * @retval None - */ -void SysTick_Handler(void) -{ -} - -/******************************************************************************/ -/* STM32F10x Peripherals Interrupt Handlers */ -/******************************************************************************/ - -/** - * @brief This function handles RCC interrupt request. - * @param None - * @retval None - */ -void RCC_IRQHandler(void) -{ - if(RCC_GetITStatus(RCC_IT_HSERDY) != RESET) - { - /* Clear HSERDY interrupt pending bit */ - RCC_ClearITPendingBit(RCC_IT_HSERDY); - - /* Check if the HSE clock is still available */ - if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET) - { -#ifdef SYSCLK_HSE - /* Select HSE as system clock source */ - RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE); -#else - #ifdef STM32F10X_CL - /* Enable PLL2 */ - RCC_PLL2Cmd(ENABLE); - #else - /* Enable PLL: once the PLL is ready the PLLRDY interrupt is generated */ - RCC_PLLCmd(ENABLE); - #endif /* STM32F10X_CL */ -#endif /* SYSCLK_HSE */ - } - } - -#ifdef STM32F10X_CL - if(RCC_GetITStatus(RCC_IT_PLL2RDY) != RESET) - { - /* Clear PLL2RDY interrupt pending bit */ - RCC_ClearITPendingBit(RCC_IT_PLL2RDY); - - /* Enable PLL: once the PLL is ready the PLLRDY interrupt is generated */ - RCC_PLLCmd(ENABLE); - } -#endif /* STM32F10X_CL */ - - if(RCC_GetITStatus(RCC_IT_PLLRDY) != RESET) - { - /* Clear PLLRDY interrupt pending bit */ - RCC_ClearITPendingBit(RCC_IT_PLLRDY); - - /* Check if the PLL is still locked */ - if (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) != RESET) - { - /* Select PLL as system clock source */ - RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); - } - } -} - -/******************************************************************************/ -/* STM32F10x Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f10x_xx.s). */ -/******************************************************************************/ - -/** - * @brief This function handles PPP interrupt request. - * @param None - * @retval None - */ -/*void PPP_IRQHandler(void) -{ -}*/ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |