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Diffstat (limited to 'tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/DMABurst/main.c')
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diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/DMABurst/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/DMABurst/main.c new file mode 100644 index 0000000..af8bbf8 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/DMABurst/main.c @@ -0,0 +1,173 @@ +/** + ****************************************************************************** + * @file TIM/DMABurst/main.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main program body + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + +/** @addtogroup TIM_DMABurst + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +#define TIM1_DMAR_ADDRESS ((uint32_t)0x40012C4C) /* TIM ARR (Auto Reload Register) address */ + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +GPIO_InitTypeDef GPIO_InitStructure; +DMA_InitTypeDef DMA_InitStructure; +TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; +TIM_OCInitTypeDef TIM_OCInitStructure; +uint16_t SRC_Buffer[6] = {0x0FFF, 0x0000, 0x0555}; + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Main program + * @param None + * @retval None + */ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + + /* TIM1 and GPIOA clock enable */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA, ENABLE); + + /* DMA clock enable */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); + + /* GPIOA Configuration: Channel 1 as alternate function push-pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + /* TIM1 DeInit */ + TIM_DeInit(TIM1); + + /* DMA1 Channel5 Config */ + DMA_DeInit(DMA1_Channel5); + + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)TIM1_DMAR_ADDRESS; + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SRC_Buffer; + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + DMA_InitStructure.DMA_BufferSize = 3; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(DMA1_Channel5, &DMA_InitStructure); + + /* Time base configuration */ + /* ----------------------------------------------------------------------- + TIM1 Configuration: generate 1 PWM signal using the DMA burst mode: + The TIM1CLK frequency is set to SystemCoreClock (Hz), to get TIM1 counter + clock at 24 MHz the Prescaler is computed as following: + - Prescaler = (TIM1CLK / TIM1 counter clock) - 1 + SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density + and Connectivity line devices and to 24 MHz for Low-Density Value line and + Medium-Density Value line devices + + The TIM1 period is 5.8 KHz: TIM1 Frequency = TIM1 counter clock/(ARR + 1) + = 24 MHz / 4096 = 5.8KHz KHz + TIM1 Channel1 duty cycle = (TIM1_CCR1/ TIM1_ARR)* 100 = 33.33% + ----------------------------------------------------------------------- */ + TIM_TimeBaseStructure.TIM_Period = 0xFFFF; + TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t) (SystemCoreClock / 24000000) - 1; + TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); + + /* TIM Configuration in PWM Mode */ + TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = 0xFFF; + TIM_OC1Init(TIM1, &TIM_OCInitStructure); + + /* TIM1 DMAR Base register and DMA Burst Length Config */ + TIM_DMAConfig(TIM1, TIM_DMABase_ARR, TIM_DMABurstLength_3Transfers); + + /* TIM1 DMA Update enable */ + TIM_DMACmd(TIM1, TIM_DMA_Update, ENABLE); + + /* TIM1 enable */ + TIM_Cmd(TIM1, ENABLE); + + /* TIM1 PWM Outputs Enable */ + TIM_CtrlPWMOutputs(TIM1, ENABLE); + + /* DMA1 Channel5 enable */ + DMA_Cmd(DMA1_Channel5, ENABLE); + + /* Wait until DMA1 Channel5 end of Transfer */ + while (!DMA_GetFlagStatus(DMA1_FLAG_TC5)) + { + } + + /* Infinite loop */ + while(1) + { + } +} + + +#ifdef USE_FULL_ASSERT + +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + while (1) + {} +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |