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Diffstat (limited to 'tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL')
12 files changed, 7853 insertions, 0 deletions
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval.c new file mode 100644 index 0000000..d2adb8c --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval.c @@ -0,0 +1,762 @@ +/** + ****************************************************************************** + * @file stm32100e_eval.c + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file provides + * - set of firmware functions to manage Leds, push-button and COM ports + * - low level initialization functions for SD card (on SDIO), SPI serial + * flash (sFLASH) and temperature sensor (LM75) + * available on STM32100E-EVAL evaluation board from STMicroelectronics. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32100e_eval.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_dma.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @defgroup STM32100E_EVAL_LOW_LEVEL + * @brief This file provides firmware functions to manage Leds, push-buttons, + * COM ports, SD card on SDIO, serial flash (sFLASH), serial EEPROM (sEE) + * and temperature sensor (LM75) available on STM32100E-EVAL evaluation + * board from STMicroelectronics. + * @{ + */ + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Private_Defines + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Private_Macros + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Private_Variables + * @{ + */ +GPIO_TypeDef* GPIO_PORT[LEDn] = {LED1_GPIO_PORT, LED2_GPIO_PORT, LED3_GPIO_PORT, + LED4_GPIO_PORT}; +const uint16_t GPIO_PIN[LEDn] = {LED1_PIN, LED2_PIN, LED3_PIN, + LED4_PIN}; +const uint32_t GPIO_CLK[LEDn] = {LED1_GPIO_CLK, LED2_GPIO_CLK, LED3_GPIO_CLK, + LED4_GPIO_CLK}; + +GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {WAKEUP_BUTTON_GPIO_PORT, TAMPER_BUTTON_GPIO_PORT, + KEY_BUTTON_GPIO_PORT, RIGHT_BUTTON_GPIO_PORT, + LEFT_BUTTON_GPIO_PORT, UP_BUTTON_GPIO_PORT, + DOWN_BUTTON_GPIO_PORT, SEL_BUTTON_GPIO_PORT}; + +const uint16_t BUTTON_PIN[BUTTONn] = {WAKEUP_BUTTON_PIN, TAMPER_BUTTON_PIN, + KEY_BUTTON_PIN, RIGHT_BUTTON_PIN, + LEFT_BUTTON_PIN, UP_BUTTON_PIN, + DOWN_BUTTON_PIN, SEL_BUTTON_PIN}; + +const uint32_t BUTTON_CLK[BUTTONn] = {WAKEUP_BUTTON_GPIO_CLK, TAMPER_BUTTON_GPIO_CLK, + KEY_BUTTON_GPIO_CLK, RIGHT_BUTTON_GPIO_CLK, + LEFT_BUTTON_GPIO_CLK, UP_BUTTON_GPIO_CLK, + DOWN_BUTTON_GPIO_CLK, SEL_BUTTON_GPIO_CLK}; + +const uint16_t BUTTON_EXTI_LINE[BUTTONn] = {WAKEUP_BUTTON_EXTI_LINE, + TAMPER_BUTTON_EXTI_LINE, + KEY_BUTTON_EXTI_LINE, + RIGHT_BUTTON_EXTI_LINE, + LEFT_BUTTON_EXTI_LINE, + UP_BUTTON_EXTI_LINE, + DOWN_BUTTON_EXTI_LINE, + SEL_BUTTON_EXTI_LINE}; + +const uint16_t BUTTON_PORT_SOURCE[BUTTONn] = {WAKEUP_BUTTON_EXTI_PORT_SOURCE, + TAMPER_BUTTON_EXTI_PORT_SOURCE, + KEY_BUTTON_EXTI_PORT_SOURCE, + RIGHT_BUTTON_EXTI_PORT_SOURCE, + LEFT_BUTTON_EXTI_PORT_SOURCE, + UP_BUTTON_EXTI_PORT_SOURCE, + DOWN_BUTTON_EXTI_PORT_SOURCE, + SEL_BUTTON_EXTI_PORT_SOURCE}; + +const uint16_t BUTTON_PIN_SOURCE[BUTTONn] = {WAKEUP_BUTTON_EXTI_PIN_SOURCE, + TAMPER_BUTTON_EXTI_PIN_SOURCE, + KEY_BUTTON_EXTI_PIN_SOURCE, + RIGHT_BUTTON_EXTI_PIN_SOURCE, + LEFT_BUTTON_EXTI_PIN_SOURCE, + UP_BUTTON_EXTI_PIN_SOURCE, + DOWN_BUTTON_EXTI_PIN_SOURCE, + SEL_BUTTON_EXTI_PIN_SOURCE}; + +const uint16_t BUTTON_IRQn[BUTTONn] = {WAKEUP_BUTTON_EXTI_IRQn, TAMPER_BUTTON_EXTI_IRQn, + KEY_BUTTON_EXTI_IRQn, RIGHT_BUTTON_EXTI_IRQn, + LEFT_BUTTON_EXTI_IRQn, UP_BUTTON_EXTI_IRQn, + DOWN_BUTTON_EXTI_IRQn, SEL_BUTTON_EXTI_IRQn}; + +USART_TypeDef* COM_USART[COMn] = {EVAL_COM1, EVAL_COM2}; + +GPIO_TypeDef* COM_TX_PORT[COMn] = {EVAL_COM1_TX_GPIO_PORT, EVAL_COM2_TX_GPIO_PORT}; + +GPIO_TypeDef* COM_RX_PORT[COMn] = {EVAL_COM1_RX_GPIO_PORT, EVAL_COM2_RX_GPIO_PORT}; + +const uint32_t COM_USART_CLK[COMn] = {EVAL_COM1_CLK, EVAL_COM2_CLK}; + +const uint32_t COM_TX_PORT_CLK[COMn] = {EVAL_COM1_TX_GPIO_CLK, EVAL_COM2_TX_GPIO_CLK}; + +const uint32_t COM_RX_PORT_CLK[COMn] = {EVAL_COM1_RX_GPIO_CLK, EVAL_COM2_RX_GPIO_CLK}; + +const uint16_t COM_TX_PIN[COMn] = {EVAL_COM1_TX_PIN, EVAL_COM2_TX_PIN}; + +const uint16_t COM_RX_PIN[COMn] = {EVAL_COM1_RX_PIN, EVAL_COM2_RX_PIN}; + +DMA_InitTypeDef sEEDMA_InitStructure; + +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Private_Functions + * @{ + */ + +/** + * @brief Configures LED GPIO. + * @param Led: Specifies the Led to be configured. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDInit(Led_TypeDef Led) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable the GPIO_LED Clock */ + RCC_APB2PeriphClockCmd(GPIO_CLK[Led], ENABLE); + + /* Configure the GPIO_LED pin */ + GPIO_InitStructure.GPIO_Pin = GPIO_PIN[Led]; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + + GPIO_Init(GPIO_PORT[Led], &GPIO_InitStructure); +} + +/** + * @brief Turns selected LED On. + * @param Led: Specifies the Led to be set on. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDOn(Led_TypeDef Led) +{ + GPIO_PORT[Led]->BSRR = GPIO_PIN[Led]; +} + +/** + * @brief Turns selected LED Off. + * @param Led: Specifies the Led to be set off. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDOff(Led_TypeDef Led) +{ + GPIO_PORT[Led]->BRR = GPIO_PIN[Led]; +} + +/** + * @brief Toggles the selected LED. + * @param Led: Specifies the Led to be toggled. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDToggle(Led_TypeDef Led) +{ + GPIO_PORT[Led]->ODR ^= GPIO_PIN[Led]; +} + +/** + * @brief Configures Button GPIO and EXTI Line. + * @param Button: Specifies the Button to be configured. + * This parameter can be one of following parameters: + * @arg BUTTON_WAKEUP: Wakeup Push Button + * @arg BUTTON_TAMPER: Tamper Push Button + * @arg BUTTON_KEY: Key Push Button + * @arg BUTTON_RIGHT: Joystick Right Push Button + * @arg BUTTON_LEFT: Joystick Left Push Button + * @arg BUTTON_UP: Joystick Up Push Button + * @arg BUTTON_DOWN: Joystick Down Push Button + * @arg BUTTON_SEL: Joystick Sel Push Button + * @param Button_Mode: Specifies Button mode. + * This parameter can be one of following parameters: + * @arg BUTTON_MODE_GPIO: Button will be used as simple IO + * @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt + * generation capability + * @retval None + */ +void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode) +{ + GPIO_InitTypeDef GPIO_InitStructure; + EXTI_InitTypeDef EXTI_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* Enable the BUTTON Clock */ + RCC_APB2PeriphClockCmd(BUTTON_CLK[Button] | RCC_APB2Periph_AFIO, ENABLE); + + /* Configure Button pin as input floating */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Pin = BUTTON_PIN[Button]; + GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStructure); + + + if (Button_Mode == BUTTON_MODE_EXTI) + { + /* Connect Button EXTI Line to Button GPIO Pin */ + GPIO_EXTILineConfig(BUTTON_PORT_SOURCE[Button], BUTTON_PIN_SOURCE[Button]); + + /* Configure Button EXTI line */ + EXTI_InitStructure.EXTI_Line = BUTTON_EXTI_LINE[Button]; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + + if(Button != BUTTON_WAKEUP) + { + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; + } + else + { + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + } + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); + + /* Enable and set Button EXTI Interrupt to the lowest priority */ + NVIC_InitStructure.NVIC_IRQChannel = BUTTON_IRQn[Button]; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + + NVIC_Init(&NVIC_InitStructure); + } +} + +/** + * @brief Returns the selected Button state. + * @param Button: Specifies the Button to be checked. + * This parameter can be one of following parameters: + * @arg BUTTON_WAKEUP: Wakeup Push Button + * @arg BUTTON_TAMPER: Tamper Push Button + * @arg BUTTON_KEY: Key Push Button + * @arg BUTTON_RIGHT: Joystick Right Push Button + * @arg BUTTON_LEFT: Joystick Left Push Button + * @arg BUTTON_UP: Joystick Up Push Button + * @arg BUTTON_DOWN: Joystick Down Push Button + * @arg BUTTON_SEL: Joystick Sel Push Button + * @retval The Button GPIO pin value. + */ +uint32_t STM_EVAL_PBGetState(Button_TypeDef Button) +{ + return GPIO_ReadInputDataBit(BUTTON_PORT[Button], BUTTON_PIN[Button]); +} + +/** + * @brief Configures COM port. + * @param COM: Specifies the COM port to be configured. + * This parameter can be one of following parameters: + * @arg COM1 + * @arg COM2 + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure that + * contains the configuration information for the specified USART peripheral. + * @retval None + */ +void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable GPIO clock */ + RCC_APB2PeriphClockCmd(COM_TX_PORT_CLK[COM] | COM_RX_PORT_CLK[COM] | RCC_APB2Periph_AFIO, ENABLE); + + /* Enable UART clock */ + if (COM == COM1) + { + RCC_APB2PeriphClockCmd(COM_USART_CLK[COM], ENABLE); + } + else + { + RCC_APB1PeriphClockCmd(COM_USART_CLK[COM], ENABLE); + } + + /* Configure USART Tx as alternate function push-pull */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Pin = COM_TX_PIN[COM]; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(COM_TX_PORT[COM], &GPIO_InitStructure); + + /* Configure USART Rx as input floating */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Pin = COM_RX_PIN[COM]; + GPIO_Init(COM_RX_PORT[COM], &GPIO_InitStructure); + + /* USART configuration */ + USART_Init(COM_USART[COM], USART_InitStruct); + + /* Enable USART */ + USART_Cmd(COM_USART[COM], ENABLE); +} + +/** + * @brief DeInitializes the SD/SD communication. + * @param None + * @retval None + */ +void SD_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + SPI_Cmd(SD_SPI, DISABLE); /*!< SD_SPI disable */ + SPI_I2S_DeInit(SD_SPI); /*!< DeInitializes the SD_SPI */ + + /*!< SD_SPI Periph clock disable */ + RCC_APB1PeriphClockCmd(SD_SPI_CLK, DISABLE); + + /*!< Configure SD_SPI pins: SCK */ + GPIO_InitStructure.GPIO_Pin = SD_SPI_SCK_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(SD_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI pins: MISO */ + GPIO_InitStructure.GPIO_Pin = SD_SPI_MISO_PIN; + GPIO_Init(SD_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI pins: MOSI */ + GPIO_InitStructure.GPIO_Pin = SD_SPI_MOSI_PIN; + GPIO_Init(SD_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI_CS_PIN pin: SD Card CS pin */ + GPIO_InitStructure.GPIO_Pin = SD_CS_PIN; + GPIO_Init(SD_CS_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */ + GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN; + GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief Initializes the SD_SPI and CS pins. + * @param None + * @retval None + */ +void SD_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + SPI_InitTypeDef SPI_InitStructure; + + /*!< SD_SPI_CS_GPIO, SD_SPI_MOSI_GPIO, SD_SPI_MISO_GPIO, SD_SPI_DETECT_GPIO + and SD_SPI_SCK_GPIO Periph clock enable */ + RCC_APB2PeriphClockCmd(SD_CS_GPIO_CLK | SD_SPI_MOSI_GPIO_CLK | SD_SPI_MISO_GPIO_CLK | + SD_SPI_SCK_GPIO_CLK | SD_DETECT_GPIO_CLK, ENABLE); + + /*!< SD_SPI Periph clock enable */ + RCC_APB1PeriphClockCmd(SD_SPI_CLK, ENABLE); + + /*!< Configure SD_SPI pins: SCK */ + GPIO_InitStructure.GPIO_Pin = SD_SPI_SCK_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(SD_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI pins: MOSI */ + GPIO_InitStructure.GPIO_Pin = SD_SPI_MOSI_PIN; + GPIO_Init(SD_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI pins: MISO */ + GPIO_InitStructure.GPIO_Pin = SD_SPI_MISO_PIN; + GPIO_Init(SD_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI_CS_PIN pin: SD Card CS pin */ + GPIO_InitStructure.GPIO_Pin = SD_CS_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(SD_CS_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */ + GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure); + + /*!< SD_SPI Config */ + SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; + SPI_InitStructure.SPI_Mode = SPI_Mode_Master; + SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; + SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; + SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; + SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; + SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; + SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; + SPI_InitStructure.SPI_CRCPolynomial = 7; + SPI_Init(SD_SPI, &SPI_InitStructure); + + SPI_Cmd(SD_SPI, ENABLE); /*!< SD_SPI enable */ +} + +/** + * @brief DeInitializes peripherals used by the I2C EEPROM driver. + * @param None + * @retval None + */ +void sEE_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* sEE_I2C Peripheral Disable */ + I2C_Cmd(sEE_I2C, DISABLE); + + /* sEE_I2C DeInit */ + I2C_DeInit(sEE_I2C); + + /*!< sEE_I2C Periph clock disable */ + RCC_APB1PeriphClockCmd(sEE_I2C_CLK, DISABLE); + + /*!< GPIO configuration */ + /*!< Configure sEE_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN; + GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /* Configure and enable I2C DMA TX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Configure and enable I2C DMA RX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_Init(&NVIC_InitStructure); + + /* Disable and Deinitialize the DMA channels */ + DMA_Cmd(sEE_I2C_DMA_CHANNEL_TX, DISABLE); + DMA_Cmd(sEE_I2C_DMA_CHANNEL_RX, DISABLE); + DMA_DeInit(sEE_I2C_DMA_CHANNEL_TX); + DMA_DeInit(sEE_I2C_DMA_CHANNEL_RX); +} + +/** + * @brief Initializes peripherals used by the I2C EEPROM driver. + * @param None + * @retval None + */ +void sEE_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /*!< sEE_I2C_SCL_GPIO_CLK and sEE_I2C_SDA_GPIO_CLK Periph clock enable */ + RCC_APB2PeriphClockCmd(sEE_I2C_SCL_GPIO_CLK | sEE_I2C_SDA_GPIO_CLK, ENABLE); + + /*!< sEE_I2C Periph clock enable */ + RCC_APB1PeriphClockCmd(sEE_I2C_CLK, ENABLE); + + /*!< GPIO configuration */ + /*!< Configure sEE_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; + GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN; + GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /* Configure and enable I2C DMA TX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Configure and enable I2C DMA RX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_Init(&NVIC_InitStructure); + + /*!< I2C DMA TX and RX channels configuration */ + /* Enable the DMA clock */ + RCC_AHBPeriphClockCmd(sEE_I2C_DMA_CLK, ENABLE); + + /* I2C TX DMA Channel configuration */ + DMA_DeInit(sEE_I2C_DMA_CHANNEL_TX); + sEEDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)sEE_I2C_DR_Address; + sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */ + sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; /* This parameter will be configured durig communication */ + sEEDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */ + sEEDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + sEEDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + sEEDMA_InitStructure.DMA_PeripheralDataSize = DMA_MemoryDataSize_Byte; + sEEDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + sEEDMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + sEEDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; + sEEDMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(sEE_I2C_DMA_CHANNEL_TX, &sEEDMA_InitStructure); + + /* I2C RX DMA Channel configuration */ + DMA_DeInit(sEE_I2C_DMA_CHANNEL_RX); + DMA_Init(sEE_I2C_DMA_CHANNEL_RX, &sEEDMA_InitStructure); + + /* Enable the DMA Channels Interrupts */ + DMA_ITConfig(sEE_I2C_DMA_CHANNEL_TX, DMA_IT_TC, ENABLE); + DMA_ITConfig(sEE_I2C_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE); +} + +/** + * @brief Initializes DMA channel used by the I2C EEPROM driver. + * @param None + * @retval None + */ +void sEE_LowLevel_DMAConfig(uint32_t pBuffer, uint32_t BufferSize, uint32_t Direction) +{ + /* Initialize the DMA with the new parameters */ + if (Direction == sEE_DIRECTION_TX) + { + /* Configure the DMA Tx Channel with the buffer address and the buffer size */ + sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)pBuffer; + sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + sEEDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize; + DMA_Init(sEE_I2C_DMA_CHANNEL_TX, &sEEDMA_InitStructure); + } + else + { + /* Configure the DMA Rx Channel with the buffer address and the buffer size */ + sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)pBuffer; + sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; + sEEDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize; + DMA_Init(sEE_I2C_DMA_CHANNEL_RX, &sEEDMA_InitStructure); + } +} + +/** + * @brief DeInitializes the peripherals used by the SPI FLASH driver. + * @param None + * @retval None + */ +void sFLASH_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< Disable the sFLASH_SPI */ + SPI_Cmd(sFLASH_SPI, DISABLE); + + /*!< DeInitializes the sFLASH_SPI */ + SPI_I2S_DeInit(sFLASH_SPI); + + /*!< sFLASH_SPI Periph clock disable */ + RCC_APB2PeriphClockCmd(sFLASH_SPI_CLK, DISABLE); + + /*!< Configure sFLASH_SPI pins: SCK */ + GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_SCK_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(sFLASH_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sFLASH_SPI pins: MISO */ + GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MISO_PIN; + GPIO_Init(sFLASH_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sFLASH_SPI pins: MOSI */ + GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MOSI_PIN; + GPIO_Init(sFLASH_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sFLASH_CS_PIN pin: sFLASH Card CS pin */ + GPIO_InitStructure.GPIO_Pin = sFLASH_CS_PIN; + GPIO_Init(sFLASH_CS_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief Initializes the peripherals used by the SPI FLASH driver. + * @param None + * @retval None + */ +void sFLASH_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< sFLASH_SPI_CS_GPIO, sFLASH_SPI_MOSI_GPIO, sFLASH_SPI_MISO_GPIO + and sFLASH_SPI_SCK_GPIO Periph clock enable */ + RCC_APB2PeriphClockCmd(sFLASH_CS_GPIO_CLK | sFLASH_SPI_MOSI_GPIO_CLK | sFLASH_SPI_MISO_GPIO_CLK | + sFLASH_SPI_SCK_GPIO_CLK, ENABLE); + + /*!< sFLASH_SPI Periph clock enable */ + RCC_APB2PeriphClockCmd(sFLASH_SPI_CLK, ENABLE); + + /*!< Configure sFLASH_SPI pins: SCK */ + GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_SCK_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(sFLASH_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sFLASH_SPI pins: MOSI */ + GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MOSI_PIN; + GPIO_Init(sFLASH_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sFLASH_SPI pins: MISO */ + GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MISO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(sFLASH_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sFLASH_CS_PIN pin: sFLASH Card CS pin */ + GPIO_InitStructure.GPIO_Pin = sFLASH_CS_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(sFLASH_CS_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief DeInitializes the LM75_I2C. + * @param None + * @retval None + */ +void LM75_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< Disable LM75_I2C */ + I2C_Cmd(LM75_I2C, DISABLE); + /*!< DeInitializes the LM75_I2C */ + I2C_DeInit(LM75_I2C); + + /*!< LM75_I2C Periph clock disable */ + RCC_APB1PeriphClockCmd(LM75_I2C_CLK, DISABLE); + + /*!< Configure LM75_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(LM75_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SDA_PIN; + GPIO_Init(LM75_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pin: SMBUS ALERT */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SMBUSALERT_PIN; + GPIO_Init(LM75_I2C_SMBUSALERT_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief Initializes the LM75_I2C.. + * @param None + * @retval None + */ +void LM75_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< LM75_I2C Periph clock enable */ + RCC_APB1PeriphClockCmd(LM75_I2C_CLK, ENABLE); + + /*!< LM75_I2C_SCL_GPIO_CLK, LM75_I2C_SDA_GPIO_CLK + and LM75_I2C_SMBUSALERT_GPIO_CLK Periph clock enable */ + RCC_APB2PeriphClockCmd(LM75_I2C_SCL_GPIO_CLK | LM75_I2C_SDA_GPIO_CLK | + LM75_I2C_SMBUSALERT_GPIO_CLK, ENABLE); + + /*!< Configure LM75_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; + GPIO_Init(LM75_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SDA_PIN; + GPIO_Init(LM75_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pin: SMBUS ALERT */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SMBUSALERT_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(LM75_I2C_SMBUSALERT_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval.h new file mode 100644 index 0000000..fc6bff2 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval.h @@ -0,0 +1,393 @@ +/** + ****************************************************************************** + * @file stm32100e_eval.h + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file contains definitions for STM32100E_EVAL's Leds, push-buttons + * COM ports, sFLASH (on SPI) and Temperature Sensor LM75 (on I2C) + * hardware resources. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32100E_EVAL_H +#define __STM32100E_EVAL_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_eval.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL_LOW_LEVEL + * @{ + */ + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Exported_Types + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Exported_Constants + * @{ + */ +/** @addtogroup STM32100E_EVAL_LOW_LEVEL_LED + * @{ + */ +#define LEDn 4 + +#define LED1_PIN GPIO_Pin_6 +#define LED1_GPIO_PORT GPIOF +#define LED1_GPIO_CLK RCC_APB2Periph_GPIOF + +#define LED2_PIN GPIO_Pin_7 +#define LED2_GPIO_PORT GPIOF +#define LED2_GPIO_CLK RCC_APB2Periph_GPIOF + +#define LED3_PIN GPIO_Pin_8 +#define LED3_GPIO_PORT GPIOF +#define LED3_GPIO_CLK RCC_APB2Periph_GPIOF + +#define LED4_PIN GPIO_Pin_9 +#define LED4_GPIO_PORT GPIOF +#define LED4_GPIO_CLK RCC_APB2Periph_GPIOF + +/** + * @} + */ + +/** @addtogroup STM32100E_EVAL_LOW_LEVEL_BUTTON + * @{ + */ +#define BUTTONn 8 + +/** + * @brief Wakeup push-button + */ +#define WAKEUP_BUTTON_PIN GPIO_Pin_0 +#define WAKEUP_BUTTON_GPIO_PORT GPIOA +#define WAKEUP_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOA +#define WAKEUP_BUTTON_EXTI_LINE EXTI_Line0 +#define WAKEUP_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOA +#define WAKEUP_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource0 +#define WAKEUP_BUTTON_EXTI_IRQn EXTI0_IRQn +/** + * @brief Tamper push-button + */ +#define TAMPER_BUTTON_PIN GPIO_Pin_13 +#define TAMPER_BUTTON_GPIO_PORT GPIOC +#define TAMPER_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOC +#define TAMPER_BUTTON_EXTI_LINE EXTI_Line13 +#define TAMPER_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOC +#define TAMPER_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource13 +#define TAMPER_BUTTON_EXTI_IRQn EXTI15_10_IRQn +/** + * @brief Key push-button + */ +#define KEY_BUTTON_PIN GPIO_Pin_8 +#define KEY_BUTTON_GPIO_PORT GPIOG +#define KEY_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOG +#define KEY_BUTTON_EXTI_LINE EXTI_Line8 +#define KEY_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOG +#define KEY_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource8 +#define KEY_BUTTON_EXTI_IRQn EXTI9_5_IRQn +/** + * @brief Joystick Right push-button + */ +#define RIGHT_BUTTON_PIN GPIO_Pin_13 +#define RIGHT_BUTTON_GPIO_PORT GPIOG +#define RIGHT_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOG +#define RIGHT_BUTTON_EXTI_LINE EXTI_Line13 +#define RIGHT_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOG +#define RIGHT_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource13 +#define RIGHT_BUTTON_EXTI_IRQn EXTI15_10_IRQn +/** + * @brief Joystick Left push-button + */ +#define LEFT_BUTTON_PIN GPIO_Pin_14 +#define LEFT_BUTTON_GPIO_PORT GPIOG +#define LEFT_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOG +#define LEFT_BUTTON_EXTI_LINE EXTI_Line14 +#define LEFT_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOG +#define LEFT_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource14 +#define LEFT_BUTTON_EXTI_IRQn EXTI15_10_IRQn +/** + * @brief Joystick Up push-button + */ +#define UP_BUTTON_PIN GPIO_Pin_15 +#define UP_BUTTON_GPIO_PORT GPIOG +#define UP_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOG +#define UP_BUTTON_EXTI_LINE EXTI_Line15 +#define UP_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOG +#define UP_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource15 +#define UP_BUTTON_EXTI_IRQn EXTI15_10_IRQn +/** + * @brief Joystick Down push-button + */ +#define DOWN_BUTTON_PIN GPIO_Pin_11 +#define DOWN_BUTTON_GPIO_PORT GPIOG +#define DOWN_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOG +#define DOWN_BUTTON_EXTI_LINE EXTI_Line11 +#define DOWN_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOG +#define DOWN_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource11 +#define DOWN_BUTTON_EXTI_IRQn EXTI15_10_IRQn +/** + * @brief Joystick Sel push-button + */ +#define SEL_BUTTON_PIN GPIO_Pin_7 +#define SEL_BUTTON_GPIO_PORT GPIOG +#define SEL_BUTTON_GPIO_CLK RCC_APB2Periph_GPIOG +#define SEL_BUTTON_EXTI_LINE EXTI_Line7 +#define SEL_BUTTON_EXTI_PORT_SOURCE GPIO_PortSourceGPIOG +#define SEL_BUTTON_EXTI_PIN_SOURCE GPIO_PinSource7 +#define SEL_BUTTON_EXTI_IRQn EXTI9_5_IRQn +/** + * @} + */ + +/** @addtogroup STM32100E_EVAL_LOW_LEVEL_COM + * @{ + */ +#define COMn 2 + +/** + * @brief Definition for COM port1, connected to USART1 + */ +#define EVAL_COM1 USART1 +#define EVAL_COM1_CLK RCC_APB2Periph_USART1 +#define EVAL_COM1_TX_PIN GPIO_Pin_9 +#define EVAL_COM1_TX_GPIO_PORT GPIOA +#define EVAL_COM1_TX_GPIO_CLK RCC_APB2Periph_GPIOA +#define EVAL_COM1_RX_PIN GPIO_Pin_10 +#define EVAL_COM1_RX_GPIO_PORT GPIOA +#define EVAL_COM1_RX_GPIO_CLK RCC_APB2Periph_GPIOA +#define EVAL_COM1_IRQn USART1_IRQn + +/** + * @brief Definition for COM port2, connected to USART2 + */ +#define EVAL_COM2 USART2 +#define EVAL_COM2_CLK RCC_APB1Periph_USART2 +#define EVAL_COM2_TX_PIN GPIO_Pin_2 +#define EVAL_COM2_TX_GPIO_PORT GPIOA +#define EVAL_COM2_TX_GPIO_CLK RCC_APB2Periph_GPIOA +#define EVAL_COM2_RX_PIN GPIO_Pin_3 +#define EVAL_COM2_RX_GPIO_PORT GPIOA +#define EVAL_COM2_RX_GPIO_CLK RCC_APB2Periph_GPIOA +#define EVAL_COM2_IRQn USART2_IRQn + +/** + * @} + */ + +/** @addtogroup STM32100E_EVAL_LOW_LEVEL_SD_FLASH + * @{ + */ +/** + * @brief SD SPI Interface pins + */ +#define SD_SPI SPI2 +#define SD_SPI_CLK RCC_APB1Periph_SPI2 +#define SD_SPI_SCK_PIN GPIO_Pin_13 /* PC.13 */ +#define SD_SPI_SCK_GPIO_PORT GPIOB /* GPIOB */ +#define SD_SPI_SCK_GPIO_CLK RCC_APB2Periph_GPIOB +#define SD_SPI_MISO_PIN GPIO_Pin_14 /* PC.14 */ +#define SD_SPI_MISO_GPIO_PORT GPIOB /* GPIOB */ +#define SD_SPI_MISO_GPIO_CLK RCC_APB2Periph_GPIOB +#define SD_SPI_MOSI_PIN GPIO_Pin_15 /* PB.15 */ +#define SD_SPI_MOSI_GPIO_PORT GPIOB /* GPIOB */ +#define SD_SPI_MOSI_GPIO_CLK RCC_APB2Periph_GPIOB +#define SD_CS_PIN GPIO_Pin_6 /* PG.06 */ +#define SD_CS_GPIO_PORT GPIOG /* GPIOG */ +#define SD_CS_GPIO_CLK RCC_APB2Periph_GPIOG +#define SD_DETECT_PIN GPIO_Pin_11 /* PF.11 */ +#define SD_DETECT_GPIO_PORT GPIOF /* GPIOF */ +#define SD_DETECT_GPIO_CLK RCC_APB2Periph_GPIOF + +/** + * @} + */ + +/** @addtogroup STM3210C_EVAL_LOW_LEVEL_I2C_EE + * @{ + */ +/** + * @brief I2C EEPROM Interface pins + */ +#define sEE_I2C I2C2 +#define sEE_I2C_CLK RCC_APB1Periph_I2C2 +#define sEE_I2C_SCL_PIN GPIO_Pin_10 /* PB.10 */ +#define sEE_I2C_SCL_GPIO_PORT GPIOB /* GPIOB */ +#define sEE_I2C_SCL_GPIO_CLK RCC_APB2Periph_GPIOB +#define sEE_I2C_SDA_PIN GPIO_Pin_11 /* PB.11 */ +#define sEE_I2C_SDA_GPIO_PORT GPIOB /* GPIOB */ +#define sEE_I2C_SDA_GPIO_CLK RCC_APB2Periph_GPIOB +#define sEE_M24C64_32 + +#define sEE_I2C_DMA DMA1 +#define sEE_I2C_DMA_CHANNEL_TX DMA1_Channel4 +#define sEE_I2C_DMA_CHANNEL_RX DMA1_Channel5 +#define sEE_I2C_DMA_FLAG_TX_TC DMA1_IT_TC4 +#define sEE_I2C_DMA_FLAG_TX_GL DMA1_IT_GL4 +#define sEE_I2C_DMA_FLAG_RX_TC DMA1_IT_TC5 +#define sEE_I2C_DMA_FLAG_RX_GL DMA1_IT_GL5 +#define sEE_I2C_DMA_CLK RCC_AHBPeriph_DMA1 +#define sEE_I2C_DR_Address ((uint32_t)0x40005810) +#define sEE_USE_DMA + +#define sEE_I2C_DMA_TX_IRQn DMA1_Channel4_IRQn +#define sEE_I2C_DMA_RX_IRQn DMA1_Channel5_IRQn +#define sEE_I2C_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler +#define sEE_I2C_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler +#define sEE_I2C_DMA_PREPRIO 0 +#define sEE_I2C_DMA_SUBPRIO 0 + +#define sEE_DIRECTION_TX 0 +#define sEE_DIRECTION_RX 1 + +/* Time constant for the delay caclulation allowing to have a millisecond + incrementing counter. This value should be equal to (System Clock / 1000). + ie. if system clock = 24MHz then sEE_TIME_CONST should be 24. */ +#define sEE_TIME_CONST 24 + +/** + * @} + */ + +/** @addtogroup STM32100E_EVAL_LOW_LEVEL_M25P_FLASH_SPI + * @{ + */ +/** + * @brief M25P FLASH SPI Interface pins + */ +#define sFLASH_SPI SPI1 +#define sFLASH_SPI_CLK RCC_APB2Periph_SPI1 +#define sFLASH_SPI_SCK_PIN GPIO_Pin_5 /* PA.05 */ +#define sFLASH_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */ +#define sFLASH_SPI_SCK_GPIO_CLK RCC_APB2Periph_GPIOA +#define sFLASH_SPI_MISO_PIN GPIO_Pin_6 /* PA.06 */ +#define sFLASH_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */ +#define sFLASH_SPI_MISO_GPIO_CLK RCC_APB2Periph_GPIOA +#define sFLASH_SPI_MOSI_PIN GPIO_Pin_7 /* PA.07 */ +#define sFLASH_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */ +#define sFLASH_SPI_MOSI_GPIO_CLK RCC_APB2Periph_GPIOA +#define sFLASH_CS_PIN GPIO_Pin_6 /* PE.06 */ +#define sFLASH_CS_GPIO_PORT GPIOE /* GPIOE */ +#define sFLASH_CS_GPIO_CLK RCC_APB2Periph_GPIOE + +/** + * @} + */ + + +/** @addtogroup STM32100E_EVAL_LOW_LEVEL_TSENSOR_I2C + * @{ + */ +/** + * @brief LM75 Temperature Sensor I2C Interface pins + */ +#define LM75_I2C I2C2 +#define LM75_I2C_CLK RCC_APB1Periph_I2C2 +#define LM75_I2C_SCL_PIN GPIO_Pin_10 /* PB.10 */ +#define LM75_I2C_SCL_GPIO_PORT GPIOB /* GPIOB */ +#define LM75_I2C_SCL_GPIO_CLK RCC_APB2Periph_GPIOB +#define LM75_I2C_SDA_PIN GPIO_Pin_11 /* PB.11 */ +#define LM75_I2C_SDA_GPIO_PORT GPIOB /* GPIOB */ +#define LM75_I2C_SDA_GPIO_CLK RCC_APB2Periph_GPIOB +#define LM75_I2C_SMBUSALERT_PIN GPIO_Pin_12 /* PB.12 */ +#define LM75_I2C_SMBUSALERT_GPIO_PORT GPIOB /* GPIOB */ +#define LM75_I2C_SMBUSALERT_GPIO_CLK RCC_APB2Periph_GPIOB +#define LM75_I2C_DR ((uint32_t)0x40005810) + +#define LM75_DMA_CLK RCC_AHBPeriph_DMA1 +#define LM75_DMA_TX_CHANNEL DMA1_Channel4 +#define LM75_DMA_RX_CHANNEL DMA1_Channel5 +#define LM75_DMA_TX_TCFLAG DMA1_FLAG_TC4 +#define LM75_DMA_RX_TCFLAG DMA1_FLAG_TC5 + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LOW_LEVEL_Exported_Functions + * @{ + */ +void STM_EVAL_LEDInit(Led_TypeDef Led); +void STM_EVAL_LEDOn(Led_TypeDef Led); +void STM_EVAL_LEDOff(Led_TypeDef Led); +void STM_EVAL_LEDToggle(Led_TypeDef Led); +void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode); +uint32_t STM_EVAL_PBGetState(Button_TypeDef Button); +void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct); +void SD_LowLevel_DeInit(void); +void SD_LowLevel_Init(void); +void sEE_LowLevel_DeInit(void); +void sEE_LowLevel_Init(void); +void sEE_LowLevel_DMAConfig(uint32_t pBuffer, uint32_t BufferSize, uint32_t Direction); +void sFLASH_LowLevel_DeInit(void); +void sFLASH_LowLevel_Init(void); +void LM75_LowLevel_DeInit(void); +void LM75_LowLevel_Init(void); +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif /* __STM32100E_EVAL_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.c new file mode 100644 index 0000000..2e0b76d --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.c @@ -0,0 +1,1722 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_cec.c + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file provides all the STM32100E-EVAL HDMI-CEC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32100e_eval_cec.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @defgroup STM32100E_EVAL_CEC + * @brief This file includes the CEC Stack driver for HDMI-CEC Module + * of STM32100E-EVAL board. + * @{ + */ + +/** @defgroup STM32100E_EVAL_CEC_Private_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_CEC_Private_Defines + * @{ + */ + + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_CEC_Private_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_CEC_Private_Variables + * @{ + */ + +__IO uint32_t ReceivedFrame = 0; +__IO uint32_t SendFrame = 0; +__IO uint32_t BufferCount = 0, TxCounter = 0, RxCounter = 0; +__IO uint8_t BufferPointer[15]; +__IO uint32_t ReceiveStatus = 0; +__IO uint32_t SendStatus = 0; +__IO uint8_t TransErrorCode = 0; +__IO uint8_t RecepErrorCode = 0; +__IO uint8_t MyLogicalAddress = 0; +__IO uint16_t MyPhysicalAddress = 0; +__IO uint8_t DeviceType = 0; +#ifdef HDMI_CEC_USE_DDC +__IO uint8_t pBuffer[256]; +__IO uint16_t NumByteToRead = 255; +#endif +__IO uint8_t CECDevicesNumber = 0; + +HDMI_CEC_Message HDMI_CEC_TX_MessageStructPrivate; +HDMI_CEC_Message HDMI_CEC_RX_MessageStructPrivate; +HDMI_CEC_Message HDMI_CEC_TX_MessageStructure; + +__IO uint8_t FeatureOpcode = 0; +__IO uint8_t AbortReason = 0; +__IO uint8_t DeviceCount = 0; + +HDMI_CEC_Map HDMI_CEC_MapStruct; +HDMI_CEC_Map HDMI_CEC_DeviceMap[14]; + +/* CEC follower addresses */ +uint8_t* HDMI_CEC_Follower_String[13][2] = + { + {(uint8_t*)" TV ", (uint8_t*)"0"}, + {(uint8_t*)"Recording Device 1 ", (uint8_t*)"0"}, + {(uint8_t*)"Recording Device 2 ", (uint8_t*)"0"}, + {(uint8_t*)" Tuner 1 ", (uint8_t*)"0"}, + {(uint8_t*)" Playback Device 1 ", (uint8_t*)"0"}, + {(uint8_t*)" Audio System ", (uint8_t*)"0"}, + {(uint8_t*)" Tuner 2 ", (uint8_t*)"0"}, + {(uint8_t*)" Tuner 3 ", (uint8_t*)"0"}, + {(uint8_t*)" Playback Device 2 ", (uint8_t*)"0"}, + {(uint8_t*)"Recording Device 3 ", (uint8_t*)"0"}, + {(uint8_t*)" Tuner 4 ", (uint8_t*)"0"}, + {(uint8_t*)" Playback Device 3 ", (uint8_t*)"0"}, + {(uint8_t*)" Broadcast ", (uint8_t*)"1"} + }; + +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_CEC_Private_Function_Prototypes + * @{ + */ +static HDMI_CEC_Error PhysicalAddressDiscovery(void); +static HDMI_CEC_Error LogicalAddressAllocation(void); + + +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_CEC_Private_Functions + * @{ + */ + +/** + * @brief Initializes the HDMI CEC. + * @param None + * @retval HDMI_CEC_Error: CEC Error code + */ +HDMI_CEC_Error HDMI_CEC_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + CEC_InitTypeDef CEC_InitStructure; + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + uint8_t sendcount = 0; + +#ifdef HDMI_CEC_USE_DDC + I2C_InitTypeDef I2C_InitStructure; + /* Enable CEC_I2C clocks */ + RCC_APB1PeriphClockCmd(HDMI_CEC_I2C_CLK, ENABLE); + + /* Enable CEC_I2C_GPIO and CEC_HPD_GPIO clocks */ + RCC_APB2PeriphClockCmd(HDMI_CEC_I2C_GPIO_CLK | HDMI_CEC_HPD_GPIO_CLK, ENABLE); +#endif + + /* Enable CEC clocks */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_CEC, ENABLE); + + /* Enable CEC_LINE_GPIO clocks */ + RCC_APB2PeriphClockCmd(HDMI_CEC_LINE_GPIO_CLK, ENABLE); + + /* Configure CEC_LINE_GPIO as Output open drain */ + GPIO_InitStructure.GPIO_Pin = HDMI_CEC_LINE_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; + GPIO_Init(HDMI_CEC_LINE_GPIO_PORT, &GPIO_InitStructure); + +#ifdef HDMI_CEC_USE_DDC + /* Configure CEC_I2C_SCL_PIN and CEC_I2C_SDA_PIN as Output open drain */ + GPIO_InitStructure.GPIO_Pin = HDMI_CEC_I2C_SCL_PIN | HDMI_CEC_I2C_SDA_PIN; + GPIO_Init(HDMI_CEC_I2C_GPIO_PORT, &GPIO_InitStructure); + +/* This configuration is only when the HDMI CEC is configured as source. + The HDMI source has to provide the +5V Power signal to the sink. + On STM32100E-EVAL borad, you have to solder the SB4 Solder bridge. + Then, the source will wait for HPD signal to be asserted from the sink. + Once the HPD signal is detected the source shall read the EDID structure + throuhgh the DDC channel. */ + /* Configure CEC_HPD_GPIO as Input pull down */ + GPIO_InitStructure.GPIO_Pin = HDMI_CEC_HPD_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; + GPIO_Init(HDMI_CEC_HPD_GPIO_PORT, &GPIO_InitStructure); + + +/* This configuration is only when the HDMI CEC is configured as sink. + The HDMI sink has to wait for the +5V Power signal from the source. + On STM32100E-EVAL borad, SB4 Solder bridge should be open (default configuration). + Then, the sink will assert the HPD signal to inform the source that the EDID + is ready for read through DDC channel. In this implementation, the EDID structure + is not implemented. */ +/* GPIO_InitStructure.GPIO_Pin = HDMI_CEC_HPD_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(HDMI_CEC_HPD_GPIO_PORT, &GPIO_InitStructure); + + HDMI_CEC_HPD_HIGH(); // Set the Hot plug detect signal */ + + /* Enable CEC_I2C */ + I2C_Cmd(HDMI_CEC_I2C, ENABLE); + + /* I2C configuration */ + I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; + I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2; + I2C_InitStructure.I2C_OwnAddress1 = HDMI_CEC_I2C_SLAVE_ADDRESS7; + I2C_InitStructure.I2C_Ack = I2C_Ack_Enable; + I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; + I2C_InitStructure.I2C_ClockSpeed = HDMI_CEC_I2C_CLOCK_SPEED; + I2C_Init(HDMI_CEC_I2C, &I2C_InitStructure); +#endif + + /* Physical Address discovery */ + errorstatus = PhysicalAddressDiscovery(); + + if (errorstatus != HDMI_CEC_OK) + { + /* Device not connected (Physical Address lost) */ + return(errorstatus); + } + + + /* CEC DeInit */ + CEC_DeInit(); + + /* Configure CEC */ + CEC_InitStructure.CEC_BitTimingMode = CEC_BitTimingStdMode; + CEC_InitStructure.CEC_BitPeriodMode = CEC_BitPeriodStdMode; + CEC_Init(&CEC_InitStructure); + + /* Set Prescaler value for APB1 clock = 24MHz */ + CEC_SetPrescaler(0x4AF); + + /* Enable CEC */ + CEC_Cmd(ENABLE); + + /* Logical Address Allocation */ + sendcount = 0; + errorstatus = LogicalAddressAllocation(); + + while ((errorstatus != HDMI_CEC_OK) && sendcount < 0x5) + { + sendcount++; + errorstatus = LogicalAddressAllocation(); + } + + if (errorstatus != HDMI_CEC_OK) + { + /* Device Unregistred */ + return(errorstatus); + } + + HDMI_CEC_CheckConnectedDevices(); + + /* Set the CEC initiator address */ + CEC_OwnAddressConfig(MyLogicalAddress); + + /* Activate CEC interrupts associated to the set of RBTF,RERR, TBTF, TERR flags */ + CEC_ITConfig(ENABLE); + + /* Report physical address*/ + errorstatus = HDMI_CEC_ReportPhysicalAddress(); + sendcount = 0; + + while ((errorstatus != HDMI_CEC_OK) && sendcount < 0x5) + { + sendcount++; + errorstatus = HDMI_CEC_ReportPhysicalAddress(); + } + + if (errorstatus != HDMI_CEC_OK) + { + /* Device Unregistred */ + return(errorstatus); + } + + return errorstatus; +} + +/** + * @brief Transmit message by taking data from typedef struct CEC_Meassage + * @param CEC_TX_MessageStructure: pointer to an CEC_Message structure that contains + * the message to be sent. + * @retval HDMI_CEC_Error: CEC Error code + */ +HDMI_CEC_Error HDMI_CEC_TransmitMessage(HDMI_CEC_Message *HDMI_CEC_TX_MessageStructure) +{ + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + __IO uint32_t count = 0, j = 0; + + SendFrame = 0; + SendStatus = 0; + TxCounter = 0; + BufferCount = 0; + + HDMI_CEC_TX_MessageStructPrivate = *HDMI_CEC_TX_MessageStructure; + + /* Initialize BufferPointer */ + for (j = 0; j < 15; j++) + { + BufferPointer[j] = 0; + } + + BufferPointer[0] = HDMI_CEC_TX_MessageStructPrivate.Opcode; + + for (BufferCount = 1; BufferCount < HDMI_CEC_TX_MessageStructPrivate.TxMessageLength + 1; BufferCount++) + { + BufferPointer[BufferCount] = HDMI_CEC_TX_MessageStructPrivate.Operande[BufferCount-1]; + } + + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + /* Write single Data in the TX Buffer to Transmit through the CEC peripheral */ + CEC_SendDataByte(HDMI_CEC_TX_MessageStructPrivate.Header); + + /* Initiate Message Transmission */ + CEC_StartOfMessage(); + + while ((SendFrame == 0) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + if (SendStatus == 0) + { + errorstatus = (HDMI_CEC_Error) TransErrorCode; + } + + return errorstatus; +} + + +/** + * @brief Get the ESR register status. + * @param None + * @retval HDMI_CEC_Error: CEC Error code + */ +HDMI_CEC_Error HDMI_CEC_GetErrorStatus (void) +{ + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + + /* Bit timing error case*/ + if (CEC_GetFlagStatus(CEC_FLAG_BTE) != RESET) + { + errorstatus = HDMI_CEC_BIT_TIMING; + } + /* Bit period error case */ + if (CEC_GetFlagStatus(CEC_FLAG_BPE) != RESET) + { + errorstatus = HDMI_CEC_BIT_PERIOD; + } + /* Recieve error case */ + if (CEC_GetFlagStatus(CEC_FLAG_RBTFE) != RESET) + { + errorstatus = HDMI_CEC_RX_BLOCK_FINISHED; + } + /* Start bit error case*/ + if (CEC_GetFlagStatus(CEC_FLAG_SBE) != RESET) + { + errorstatus = HDMI_CEC_START_BIT; + } + /* Acknowledge error case*/ + if (CEC_GetFlagStatus(CEC_FLAG_ACKE) != RESET) + { + errorstatus = HDMI_CEC_BLOCK_ACKNOWLEDGE; + } + /* Line error case */ + if (CEC_GetFlagStatus(CEC_FLAG_LINE) != RESET) + { + errorstatus = HDMI_CEC_LINE; + } + /* Transfert error case*/ + if (CEC_GetFlagStatus(CEC_FLAG_TBTFE) != RESET) + { + errorstatus = HDMI_CEC_TX_BLOCK_FINISHED; + } + /* Clear All errors */ + CEC_ClearFlag(CEC_FLAG_RERR); + CEC_ClearFlag(CEC_FLAG_TERR); + return errorstatus; +} + +/** + * @brief Allows to process all the interrupts that are high. + * @param None + * @retval None + */ +void HDMI_CEC_ProcessIRQSrc(void) +{ + /********************** Reception *********************************************/ + /* Check if a reception error occured */ + if (CEC_GetFlagStatus(CEC_FLAG_RERR)) + { + /* Set receive status bit (Error) */ + ReceiveStatus = 0; + ReceivedFrame = 1; + RecepErrorCode = HDMI_CEC_GetErrorStatus(); + CEC_ClearFlag(CEC_FLAG_RERR | CEC_FLAG_RSOM | CEC_FLAG_REOM | CEC_FLAG_RBTF); + } + else if (CEC_GetFlagStatus(CEC_FLAG_RBTF)) + { + /* Check if the byte received is the last one of the message */ + if (CEC_GetFlagStatus(CEC_FLAG_REOM)) + { + HDMI_CEC_RX_MessageStructPrivate.Operande[RxCounter-1] = CEC_ReceiveDataByte(); + HDMI_CEC_RX_MessageStructPrivate.RxMessageLength = RxCounter; + ReceiveStatus = SUCCESS; + ReceivedFrame = 1; + } + /* Check if the byte received is a Header */ + else if (CEC_GetFlagStatus(CEC_FLAG_RSOM)) + { + ReceiveStatus = 0; + HDMI_CEC_RX_MessageStructPrivate.Header = CEC_ReceiveDataByte(); + RxCounter = 0; + } + /* Receive each byte except header in the reception buffer */ + else + { + if (RxCounter != 0) + { + HDMI_CEC_RX_MessageStructPrivate.Operande[RxCounter-1] = CEC_ReceiveDataByte(); + RxCounter++; + } + else + { + HDMI_CEC_RX_MessageStructPrivate.Opcode = CEC_ReceiveDataByte(); + RxCounter++; + } + + } + /* Clear all reception flags */ + CEC_ClearFlag(CEC_FLAG_RSOM | CEC_FLAG_REOM | CEC_FLAG_RBTF); + } + + /********************** Transmission ******************************************/ + /* Check if a transmission error occured */ + if (CEC_GetFlagStatus(CEC_FLAG_TERR)) + { + TransErrorCode = HDMI_CEC_GetErrorStatus(); + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + SendFrame = 1; + SendStatus = 0; + } + /* Check if end of message bit is set in the data to be transmitted */ + else if (CEC_GetFlagStatus(CEC_FLAG_TEOM)) + { + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_RBTF); + CEC_EndOfMessageCmd(DISABLE); + SendFrame = 1; + SendStatus = SUCCESS; + } + /* Check if data byte has been sent */ + else if (CEC_GetFlagStatus(CEC_FLAG_TBTRF)) + { + /* Set EOM bit if the byte to be transmitted is the last one of the TransmitBuffer */ + if (TxCounter == (HDMI_CEC_TX_MessageStructPrivate.TxMessageLength)) + { + CEC_SendDataByte(BufferPointer[TxCounter]); + TxCounter++; + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(ENABLE); + } + else + { + /* Put the byte in the TX Buffer */ + CEC_SendDataByte(BufferPointer[TxCounter]); + TxCounter++; + CEC_ClearFlag(CEC_FLAG_TBTRF); + } + } +} + +/** + * @brief Report physical address to all other devices thus allowing any + device to create a map of the network. + * @param None + * @retval HDMI_CEC_Error: CEC Error code. + */ +HDMI_CEC_Error HDMI_CEC_ReportPhysicalAddress(void) +{ + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + HDMI_CEC_Message HDMI_CEC_TX_Message; + + HDMI_CEC_TX_Message.Header = ((MyLogicalAddress << 4) | 0xF); + HDMI_CEC_TX_Message.Opcode = HDMI_CEC_OPCODE_REPORT_PHYSICAL_ADDRESS; + HDMI_CEC_TX_Message.Operande[0] = MyPhysicalAddress >> 8; + HDMI_CEC_TX_Message.Operande[1] = MyPhysicalAddress & 0xFF; + HDMI_CEC_TX_Message.Operande[2] = DeviceType; + HDMI_CEC_TX_Message.TxMessageLength = 0x03; + + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_Message); + + return errorstatus; +} + +/** + * @brief Handle CEC command receive callback. + * When receiving the STANDBY Opcode commande, the system is entred in + * Stop mode and when wakeup, the PLL is configured as system clock and + * the HSI is selected as PLL source. + * @param None + * @retval None + */ +void HDMI_CEC_CommandCallBack(void) +{ + uint8_t i = 0, sendcount = 0; + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + EXTI_InitTypeDef EXTI_InitStructure; + + switch (HDMI_CEC_RX_MessageStructPrivate.Opcode) + { + case HDMI_CEC_OPCODE_REPORT_PHYSICAL_ADDRESS: + HDMI_CEC_MapStruct.PhysicalAddress_A = HDMI_CEC_RX_MessageStructPrivate.Operande[1] >> 4; + HDMI_CEC_MapStruct.PhysicalAddress_B = HDMI_CEC_RX_MessageStructPrivate.Operande[1] & 0x0F; + HDMI_CEC_MapStruct.PhysicalAddress_C = HDMI_CEC_RX_MessageStructPrivate.Operande[0] >> 4; + HDMI_CEC_MapStruct.PhysicalAddress_D = HDMI_CEC_RX_MessageStructPrivate.Operande[0] & 0x0F; + HDMI_CEC_MapStruct.LogicalAddress = (HDMI_CEC_RX_MessageStructPrivate.Header >> 0x4) & 0x0F; + HDMI_CEC_MapStruct.DeviceType = HDMI_CEC_RX_MessageStructPrivate.Operande[2]; + HDMI_CEC_DeviceMap[DeviceCount] = HDMI_CEC_MapStruct; + HDMI_CEC_Follower_String[(HDMI_CEC_DeviceMap[DeviceCount].LogicalAddress)][1] = (uint8_t*)"1"; + DeviceCount++; + break; + + case HDMI_CEC_OPCODE_STANDBY: + /* CEC Line */ + GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource8); + /* Configure the CEC Line as EXTI Line on Falling Edge */ + EXTI_ClearITPendingBit(EXTI_Line8); + EXTI_InitStructure.EXTI_Line = EXTI_Line8; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); + /* Request to enter Stop mode */ + PWR_EnterSTOPMode(PWR_Regulator_ON, PWR_STOPEntry_WFI); + + /* Disable the CEC EXTI Line */ + EXTI_InitStructure.EXTI_LineCmd = DISABLE; + EXTI_Init(&EXTI_InitStructure); + /* Configure the PLL Source */ + RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_6); + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + { + } + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while(RCC_GetSYSCLKSource() != 0x08) + { + } + break; + + case HDMI_CEC_OPCODE_GET_CEC_VERSION: + /* Send the Used CEC version */ + HDMI_CEC_TX_MessageStructPrivate.Header = ((MyLogicalAddress << 4) | HDMI_CEC_RX_MessageStructPrivate.Header >> 4); + HDMI_CEC_TX_MessageStructPrivate.Opcode = HDMI_CEC_OPCODE_CEC_VERSION; + HDMI_CEC_TX_MessageStructPrivate.Operande[0] = HDMI_CEC_VERSION; /* CEC Version */ + HDMI_CEC_TX_MessageStructPrivate.TxMessageLength = 0x01; + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_MessageStructPrivate); + + /* Retransmit message until 5 time */ + while ((errorstatus != HDMI_CEC_OK) && sendcount < 0x5) + { + sendcount++; + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_MessageStructPrivate); + } + break; + + case HDMI_CEC_OPCODE_GIVE_PHYSICAL_ADDRESS: + /* Send the Physical address */ + errorstatus = HDMI_CEC_ReportPhysicalAddress(); + sendcount = 0; + /* Retransmit message until 5 time */ + while ((errorstatus != HDMI_CEC_OK) && sendcount < 0x5) + { + sendcount++; + errorstatus = HDMI_CEC_ReportPhysicalAddress(); + } + break; + + case HDMI_CEC_OPCODE_FEATURE_ABORT: + /* The device doesn't support the requested message type, or that it cannot + execute it at the present time. */ + FeatureOpcode = HDMI_CEC_RX_MessageStructPrivate.Operande[0]; + AbortReason = HDMI_CEC_RX_MessageStructPrivate.Operande[1]; + break; + + case HDMI_CEC_OPCODE_GIVE_OSD_NAME: + /* Send the OSD name = STM32100E CEC*/ + HDMI_CEC_TX_MessageStructPrivate.Header = ((MyLogicalAddress << 4) | HDMI_CEC_RX_MessageStructPrivate.Header >> 4); + HDMI_CEC_TX_MessageStructPrivate.Opcode = HDMI_CEC_OPCODE_SET_OSD_NAME; + /* STM32100E*/ + HDMI_CEC_TX_MessageStructPrivate.Operande[0] = 0x53; + HDMI_CEC_TX_MessageStructPrivate.Operande[1] = 0x54; + HDMI_CEC_TX_MessageStructPrivate.Operande[2] = 0x4D; + HDMI_CEC_TX_MessageStructPrivate.Operande[3] = 0x33; + HDMI_CEC_TX_MessageStructPrivate.Operande[4] = 0x32; + HDMI_CEC_TX_MessageStructPrivate.Operande[5] = 0x31; + HDMI_CEC_TX_MessageStructPrivate.Operande[6] = 0x30; + HDMI_CEC_TX_MessageStructPrivate.Operande[7] = 0x30; + HDMI_CEC_TX_MessageStructPrivate.Operande[8] = 0x45; + HDMI_CEC_TX_MessageStructPrivate.Operande[9] = 0x20; + /* CEC */ + HDMI_CEC_TX_MessageStructPrivate.Operande[10] = 0x43; + HDMI_CEC_TX_MessageStructPrivate.Operande[11] = 0x45; + HDMI_CEC_TX_MessageStructPrivate.Operande[12] = 0x43; + HDMI_CEC_TX_MessageStructPrivate.TxMessageLength = 13; + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_MessageStructPrivate); + sendcount = 0; + /* Retransmit message until 5 time */ + while ((errorstatus != HDMI_CEC_OK) && sendcount < 0x5) + { + sendcount++; + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_MessageStructPrivate); + } + break; + + case HDMI_CEC_OPCODE_ROUTING_CHANGE: + for (i = 0;i < 0x14;i++) + { + if ((HDMI_CEC_DeviceMap[i].PhysicalAddress_A == HDMI_CEC_RX_MessageStructPrivate.Operande[1] >> 4) && + (HDMI_CEC_DeviceMap[i].PhysicalAddress_B == HDMI_CEC_RX_MessageStructPrivate.Operande[1]&0x0F) && + (HDMI_CEC_DeviceMap[i].PhysicalAddress_C == HDMI_CEC_RX_MessageStructPrivate.Operande[0] >> 4) && + (HDMI_CEC_DeviceMap[i].PhysicalAddress_D == HDMI_CEC_RX_MessageStructPrivate.Operande[0]&0x0F)) + { + HDMI_CEC_MapStruct.LogicalAddress = (HDMI_CEC_RX_MessageStructPrivate.Header >> 0x4) & 0x0F; + HDMI_CEC_MapStruct.DeviceType = HDMI_CEC_RX_MessageStructPrivate.Operande[2]; + HDMI_CEC_DeviceMap[i] = HDMI_CEC_MapStruct; + } + } + break; + + default: + /* Send Abort feature*/ + HDMI_CEC_TX_MessageStructPrivate.Header = ((MyLogicalAddress << 4) | HDMI_CEC_RX_MessageStructPrivate.Header >> 4); + HDMI_CEC_TX_MessageStructPrivate.Opcode = HDMI_CEC_OPCODE_FEATURE_ABORT; + HDMI_CEC_TX_MessageStructPrivate.Operande[0] = 0x02; /* defines command to be performed */ + HDMI_CEC_TX_MessageStructPrivate.Operande[1] = HDMI_CEC_REFUSED; /* Reason for abort feature */ + HDMI_CEC_TX_MessageStructPrivate.TxMessageLength = 0x02; + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_MessageStructPrivate); + sendcount = 0; + /* Retransmit message until 5 time */ + while ((errorstatus != HDMI_CEC_OK) && sendcount < 0x5) + { + sendcount++; + errorstatus = HDMI_CEC_TransmitMessage(&HDMI_CEC_TX_MessageStructPrivate); + } + break; + + } +} + +/** + * @brief Check the connected CEC devices. + * @param None + * @retval HDMI_CEC_Error + */ +HDMI_CEC_Error HDMI_CEC_CheckConnectedDevices(void) +{ + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + uint32_t count = 0, i = 1; + + /*----------------------------- TV device ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x0); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[0][1] = (uint8_t*)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Recording device 1 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x1); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[1][1] = (uint8_t*)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + /*----------------------------- Recording device 2 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x2); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[2][1] = (uint8_t*)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Tuner 1 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x3); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[3][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + /*----------------------------- Playback device 1 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x4); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[4][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Audio system ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x5); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[5][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Tuner 2 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x6); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[6][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Tuner 3 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x7); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[7][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Playback device 2 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x8); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[8][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + /*----------------------------- Recording device 3 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0x9); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[9][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + /*----------------------------- Tuner 4 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0xA); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[10][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + /*----------------------------- Playback device 3 ---------------------------*/ + CEC_OwnAddressConfig(MyLogicalAddress); /* Own address = MyLogicalAddress */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte((MyLogicalAddress << 4) | 0xB); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_OK) + { + HDMI_CEC_Follower_String[11][1] = (uint8_t *)"1"; + i++; + errorstatus = HDMI_CEC_OK; + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + + CECDevicesNumber = i - 1; + + return errorstatus; +} + +/** + * @brief Physical address discovery. + * @param None + * @retval HDMI_CEC_Error: CEC Error code. + */ +static HDMI_CEC_Error PhysicalAddressDiscovery(void) +{ + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; +#ifdef HDMI_CEC_USE_DDC + uint32_t index = 0, i = 0; +#endif + + /*------------------------------ Physical address discovery -----------------*/ + if (HDMI_CEC_ROOT == 0x1) + { + MyPhysicalAddress = 0x0000; + /* The HDMI-CEC here is configured as sink or as a repeater. The configuration + of the +5V power signal and the HPD should be well configured. + Implement here the EDID Structure to be sent to the HDMI source. + For more details please refer to the HDMI specification. + The EDID structure should be sent to the device source using the DDC Channel + and using the HPD signal. */ + } + else + { + +#ifdef HDMI_CEC_USE_DDC + /* The HDMI-CEC here is configured as source or as a repeater. The configuration + of the +5V power signal and the HPD should be well configured. + The source should wait for HPD and then read the EDID structure. */ + while(GPIO_ReadInputDataBit(HDMI_CEC_HPD_GPIO_PORT, HDMI_CEC_HPD_PIN) == RESET) + { + } + /* Wait for 100 ms after HPD was received */ + for(i = 0; i < 0x5FFFF; i++) + { + } + + /* Return the physical address using the I2C by reading the 2 bytes 24 and + 25 form the EDID */ + /* Read the EDID Block 0 and EDID Block 1 at address 0xA0 */ + /*!< While the bus is busy */ + while(I2C_GetFlagStatus(HDMI_CEC_I2C, I2C_FLAG_BUSY)) + { + } + + /*!< Send START condition */ + I2C_GenerateSTART(HDMI_CEC_I2C, ENABLE); + + /*!< Test on EV5 and clear it */ + while(!I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_MODE_SELECT)) + { + } + + /*!< Send EEPROM address for write */ + I2C_Send7bitAddress(HDMI_CEC_I2C, 0xA0, I2C_Direction_Transmitter); + + + /*!< Test on EV6 and clear it */ + while(!I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + { + } + + /*!< Send the EEPROM's internal address to read from: Only one byte address */ + I2C_SendData(HDMI_CEC_I2C, 0x00); + + /*!< Test on EV8 and clear it */ + while(!I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_BYTE_TRANSMITTED)) + { + } + + /*!< Send STRAT condition a second time */ + I2C_GenerateSTART(HDMI_CEC_I2C, ENABLE); + + /*!< Test on EV5 and clear it */ + while(!I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_MODE_SELECT)) + { + } + + /*!< Send EEPROM address for read */ + I2C_Send7bitAddress(HDMI_CEC_I2C, 0xA1, I2C_Direction_Receiver); + + /*!< Test on EV6 and clear it */ + while(!I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) + { + } + + /* While there is data to be read */ + while (NumByteToRead-- > 1) + { + while(I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_BYTE_RECEIVED)) + { + } + for(i = 0; i < 0xFFF; i++) + { + } + pBuffer[index++] = I2C_ReceiveData(HDMI_CEC_I2C); + } + + /* Disable Acknowledgement */ + I2C_AcknowledgeConfig(HDMI_CEC_I2C, DISABLE); + + /* Send STOP Condition */ + I2C_GenerateSTOP(HDMI_CEC_I2C, ENABLE); + + while(I2C_CheckEvent(HDMI_CEC_I2C, I2C_EVENT_MASTER_BYTE_RECEIVED)); + pBuffer[index] = I2C_ReceiveData(HDMI_CEC_I2C); + + /* Enable Acknowledgement to be ready for another reception */ + I2C_AcknowledgeConfig(HDMI_CEC_I2C, ENABLE); + MyPhysicalAddress = ((pBuffer[138] << 8) | pBuffer[137]); +#else + MyPhysicalAddress = 0x1000; +#endif + } + + return errorstatus; +} +/** + * @brief Allocate the logical address. + * @param None + * @retval HDMI_CEC_Error: CEC Error code. + */ +static HDMI_CEC_Error LogicalAddressAllocation(void) +{ + HDMI_CEC_Error errorstatus = HDMI_CEC_OK; + uint32_t count = 0; + + /*------------------ Logical address allocation -----------------------------*/ + /* Get the device type */ + /* Device type = CEC_TV */ + if (DeviceType == HDMI_CEC_TV) + { + if (HDMI_CEC_ROOT) + { + MyLogicalAddress = 0x00; + } + else + { + CEC_OwnAddressConfig(0xE); /* Own address = 0xE */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0xEE); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the polling message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x0E; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + MyLogicalAddress = 0x0F; + errorstatus = HDMI_CEC_DEVICE_UNREGISTRED; + } + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF); + CEC_EndOfMessageCmd(DISABLE); + } + + /* Device type = CEC_RECORDING */ + if (DeviceType == HDMI_CEC_RECORDING) + { + CEC_OwnAddressConfig(0x1); /* Own address = 0x1 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x11); + + /* Start of message */ + CEC_StartOfMessage(); + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x01; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0x2); /* Own address = 0x2 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x22); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x02; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0x9); /* Own address = 0x9 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x99); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x09; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + MyLogicalAddress = 0x0F; + errorstatus = HDMI_CEC_DEVICE_UNREGISTRED; + } + } + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + CEC_EndOfMessageCmd(DISABLE); + } + + /* Device type = CEC_TUNER */ + if (DeviceType == HDMI_CEC_TUNER) + { + CEC_OwnAddressConfig(0x3); /* Own address = 0x3 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x33); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x03; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0x6); /* Own address = 0x6 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x66); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x06; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0x7); /* Own address = 0x7 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x77); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x07; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0xA); /* Own address = 0xA */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0xAA); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x0A; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + MyLogicalAddress = 0x0F; + errorstatus = HDMI_CEC_DEVICE_UNREGISTRED; + } + } + } + } + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + CEC_EndOfMessageCmd(DISABLE); + } + + /* Device type = CEC_PLAYBACK */ + if (DeviceType == HDMI_CEC_PLAYBACK) + { + CEC_OwnAddressConfig(0x4); /* Own address = 0x4 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x44); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x04; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0x8); /* Own address = 0x8 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x88); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x08; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + + CEC_EndOfMessageCmd(DISABLE); + + CEC_OwnAddressConfig(0xB); /* Own address = 0xBB */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0xBB); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x0B; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + MyLogicalAddress = 0x0F; + errorstatus = HDMI_CEC_DEVICE_UNREGISTRED; + } + } + } + + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + CEC_EndOfMessageCmd(DISABLE); + } + + /* Device type = CEC Audio System */ + if (DeviceType == HDMI_CEC_AUDIOSYSTEM) + { + CEC_OwnAddressConfig(0x5); /* Own address = 0x5 */ + + CEC_EndOfMessageCmd(ENABLE); + + CEC_SendDataByte(0x55); + + /* Start of message */ + CEC_StartOfMessage(); + + count = 0; + + /* Wait till the header message is sent */ + while ((CEC_GetFlagStatus(CEC_FLAG_TBTRF) == RESET) && (CEC_GetFlagStatus(CEC_FLAG_TERR) == RESET) && (count < HDMI_CEC_TIMEOUT_VALUE)) + { + count++; + } + + if (count >= HDMI_CEC_TIMEOUT_VALUE) + { + errorstatus = HDMI_CEC_TIMEOUT; + return(errorstatus); + } + + errorstatus = HDMI_CEC_GetErrorStatus(); + + if (errorstatus == HDMI_CEC_BLOCK_ACKNOWLEDGE) + { + MyLogicalAddress = 0x05; + errorstatus = HDMI_CEC_OK; + } + else if (errorstatus == HDMI_CEC_OK) + { + MyLogicalAddress = 0x0F; + errorstatus = HDMI_CEC_DEVICE_UNREGISTRED; + } + + /* Clear CEC CSR register */ + CEC_ClearFlag(CEC_FLAG_TBTRF | CEC_FLAG_TERR); + CEC_EndOfMessageCmd(DISABLE); + } + + return errorstatus; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ + + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.h new file mode 100644 index 0000000..a899acf --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_cec.h @@ -0,0 +1,290 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_cec.h + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file contains all the functions prototypes for the stm32100e_eval_cec + * firmware driver. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32100E_EVAL_CEC_H +#define __STM32100E_EVAL_CEC_H + +#ifdef __cplusplus +extern "C" +{ +#endif + + /* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @defgroup STM32100E_EVAL_CEC + * @{ + */ + +/** @defgroup STM32100E_EVAL_CEC_Exported_Types + * @{ + */ +typedef enum +{ + HDMI_CEC_BIT_TIMING = (1), /*!< CEC Bit Timing Error */ + HDMI_CEC_BIT_PERIOD = (2), /*!< CEC Bit Period Error */ + HDMI_CEC_RX_BLOCK_FINISHED = (3), /*!< CEC Receive Block finished Error */ + HDMI_CEC_START_BIT = (4), /*!< CEC Start Bit Error */ + HDMI_CEC_BLOCK_ACKNOWLEDGE = (5), /*!< CEC Block Acknowledge Error */ + HDMI_CEC_LINE = (6), /*!< CEC Line Error */ + HDMI_CEC_TX_BLOCK_FINISHED = (7), /*!< CEC Transmit Block Transfer finished Error */ + HDMI_CEC_DEVICE_UNREGISTRED = (8), /*!< CEC Device Unregistred */ + HDMI_CEC_TIMEOUT = (9), /*!< CEC TimeOut */ + HDMI_CEC_OK = (10) /*!< CEC OK */ +}HDMI_CEC_Error; + +typedef struct +{ + __IO uint8_t PhysicalAddress_A; + __IO uint8_t PhysicalAddress_B; + __IO uint8_t PhysicalAddress_C; + __IO uint8_t PhysicalAddress_D; + __IO uint8_t LogicalAddress; + __IO uint8_t DeviceType; +}HDMI_CEC_Map; + + +#define HDMI_CEC_TX_MESSAGE_LENGTH_MAX ((uint32_t)0x0000000E) +#define HDMI_CEC_TIMEOUT_VALUE ((uint32_t)0x001FFFFF) + +/** +* @brief CEC Init Structure definition +*/ +typedef struct +{ + __IO uint8_t Header; + __IO uint8_t Opcode; + __IO uint8_t Operande[HDMI_CEC_TX_MESSAGE_LENGTH_MAX]; + __IO uint8_t TxMessageLength; + __IO uint8_t RxMessageLength; +}HDMI_CEC_Message; + +/** +* @} +*/ + +/** @defgroup STM32100E_EVAL_CEC_Exported_Constants + * @{ + */ + +/** + * @brief CEC device types + */ +#define HDMI_CEC_TV 0x00 +#define HDMI_CEC_RECORDING 0x01 +#define HDMI_CEC_TUNER 0x03 +#define HDMI_CEC_PLAYBACK 0x04 +#define HDMI_CEC_AUDIOSYSTEM 0x05 + + +/** + * @brief HDMI CEC I2C Interface pins + */ +#define HDMI_CEC_I2C_SCL_PIN GPIO_Pin_6 +#define HDMI_CEC_I2C_SDA_PIN GPIO_Pin_7 +#define HDMI_CEC_I2C_GPIO_PORT GPIOB +#define HDMI_CEC_I2C_GPIO_CLK RCC_APB2Periph_GPIOB +#define HDMI_CEC_I2C I2C1 +#define HDMI_CEC_I2C_CLK RCC_APB1Periph_I2C1 + +/** + * @brief HDMI CEC HPD (Hot Plug Detect) Interface pin + */ +#define HDMI_CEC_HPD_PIN GPIO_Pin_9 +#define HDMI_CEC_HPD_GPIO_PORT GPIOB +#define HDMI_CEC_HPD_GPIO_CLK RCC_APB2Periph_GPIOB + +/** + * @brief HDMI CEC Interface pin + */ +#define HDMI_CEC_LINE_PIN GPIO_Pin_8 +#define HDMI_CEC_LINE_GPIO_PORT GPIOB +#define HDMI_CEC_LINE_GPIO_CLK RCC_APB2Periph_GPIOB + +#define HDMI_CEC_I2C_SLAVE_ADDRESS7 0xA0 +#define HDMI_CEC_I2C_CLOCK_SPEED 100000 + +/** + * @brief HDMI CEC Root (Mainly for TV with a fixed physical address (0.0.0.0)) + * If you want to configure the STM32100E-EVAL board as CEC Root (Sink) + * change the following define to 0x1 + */ +#define HDMI_CEC_ROOT 0x00 + +/** + * @brief To select if the DDC Channel will be used for physical address discovery + * or not. To use the DDC Channel to read the EDID structure uncomment + * the following line. + * If the device is configured as HMDI source it should read his own physical + * address from the sink that is connected to. + */ +/* #define HDMI_CEC_USE_DDC */ + +/** + * @brief CEC version: V1.3a + */ +#define HDMI_CEC_VERSION 0x04 + +/** + * @brief Reason for Abort feature + */ +#define HDMI_CEC_UNRECOGNIZED_OPCODE 0x00 +#define HDMI_CEC_NOT_CORRECT_MODETORESPOND 0x01 +#define HDMI_CEC_CANNOTPROVIDE_SOURCE 0x02 +#define HDMI_CEC_INVALID_OPERAND 0x03 +#define HDMI_CEC_REFUSED 0x04 + +/** + * @brief HDMI CEC specific commands + */ +#define HDMI_CEC_OPCODE_ACTIVE_SOURCE ((uint8_t) 0x82) +#define HDMI_CEC_OPCODE_IMAGE_VIEW_ON ((uint8_t) 0x04) +#define HDMI_CEC_OPCODE_TEXT_VIEW_ON ((uint8_t) 0x0D) +#define HDMI_CEC_OPCODE_INACTIVE_SOURCE ((uint8_t) 0x9D) +#define HDMI_CEC_OPCODE_REQUEST_ACTIVE_SOURCE ((uint8_t) 0x85) +#define HDMI_CEC_OPCODE_ROUTING_CHANGE ((uint8_t) 0x80) +#define HDMI_CEC_OPCODE_ROUTING_INFORMATION ((uint8_t) 0x81) +#define HDMI_CEC_OPCODE_SET_STREAM_PATH ((uint8_t) 0x86) +#define HDMI_CEC_OPCODE_STANDBY ((uint8_t) 0x36) +#define HDMI_CEC_OPCODE_RECORD_OFF ((uint8_t) 0x0B) +#define HDMI_CEC_OPCODE_RECORD_ON ((uint8_t) 0x09) +#define HDMI_CEC_OPCODE_RECORD_STATUS ((uint8_t) 0x0A) +#define HDMI_CEC_OPCODE_RECORD_TV_SCREEN ((uint8_t) 0x0F) +#define HDMI_CEC_OPCODE_CLEAR_ANALOGUE_TIMER ((uint8_t) 0x33) +#define HDMI_CEC_OPCODE_CLEAR_DIGITAL_TIMER ((uint8_t) 0x99) +#define HDMI_CEC_OPCODE_CLEAR_EXTERNAL_TIMER ((uint8_t) 0xA1) +#define HDMI_CEC_OPCODE_SET_ANALOGUE_TIMER ((uint8_t) 0x34) +#define HDMI_CEC_OPCODE_SET_DIGITAL_TIMER ((uint8_t) 0x97) +#define HDMI_CEC_OPCODE_SET_EXTERNAL_TIMER ((uint8_t) 0xA2) +#define HDMI_CEC_OPCODE_SET_TIMER_PROGRAM_TITLE ((uint8_t) 0x67) +#define HDMI_CEC_OPCODE_TIMER_CLEARED_STATUS ((uint8_t) 0x43) +#define HDMI_CEC_OPCODE_TIMER_STATUS ((uint8_t) 0x35) +#define HDMI_CEC_OPCODE_CEC_VERSION ((uint8_t) 0x9E) +#define HDMI_CEC_OPCODE_GET_CEC_VERSION ((uint8_t) 0x9F) +#define HDMI_CEC_OPCODE_GIVE_PHYSICAL_ADDRESS ((uint8_t) 0x83) +#define HDMI_CEC_OPCODE_GET_MENU_LANGUAGE ((uint8_t) 0x91) +#define HDMI_CEC_OPCODE_REPORT_PHYSICAL_ADDRESS ((uint8_t) 0x84) +#define HDMI_CEC_OPCODE_SET_MENU_LANGUAGE ((uint8_t) 0x32) +#define HDMI_CEC_OPCODE_DECK_CONTROL ((uint8_t) 0x42) +#define HDMI_CEC_OPCODE_DECK_STATUS ((uint8_t) 0x1B) +#define HDMI_CEC_OPCODE_GIVE_DECK_STATUS ((uint8_t) 0x1A) +#define HDMI_CEC_OPCODE_PLAY ((uint8_t) 0x41) +#define HDMI_CEC_OPCODE_GIVE_TUNER_DEVICE_STATUS ((uint8_t) 0x08) +#define HDMI_CEC_OPCODE_SELECT_ANALOGUE_SERVICE ((uint8_t) 0x92) +#define HDMI_CEC_OPCODE_SELECT_DIGITAL_SERVICE ((uint8_t) 0x93) +#define HDMI_CEC_OPCODE_TUNER_DEVICE_STATUS ((uint8_t) 0x07) +#define HDMI_CEC_OPCODE_TUNER_STEP_DECREMENT ((uint8_t) 0x06) +#define HDMI_CEC_OPCODE_TUNER_STEP_INCREMENT ((uint8_t) 0x05) +#define HDMI_CEC_OPCODE_DEVICE_VENDOR_ID ((uint8_t) 0x87) +#define HDMI_CEC_OPCODE_GIVE_DEVICE_VENDOR_ID ((uint8_t) 0x8C) +#define HDMI_CEC_OPCODE_VENDOR_COMMAND ((uint8_t) 0x89) +#define HDMI_CEC_OPCODE_VENDOR_COMMAND_WITH_ID ((uint8_t) 0xA0) +#define HDMI_CEC_OPCODE_VENDOR_REMOTE_BUTTON_DOWN ((uint8_t) 0x8A) +#define HDMI_CEC_OPCODE_VENDOR_REMOTE_BUTTON_UP ((uint8_t) 0x8B) +#define HDMI_CEC_OPCODE_SET_OSD_STRING ((uint8_t) 0x64) +#define HDMI_CEC_OPCODE_GIVE_OSD_NAME ((uint8_t) 0x46) +#define HDMI_CEC_OPCODE_SET_OSD_NAME ((uint8_t) 0x47) +#define HDMI_CEC_OPCODE_MENU_REQUEST ((uint8_t) 0x8D) +#define HDMI_CEC_OPCODE_MENU_STATUS ((uint8_t) 0x8E) +#define HDMI_CEC_OPCODE_USER_CONTROL_PRESSED ((uint8_t) 0x44) +#define HDMI_CEC_OPCODE_USER_CONTROL_RELEASED ((uint8_t) 0x45) +#define HDMI_CEC_OPCODE_GIVE_DEVICE_POWER_STATUS ((uint8_t) 0x8F) +#define HDMI_CEC_OPCODE_REPORT_POWER_STATUS ((uint8_t) 0x90) +#define HDMI_CEC_OPCODE_FEATURE_ABORT ((uint8_t) 0x00) +#define HDMI_CEC_OPCODE_ABORT ((uint8_t) 0xFF) +#define HDMI_CEC_OPCODE_GIVE_AUDIO_STATUS ((uint8_t) 0x71) +#define HDMI_CEC_OPCODE_GIVE_SYSTEM_AUDIO_MODE_STATUS ((uint8_t) 0x7D) +#define HDMI_CEC_OPCODE_REPORT_AUDIO_STATUS ((uint8_t) 0x7A) +#define HDMI_CEC_OPCODE_SET_SYSTEM_AUDIO_MODE ((uint8_t) 0x72) +#define HDMI_CEC_OPCODE_SYSTEM_AUDIO_MODE_REQUEST ((uint8_t) 0x70) +#define HDMI_CEC_OPCODE_SYSTEM_AUDIO_MODE_STATUS ((uint8_t) 0x7E) +#define HDMI_CEC_OPCODE_SET_AUDIO_RATE ((uint8_t) 0x9A) + + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_CEC_Exported_Macros + * @{ + */ +/* HDMI_CEC_HPD: HDMI HPD pin low */ +#define HDMI_CEC_HPD_LOW() GPIO_ResetBits(HDMI_CEC_HPD_GPIO_PORT, HDMI_CEC_HPD_PIN) +/* HDMI_CEC_HPD: HDMI HPD pin high */ +#define HDMI_CEC_HPD_HIGH() GPIO_SetBits(HDMI_CEC_HPD_GPIO_PORT, HDMI_CEC_HPD_PIN) + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_CEC_Exported_Functions + * @{ + */ +HDMI_CEC_Error HDMI_CEC_Init(void); +HDMI_CEC_Error HDMI_CEC_TransmitMessage(HDMI_CEC_Message *HDMI_CEC_TX_MessageStructure); +HDMI_CEC_Error HDMI_CEC_GetErrorStatus (void); +void HDMI_CEC_ProcessIRQSrc(void); +HDMI_CEC_Error HDMI_CEC_ReportPhysicalAddress(void); +void HDMI_CEC_CommandCallBack(void); +HDMI_CEC_Error HDMI_CEC_CheckConnectedDevices(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32100E_EVAL_CEC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ + diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.c new file mode 100644 index 0000000..735827b --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.c @@ -0,0 +1,482 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_fsmc_onenand.c + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file provides a set of functions needed to drive the + * KFG1216U2A/B-DIB6 OneNAND memory mounted on STM32100E-EVAL board. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32100e_eval_fsmc_onenand.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL_FSMC_ONENAND + * @brief This file provides a set of functions needed to drive the + * KFG1216x2A-xxB5 OneNAND memory mounted on STM32100E-EVAL board. + * @{ + */ + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Private_Types + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Private_Defines + * @{ + */ +#define BANK1_ONENAND1_ADDR ((uint32_t)0x60000000) +#define ONENAND_BOOTPARTITION_ADDR ((uint32_t)BANK1_ONENAND1_ADDR) + + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Private_Macros + * @{ + */ +#define OneNAND_WRITE(Address, Data) (*(__IO uint16_t *)(Address) = (Data)) + +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Private_Variables + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Private_Function_Prototypes + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Private_Functions + * @{ + */ + +/** + * @brief Configures the FSMC and GPIOs to interface with the OneNAND memory. + * This function must be called before any write/read operation on the + * OneNAND. + * @param None + * @retval None + */ +void OneNAND_Init(void) +{ + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; + GPIO_InitTypeDef GPIO_InitStructure; + + + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); + +/*-- GPIO Configuration ------------------------------------------------------*/ + /* OneNAND Data lines configuration */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE | + RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); + +/*-- GPIO Configuration ------------------------------------------------------*/ + /*!< OneNAND Data lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | + GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + /*!< OneNAND Address lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | + GPIO_Pin_14 | GPIO_Pin_15; + GPIO_Init(GPIOF, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + /*!< CLK, NOE and NWE configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 |GPIO_Pin_5; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /*!< NE1 configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /*!< NL configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7; + GPIO_Init(GPIOB, &GPIO_InitStructure); + GPIO_PinRemapConfig(GPIO_Remap_FSMC_NADV, DISABLE); + + /*!< NWAIT configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /*-- FSMC Configuration ----------------------------------------------------*/ + p.FSMC_AddressSetupTime = 0x01; + p.FSMC_AddressHoldTime = 0x00; + p.FSMC_DataSetupTime = 0x05; + p.FSMC_BusTurnAroundDuration = 0x02; + p.FSMC_CLKDivision = 0x1; + p.FSMC_DataLatency = 0x01; + p.FSMC_AccessMode = FSMC_AccessMode_B; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Enable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Enable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); +} + +/** + * @brief Resets the OneNAND memory. + * @param None + * @retval None + */ +void OneNAND_Reset(void) +{ + OneNAND_WRITE(ONENAND_BOOTPARTITION_ADDR, OneNAND_CMD_RESET); +} + +/** + * @brief Reads OneNAND memory's Manufacturer and Device Code. + * @param OneNAND_ID: pointer to a OneNAND_IDTypeDef structure which will hold + * the Manufacturer and Device Code. + * @retval None + */ +void OneNAND_ReadID(OneNAND_IDTypeDef* OneNAND_ID) +{ + uint16_t status = 0x0; + + /* Wait till no ongoing operation */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + while((status & 0x8000) == 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + } + + /* Read ID data */ + OneNAND_ID->Manufacturer_ID = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_MANUFACTERID); + OneNAND_ID->Device_ID = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_DEVICEID); + + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION) = 0x40E0; +} + +/** + * @brief Unlocks the specified OneNAND memory block (128Kb). + * @param BlockNumber: specifies the block number to be erased. This parameter + * should be between 0 and 511. + * @retval OneNAND memory Interrupt Status. + */ +uint16_t OneNAND_UnlockBlock(uint32_t BlockNumber) +{ + uint16_t status = 0; + + /* Wait till no ongoing operation */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + while((status & 0x8000) == 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + } + + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBLOCKADDRESS) = BlockNumber; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_UNLOCK; + + /* Wait till the command is completed */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + + while((status & 0x8000) != 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + } + + /* Get the Controller Status */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + return (status); +} + +/** + * @brief Erases the specified OneNAND memory block (128Kb). + * @param BlockNumber: specifies the block number to be erased. This parameter + * should be between 0 and 511. + * @retval OneNAND memory Interrupt Status. + */ +uint16_t OneNAND_EraseBlock(uint32_t BlockNumber) +{ + uint16_t status = 0x0; + + /* Wait till no ongoing operation */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + while((status & 0x8000) == 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + } + + /* Erase operation */ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = BlockNumber; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_ERASE; + + /* Wait till no error is generated */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + while((status & 0x0400) == 0x0400) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + } + + /* Wait till the command is completed */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + + while((status & 0x8000) != 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + } + + /* Get the Controller Status */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + return (status); +} + +/** + * @brief Writes a Half-word buffer to the OneNAND memory. + * @param pBuffer: pointer to buffer. + * @param WriteAddr: OneNAND memory internal address from which the data will be + * written. + * @param NumHalfwordToWrite: number of half-words to write. + * @retval OneNAND memory Controller Status. + */ +uint16_t OneNAND_WriteBuffer(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToWrite) +{ + uint32_t datacounter = 0; + uint16_t status = 0; + + /* Load the buffer to be written into the DATA RAM0*/ + for(datacounter = 0; datacounter < NumHalfwordToWrite; datacounter++) + { + *(__IO uint16_t *)((BANK1_ONENAND1_ADDR + OneNAND_DATA_RAM_0_0_ADD) + (2*datacounter)) = pBuffer[datacounter]; + } + + /* Write operation from DATA RAM0 to NAND address*/ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = Address.Block; /* NAND Flash block address*/ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESINT8_T) = (uint16_t)(Address.Page << 2); /* NAND Flash start page address */ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBUFFER) = OneNAND_DATA_RAM_0_0_REG;/* BufferRAM Sector Count (BSC) and BufferRAM Sector Address (BSA).*/ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_PROGRAM; /* Command */ + + /* Wait till the command is completed */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + + while((status & 0x8000) != 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + } + + /* Wait till the write interrupt is set */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + + while((status & 0x40) != 0x40) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + } + + /* Get the Controller Status */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + return (status); +} + +/** + * @brief Reads a block of data from the OneNAND memory using asynchronous mode. + * @param pBuffer: pointer to the buffer that receives the data read from the + * OneNAND memory. + * @param ReadAddr: OneNAND memory internal address to read from. + * @param NumHalfwordToRead: number of half-words to read. + * @retval None + */ +void OneNAND_AsynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead) +{ + uint16_t datatmp = 0x0, index = 0; + uint16_t status = 0; + + datatmp = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION); + + /* Set the asynchronous read mode */ + OneNAND_WRITE(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION, (datatmp& 0x7FFF)); + + /* Load data from the read address to the DATA RAM 1 setor 1 */ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = Address.Block; /* NAND Flash block address*/ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESINT8_T) = (uint16_t)(Address.Page << 2); + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBUFFER) = OneNAND_DATA_RAM_1_0_REG; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_LOAD; /* Command */ + + /* Wait till the command is completed */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + + while((status & 0x8000) != 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + } + + /* Read Controller status */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + /* Read data */ + for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /* While there is data to read */ + { + /* Read a Halfword from the memory */ + *pBuffer++ = *(__IO uint16_t *)((BANK1_ONENAND1_ADDR + OneNAND_DATA_RAM_1_0_ADD)+ 2*index); + index++; + } +} + +/** + * @brief Reads a block of data from the OneNAND memory using synchronous mode. + * @param pBuffer: pointer to the buffer that receives the data read from the + * OneNAND memory. + * @param ReadAddr: OneNAND memory internal address to read from. + * @param NumHalfwordToRead: number of half-words to read. + * @retval None + */ +void OneNAND_SynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead) +{ + uint16_t index = 0; + uint16_t status = 0; + + /* Set the asynchronous read mode */ + OneNAND_WRITE(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION, 0xB4C0); + + + /* Load data from the read address to the DATA RAM 1 setor 1 */ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = Address.Block; /* NAND Flash block address*/ + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESINT8_T) = (uint16_t)(Address.Page << 2); + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBUFFER) = OneNAND_DATA_RAM_1_0_REG; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000; + *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_LOAD; /* Command */ + + /* Wait till the command is completed */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + + while((status & 0x8000) != 0x8000) + { + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT); + } + + /* Read Controller status */ + status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS); + + /* Read data */ + for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /* While there is data to read */ + { + *pBuffer++ = *(__IO uint16_t *)((BANK1_ONENAND1_ADDR + OneNAND_DATA_RAM_1_0_ADD + 2*index)); + index++; + } +} + +/** + * @brief Reads the OneNAND memory Interrupt status. + * @param None + * @retval OneNAND memory Interrupt Status. + */ +uint16_t OneNAND_ReadStatus(void) +{ + __IO uint16_t status = 0x0; + + /* Read Status */ + return (status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT)); +} + +/** + * @brief Reads the OneNAND Controller status. + * @param None + * @retval OneNAND Controller Status. + */ +uint16_t OneNAND_ReadControllerStatus(void) +{ + __IO uint16_t status = 0x0; + + /* Read Controller Status */ + return (status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS)); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.h new file mode 100644 index 0000000..3e4340d --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_onenand.h @@ -0,0 +1,189 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_fsmc_onenand.h + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file contains all the functions prototypes for the + * stm32100e_eval_fsmc_onenand firmware driver. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32100E_EVAL_FSMC_ONENAND_H +#define __STM32100E_EVAL_FSMC_ONENAND_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL_FSMC_ONENAND + * @{ + */ + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Exported_Types + * @{ + */ +typedef struct +{ + uint16_t Manufacturer_ID; + uint16_t Device_ID; +}OneNAND_IDTypeDef; + +/* OneNand Status */ +typedef enum +{ + OneNAND_SUCCESS = 0, + OneNAND_ONGOING, + OneNAND_ERROR, + OneNAND_TIMEOUT +}OneNAND_Status; + +typedef struct +{ + uint16_t Block; + uint16_t Page; +} OneNAND_ADDRESS; +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Exported_Constants + * @{ + */ +/** + * @brief OneNAND memory command + */ +#define OneNAND_CMD_ERASE ((uint16_t)0x0094) +#define OneNAND_CMD_PROGRAM ((uint16_t)0x0080) +#define OneNAND_CMD_RESET ((uint16_t)0x00F0) +#define OneNAND_CMD_READ_ID ((uint16_t)0x0090) +#define OneNAND_CMD_UNLOCK ((uint16_t)0x0023) +#define OneNAND_CMD_LOAD ((uint16_t)0x0000) + +/** + * @brief OneNand Register description + */ +#define OneNAND_REG_MANUFACTERID ((uint32_t)0x1E000) /* Manufacturer identification */ +#define OneNAND_REG_DEVICEID ((uint32_t)0x1E002) /* Device identification */ +#define OneNAND_REG_DATABUFFERSIZE ((uint32_t)0x1E006) /* Data Buffer size */ +#define OneNAND_REG_BOOTBUFFERSIZE ((uint32_t)0x1E008) /* Boot Buffer size */ +#define OneNAND_REG_AMOUNTOFBUFFERS ((uint32_t)0x1E00A) /* Amount of data/boot buffers */ +#define OneNAND_REG_TECHNOLOGY ((uint32_t)0x1E00C) /* Info about technology */ +#define OneNAND_REG_STARTADDRESS1 ((uint32_t)0x1E200) /* Nand Flash Block Address */ +#define OneNAND_REG_STARTADDRESS3 ((uint32_t)0x1E204) /* Destination Block address for copy back program */ +#define OneNAND_REG_STARTADDRESS4 ((uint32_t)0x1E206) /* Destination Page & sector address for copy back program */ +#define OneNAND_REG_STARTADDRESINT8_T ((uint32_t)0x1E20E) /* Nand Flash Page & sector address */ +#define OneNAND_REG_STARTBUFFER ((uint32_t)0x1E400) /* The meaning is with which buffer to start and how many + buffers to use for the data transfer */ +#define OneNAND_REG_COMMAND ((uint32_t)0x1E440) /* Host control and memory operation commands*/ +#define OneNAND_REG_SYSTEMCONFIGURATION ((uint32_t)0x1E442) /* Memory and host interface configuration */ +#define OneNAND_REG_CONTROLSTATUS ((uint32_t)0x1E480) /* Control status and result of memory operation */ +#define OneNAND_REG_INTERRUPT ((uint32_t)0x1E482) /* Memory Command Completion Interrupt Status */ +#define OneNAND_REG_STARTBLOCKADDRESS ((uint32_t)0x1E498) /* Start memory block address in Write Protection mode */ +#define OneNAND_REG_WRITEPROTECTIONSTATUS ((uint32_t)0x1E49C) /* Current memory Write Protection status */ + +/** + * @brief OneNand Memory partition description + */ +#define OneNAND_DATA_RAM_0_0_ADD ((uint32_t)0x0400) /* DataRAM Main page0/sector0 */ +#define OneNAND_DATA_RAM_0_0_REG ((uint32_t)0x0800) /* DataRAM 0_0 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_0_1_ADD ((uint32_t)0x0600) /* DataRAM Main page0/sector1 */ +#define OneNAND_DATA_RAM_0_1_REG ((uint32_t)0x0900) /* DataRAM 0_1 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_0_2_ADD ((uint32_t)0x0800) /* DataRAM Main page0/sector2 */ +#define OneNAND_DATA_RAM_0_2_REG ((uint32_t)0x0A00) /* DataRAM 0_2 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_0_3_ADD ((uint32_t)0x0A00) /* DataRAM Main page0/sector3 */ +#define OneNAND_DATA_RAM_0_3_REG ((uint32_t)0x0B00) /* DataRAM 0_3 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_1_0_ADD ((uint32_t)0x0C00) /* DataRAM Main page1/sector0 */ +#define OneNAND_DATA_RAM_1_0_REG ((uint32_t)0x0C00) /* DataRAM 1_0 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_1_1_ADD ((uint32_t)0x0E00) /* DataRAM Main page1/sector1 */ +#define OneNAND_DATA_RAM_1_1_REG ((uint32_t)0x0D00) /* DataRAM 1_1 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_1_2_ADD ((uint32_t)0x1000) /* DataRAM Main page1/sector2 */ +#define OneNAND_DATA_RAM_1_2_REG ((uint32_t)0x0E00) /* DataRAM 1_2 is selected with 4 sector */ + +#define OneNAND_DATA_RAM_1_3_ADD ((uint32_t)0x1200) /* DataRAM Main page1/sector3 */ +#define OneNAND_DATA_RAM_1_3_REG ((uint32_t)0x0F00) /* DataRAM 1_3 is selected with 4 sector */ + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_ONENAND_Exported_Functions + * @{ + */ +void OneNAND_Init(void); +void OneNAND_Reset(void); +void OneNAND_ReadID(OneNAND_IDTypeDef* OneNAND_ID); +uint16_t OneNAND_UnlockBlock(uint32_t BlockNumber); +uint16_t OneNAND_EraseBlock(uint32_t BlockNumber); +uint16_t OneNAND_WriteBuffer(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToWrite); +void OneNAND_AsynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead); +void OneNAND_SynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead); +uint16_t OneNAND_ReadStatus(void); +uint16_t OneNAND_ReadControllerStatus(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32100E_EVAL_FSMC_ONENAND_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.c new file mode 100644 index 0000000..0111a5a --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.c @@ -0,0 +1,237 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_fsmc_sram.c + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file provides a set of functions needed to drive the + * IS61WV102416BLL SRAM memory mounted on STM32100E-EVAL board. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32100e_eval_fsmc_sram.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL_FSMC_SRAM + * @brief This file provides a set of functions needed to drive the + * IS61WV102416BLL SRAM memory mounted on STM32100E-EVAL board. + * @{ + */ + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Private_Types + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Private_Defines + * @{ + */ +/** + * @brief FSMC Bank 1 NOR/SRAM3 + */ +#define Bank1_SRAM3_ADDR ((uint32_t)0x68000000) +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Private_Macros + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Private_Variables + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Private_Function_Prototypes + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Private_Functions + * @{ + */ + +/** + * @brief Configures the FSMC and GPIOs to interface with the SRAM memory. + * This function must be called before any write/read operation + * on the SRAM. + * @param None + * @retval None + */ +void SRAM_Init(void) +{ + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; + GPIO_InitTypeDef GPIO_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE | + RCC_APB2Periph_GPIOF, ENABLE); + +/*-- GPIO Configuration ------------------------------------------------------*/ + /*!< SRAM Data lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | + GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + /*!< SRAM Address lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | + GPIO_Pin_14 | GPIO_Pin_15; + GPIO_Init(GPIOF, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /*!< NOE and NWE configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /*!< NE3 configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + /*!< NBL0, NBL1 configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; + GPIO_Init(GPIOE, &GPIO_InitStructure); + +/*-- FSMC Configuration ------------------------------------------------------*/ + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 3; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + /*!< Enable FSMC Bank1_SRAM Bank */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); +} + +/** + * @brief Writes a Half-word buffer to the FSMC SRAM memory. + * @param pBuffer : pointer to buffer. + * @param WriteAddr : SRAM memory internal address from which the data will be + * written. + * @param NumHalfwordToWrite : number of half-words to write. + * @retval None + */ +void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite) +{ + for(; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /*!< while there is data to write */ + { + /*!< Transfer data to the memory */ + *(uint16_t *) (Bank1_SRAM3_ADDR + WriteAddr) = *pBuffer++; + + /*!< Increment the address*/ + WriteAddr += 2; + } +} + +/** + * @brief Reads a block of data from the FSMC SRAM memory. + * @param pBuffer : pointer to the buffer that receives the data read from the + * SRAM memory. + * @param ReadAddr : SRAM memory internal address to read from. + * @param NumHalfwordToRead : number of half-words to read. + * @retval None + */ +void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead) +{ + for(; NumHalfwordToRead != 0; NumHalfwordToRead--) /*!< while there is data to read */ + { + /*!< Read a half-word from the memory */ + *pBuffer++ = *(__IO uint16_t*) (Bank1_SRAM3_ADDR + ReadAddr); + + /*!< Increment the address*/ + ReadAddr += 2; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.h new file mode 100644 index 0000000..117afd0 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_fsmc_sram.h @@ -0,0 +1,104 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_fsmc_sram.h + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file contains all the functions prototypes for the + * stm32100e_eval_fsmc_sram firmware driver. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32100E_EVAL_FSMC_SRAM_H +#define __STM32100E_EVAL_FSMC_SRAM_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL_FSMC_SRAM + * @{ + */ + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Exported_Types + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Exported_Constants + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_FSMC_SRAM_Exported_Functions + * @{ + */ + +void SRAM_Init(void); +void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite); +void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32100E_EVAL_FSMC_SRAM_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.c new file mode 100644 index 0000000..e45fc96 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.c @@ -0,0 +1,1405 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_ioe.c + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file includes the IO Expander driver for STMPE811 IO Expander + * devices. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + + /* File Info : --------------------------------------------------------------- + + Note: + ----- + - This driver uses the DMA method for sending and receiving data on I2C bus + which allow higher efficiency and reliability of the communication. + + SUPPORTED FEATURES: + - Touch Screen Features: Single point mode (Polling/Interrupt). + - TempSensor Feature: accuracy not determined (Polling). + - IO Read/write : Set/Reset and Read (Polling/Interrupt). + + UNSUPPORTED FEATURES: + - Row ADC Feature is not supported (not implemented on STM32100E-EVAL board) + - Joystick: config and Read (Polling/Interrupt) + ----------------------------------------------------------------------------*/ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32100e_eval_ioe.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @defgroup STM32100E_EVAL_IOE + * @brief This file includes the IO Expander driver for STMPE811 IO Expander + * devices. + * @{ + */ + +/** @defgroup STM32100E_EVAL_IOE_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_IOE_Private_Defines + * @{ + */ +#define TIMEOUT_MAX 0x1000 /*<! The value of the maximal timeout for I2C waiting loops */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_IOE_Private_Macros + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_IOE_Private_Variables + * @{ + */ +TS_STATE TS_State; /*<! The global structure holding the TS state */ + +uint32_t IOE_TimeOut = TIMEOUT_MAX; /*<! Value of Timeout when I2C communication fails */ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_IOE_Private_FunctionPrototypes + * @{ + */ +static uint16_t IOE_TS_Read_X(void); +static uint16_t IOE_TS_Read_Y(void); +static uint16_t IOE_TS_Read_Z(void); + +static void IOE_GPIO_Config(void); +static void IOE_I2C_Config(void); +static void IOE_DMA_Config(IOE_DMADirection_TypeDef Direction, uint8_t* buffer); +static void IOE_EXTI_Config(void); + +#ifndef USE_Delay +static void delay(__IO uint32_t nCount); +#endif /* USE_Delay*/ +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_IOE_Private_Functions + * @{ + */ + + +/** + * @brief Initializes and Configures the IO_Expanders Functionalities + * (Touch Screen ..) and configures all STM32100E-EVAL necessary + * hardware (GPIOs, APB clocks ..). + * @param None + * @retval IOE_OK if all initializations done correctly. Other value if error. + */ +uint8_t IOE_Config(void) +{ + /* Configure the needed pins */ + IOE_GPIO_Config(); + + /* Configure I2C peripheral */ + IOE_I2C_Config(); + + /* Read IO Expander 1 ID */ + if(IOE_IsOperational(IOE_1_ADDR)) + { + return IOE1_NOT_OPERATIONAL; + } + + /* Generate IOExpander Software reset */ + IOE_Reset(IOE_1_ADDR); + + /* ---------------------- IO Expander configuration --------------------- */ + /* Enable the GPIO, Touch Screen and ADC functionalities */ + IOE_FnctCmd(IOE_1_ADDR, IOE_TS_FCT | IOE_ADC_FCT | IOE_IO_FCT | IOE_TEMPSENS_FCT , ENABLE); + + /* Touch Screen controller configuration */ + IOE_TS_Config(); + + /* Temperature Sensor configuration */ + IOE_TempSens_Config(); + + /* ------------------------------------------------------------------------ */ + + /* Configuration is OK */ + return IOE_OK; +} + +/** + * @brief Configures The selected interrupts on the IO Expanders. + * @param IOE_ITSRC_Source: the source of the interrupts. Could be one or a + * combination of the following parameters: + * @arg IOE_ITSRC_TSC: Touch Screen interrupts. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_ITConfig(uint32_t IOE_ITSRC_Source) +{ + /* Configure the Interrupt output pin to generate low level (INT_CTRL) */ + IOE_ITOutConfig(Polarity_Low, Type_Level); + + /* Manage the Touch Screen Interrupts */ + if (IOE_ITSRC_Source & IOE_ITSRC_TSC) + { + /* Enable the Global interrupt */ + IOE_GITCmd(IOE_1_ADDR, ENABLE); + + /* Enable the Global GPIO Interrupt */ + IOE_GITConfig(IOE_1_ADDR, (uint8_t)(IOE_GIT_TOUCH | IOE_GIT_FTH | IOE_GIT_FOV), ENABLE); + + /* Read the GPIO_IT_STA to clear all pending bits if any */ + I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_GPIO_INT_STA); + } + + /* Configure the Interrupt line as EXTI source */ + IOE_EXTI_Config(); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Writes a bit value to an output IO pin. + * @param IO_Pin: The output pin to be set or reset. + * IO_Pin_x: Where x can be from 0 to 7. + * @param BitVal: The value to be set. This parameter can be one of the + * following values: BitSet or BitReset. See IOE_BitVal_TypeDef. + * @retval IOE_OK or PARAM_ERROR + */ +uint8_t IOE_WriteIOPin(uint8_t IO_Pin, IOE_BitValue_TypeDef BitVal) +{ + uint8_t DeviceAddr = 0; + + /* Get the IO expander Address according to which pin is to be controlled */ + if (IO_Pin & IO1_OUT_ALL_PINS) + { + DeviceAddr = IOE_1_ADDR; + } + else + { + return PARAM_ERROR; + } + + /* Apply the bit value to the selected pin */ + if (BitVal == BitReset) + { + /* Set the register */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_CLR_PIN, IO_Pin); + } + else + { + /* Set the register */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_SET_PIN, IO_Pin); + } + + return IOE_OK; +} + + +/** + * @brief Returns the status of the selected input IO pin. + * @param IO_Pin: The input pin to be read. + * IO_Pin_x: Where x can be from 0 to 7. + * @arg JOY_IO_PINS: Joystick IO pins (use IOE_JoyStickGetState for these pins) + * @retval None + */ +uint8_t IOE_ReadIOPin(uint32_t IO_Pin) +{ + uint8_t DeviceAddr = 0; + uint8_t tmp = 0; + if (IO_Pin & IO1_IN_ALL_PINS) + { + DeviceAddr = IOE_1_ADDR; + } + else + { + return PARAM_ERROR; + } + + /* Get all the Pins status */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_MP_STA); + if ((tmp & (uint8_t)IO_Pin) != 0) + { + return BitSet; + } + else + { + return BitReset; + } +} + + +/** + * @brief Returns Status and positions of the Touch screen. + * @param None + * @retval Pointer to TS_STATE structure holding Touch Screen information. + */ +TS_STATE* IOE_TS_GetState(void) +{ + uint32_t xDiff, yDiff , x , y; + static uint32_t _x = 0, _y = 0; + + /* Check if the Touch detect event happenned */ + TS_State.TouchDetected = (I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_TSC_CTRL) & 0x80); + if(TS_State.TouchDetected) + { + x = IOE_TS_Read_X(); + y = IOE_TS_Read_Y(); + xDiff = x > _x? (x - _x): (_x - x); + yDiff = y > _y? (y - _y): (_y - y); + if (xDiff + yDiff > 5) + { + _x = x; + _y = y; + } + } + /* Update the X position */ + TS_State.X = _x; + + /* Update the Y position */ + TS_State.Y = _y; + /* Update the Z Pression index */ + TS_State.Z = IOE_TS_Read_Z(); + + /* Clear the interrupt pending bit and enable the FIFO again */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_FIFO_STA, 0x01); + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_FIFO_STA, 0x00); + + /* Return pointer to the updated structure */ + return &TS_State; +} + +/** + * @brief Returns the temperature row value (in 16 bit format). + * @param None + * @retval The temperature row value. + */ +uint32_t IOE_TempSens_GetData(void) +{ + static __IO uint32_t tmp = 0; + + /* Aquire data enable */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TEMP_CTRL, 0x03); + + /* Enable the TEMPSENS module */ + tmp = (uint32_t)((I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_TEMP_DATA) & 0x03) << 8); + tmp |= (uint32_t)I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_TEMP_DATA + 1); + + tmp = (uint32_t)((33 * tmp * 100) / 751); + tmp = (uint32_t)((tmp + 5) / 10); + + /* return the temprature row value */ + return tmp; +} + +/** + * @brief Checks the selected Global interrupt source pending bit + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param Global_IT: the Global interrupt source to be checked, could be: + * @arg Global_IT_GPIO : All IOs interrupt + * @arg Global_IT_ADC : ADC interrupt + * @arg Global_IT_TEMP : Temperature Sensor interrupts + * @arg Global_IT_FE : Touch Screen Controller FIFO Error interrupt + * @arg Global_IT_FF : Touch Screen Controller FIFO Full interrupt + * @arg Global_IT_FOV : Touch Screen Controller FIFO Overrun interrupt + * @arg Global_IT_FTH : Touch Screen Controller FIFO Threshold interrupt + * @arg Global_IT_TOUCH : Touch Screen Controller Touch Detected interrupt + * @retval Status of the checked flag. Could be SET or RESET. + */ +FlagStatus IOE_GetGITStatus(uint8_t DeviceAddr, uint8_t Global_IT) +{ + __IO uint8_t tmp = 0; + + /* get the Interrupt status */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_INT_STA); + + if ((tmp & (uint8_t)Global_IT) != 0) + { + return SET; + } + else + { + return RESET; + } +} + +/** + * @brief Clears the selected Global interrupt pending bit(s) + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param Global_IT: the Global interrupt to be cleared, could be any combination + * of the following values: + * @arg Global_IT_GPIO : All IOs interrupt + * @arg Global_IT_ADC : ADC interrupt + * @arg Global_IT_TEMP : Temperature Sensor interrupts + * @arg Global_IT_FE : Touch Screen Controller FIFO Error interrupt + * @arg Global_IT_FF : Touch Screen Controller FIFO Full interrupt + * @arg Global_IT_FOV : Touch Screen Controller FIFO Overrun interrupt + * @arg Global_IT_FTH : Touch Screen Controller FIFO Threshold interrupt + * @arg Global_IT_TOUCH : Touch Screen Controller Touch Detected interrupt + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_ClearGITPending(uint8_t DeviceAddr, uint8_t Global_IT) +{ + /* Write 1 to the bits that have to be cleared */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_INT_STA, Global_IT); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Checks the status of the selected IO interrupt pending bit + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param IO_IT: the IO interrupt to be checked could be IO_ITx Where x can be + * from 0 to 7. + * @retval Status of the checked flag. Could be SET or RESET. + */ +FlagStatus IOE_GetIOITStatus(uint8_t DeviceAddr, uint8_t IO_IT) +{ + uint8_t tmp = 0; + + /* get the Interrupt status */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_INT_STA); + + if ((tmp & (uint8_t)IO_IT) != 0) + { + return SET; + } + else + { + return RESET; + } +} + +/** + * @brief Clears the selected IO interrupt pending bit(s). + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param IO_IT: the IO interrupt to be checked could be IO_ITx Where x can be + * from 0 to 7. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_ClearIOITPending(uint8_t DeviceAddr, uint8_t IO_IT) +{ + /* Write 1 to the bits that have to be cleared */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_INT_STA, IO_IT); + + /* Clear the Edge detection pending bit*/ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_ED, IO_IT); + + /* Clear the Rising edge pending bit */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_RE, IO_IT); + + /* Clear the Falling edge pending bit */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_FE, IO_IT); + + return IOE_OK; + +} +/** + * @brief Checks if the selected device is correctly configured and + * communicates correctly ont the I2C bus. + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @retval IOE_OK if IOE is operational. Other value if failure. + */ +uint8_t IOE_IsOperational(uint8_t DeviceAddr) +{ + /* Return Error if the ID is not correct */ + if( IOE_ReadID(DeviceAddr) != (uint16_t)STMPE811_ID ) + { + /* Check if a Timeout occured */ + if (IOE_TimeOut == 0) + { + return(IOE_TimeoutUserCallback()); + } + else + { + return IOE_FAILURE; /* ID is not Correct */ + } + } + else + { + return IOE_OK; /* ID is correct */ + } +} + +/** + * @brief Resets the IO Expander by Software (SYS_CTRL1, RESET bit). + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_Reset(uint8_t DeviceAddr) +{ + /* Power Down the IO_Expander */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_SYS_CTRL1, 0x02); + + /* wait for a delay to insure registers erasing */ + _delay_(2); + + /* Power On the Codec after the power off => all registers are reinitialized*/ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_SYS_CTRL1, 0x00); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Reads the selected device's ID. + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @retval The Device ID (two bytes). + */ +uint16_t IOE_ReadID(uint8_t DeviceAddr) +{ + uint16_t tmp = 0; + + /* Read device ID */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, 0); + tmp = (uint32_t)(tmp << 8); + tmp |= (uint32_t)I2C_ReadDeviceRegister(DeviceAddr, 1); + + /* Return the ID */ + return (uint16_t)tmp; +} + +/** + * @brief Configures the selcted IO Expander functionalities. + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param Fct: the functions to be configured. could be any + * combination of the following values: + * @arg IOE_IO_FCT : IO function + * @arg IOE_TS_FCT : Touch Screen function + * @arg IOE_ADC_FCT : ADC function + * @arg IOE_TEMPSENS_FCT : Tempreature Sensor function + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_FnctCmd(uint8_t DeviceAddr, uint8_t Fct, FunctionalState NewState) +{ + uint8_t tmp = 0; + + /* Get the register value */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_SYS_CTRL2); + + if (NewState != DISABLE) + { + /* Set the Functionalities to be Enabled */ + tmp &= ~(uint8_t)Fct; + } + else + { + /* Set the Functionalities to be Disabled */ + tmp |= (uint8_t)Fct; + } + + /* Set the register value */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_SYS_CTRL2, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Configures the selected pin direction (to be an input or an output) + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param IO_Pin: IO_Pin_x: Where x can be from 0 to 7. + * @param Direction: could be Direction_IN or Direction_OUT. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_IOPinConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Direction) +{ + uint8_t tmp = 0; + + /* Get all the Pins direction */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_DIR); + + if (Direction != Direction_IN) + { + tmp |= (uint8_t)IO_Pin; + } + else + { + tmp &= ~(uint8_t)IO_Pin; + } + + /* Write the register new value */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_DIR, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Enables or disables the Global interrupt. + * @param DeviceAddr: The address of the IOExpander, could be :I OE_1_ADDR. + * @param NewState: could be ENABLE or DISABLE. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_GITCmd(uint8_t DeviceAddr, FunctionalState NewState) +{ + uint8_t tmp = 0; + + /* Read the Interrupt Control register */ + I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_INT_CTRL); + + if (NewState != DISABLE) + { + /* Set the global interrupts to be Enabled */ + tmp |= (uint8_t)IOE_GIT_EN; + } + else + { + /* Set the global interrupts to be Disabled */ + tmp &= ~(uint8_t)IOE_GIT_EN; + } + + /* Write Back the Interrupt Control register */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_INT_CTRL, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Configures the selected source to generate or not a global interrupt + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR + * @param Global_IT: the interrupt source to be configured, could be: + * @arg Global_IT_GPIO : All IOs interrupt + * @arg Global_IT_ADC : ADC interrupt + * @arg Global_IT_TEMP : Temperature Sensor interrupts + * @arg Global_IT_FE : Touch Screen Controller FIFO Error interrupt + * @arg Global_IT_FF : Touch Screen Controller FIFO Full interrupt + * @arg Global_IT_FOV : Touch Screen Controller FIFO Overrun interrupt + * @arg Global_IT_FTH : Touch Screen Controller FIFO Threshold interrupt + * @arg Global_IT_TOUCH : Touch Screen Controller Touch Detected interrupt + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_GITConfig(uint8_t DeviceAddr, uint8_t Global_IT, FunctionalState NewState) +{ + uint8_t tmp = 0; + + /* Get the current value of the INT_EN register */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_INT_EN); + + if (NewState != DISABLE) + { + /* Set the interrupts to be Enabled */ + tmp |= (uint8_t)Global_IT; + } + else + { + /* Set the interrupts to be Disabled */ + tmp &= ~(uint8_t)Global_IT; + } + /* Set the register */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_INT_EN, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Configures the selected pins to generate an interrupt or not. + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param IO_IT: The IO interrupt to be configured. This parameter could be any + * combination of the following values: + * @arg IO_IT_x: where x can be from 0 to 7. + * @param NewState: could be ENABLE or DISABLE. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_IOITConfig(uint8_t DeviceAddr, uint8_t IO_IT, FunctionalState NewState) +{ + uint8_t tmp = 0; + + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_INT_EN); + + if (NewState != DISABLE) + { + /* Set the interrupts to be Enabled */ + tmp |= (uint8_t)IO_IT; + } + else + { + /* Set the interrupts to be Disabled */ + tmp &= ~(uint8_t)IO_IT; + } + + /* Set the register */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_INT_EN, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Configures the touch Screen Controller (Single point detection) + * @param None + * @retval IOE_OK if all initializations are OK. Other value if error. + */ +uint8_t IOE_TS_Config(void) +{ + uint8_t tmp = 0; + + /* Enable TSC Fct: already done in IOE_Config */ + tmp = I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_SYS_CTRL2); + tmp &= ~(uint32_t)(IOE_TS_FCT | IOE_ADC_FCT); + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_SYS_CTRL2, tmp); + + /* Enable the TSC gloabl interrupts */ + tmp = I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_INT_EN); + tmp |= (uint32_t)(IOE_GIT_TOUCH | IOE_GIT_FTH | IOE_GIT_FOV); + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_INT_EN, tmp); + + /* Select Sample Time, bit number and ADC Reference */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_ADC_CTRL1, 0x49); + + /* Wait for ~20 ms */ + _delay_(2); + + /* Select the ADC clock speed: 3.25 MHz */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_ADC_CTRL2, 0x01); + + /* Select TSC pins in non default mode */ + tmp = I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_GPIO_AF); + tmp &= ~(uint8_t)TOUCH_IO_ALL; + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_GPIO_AF, tmp); + + /* Select 2 nF filter capacitor */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TSC_CFG, 0x9A); + + /* Select single point reading */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_FIFO_TH, 0x01); + + /* Write 0x01 to clear the FIFO memory content. */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_FIFO_STA, 0x01); + + /* Write 0x00 to put the FIFO back into operation mode */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_FIFO_STA, 0x00); + + /* set the data format for Z value: 7 fractional part and 1 whole part */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TSC_FRACT_XYZ, 0x01); + + /* set the driving capability of the device for TSC pins: 50mA */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TSC_I_DRIVE, 0x01); + + /* Use no tracking index, touchscreen controller operation mode (XYZ) and + enable the TSC */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TSC_CTRL, 0x01); + + /* Clear all the status pending bits */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_INT_STA, 0xFF); + + /* Initialize the TS structure to their default values */ + TS_State.TouchDetected = TS_State.X = TS_State.Y = TS_State.Z = 0; + + /* All configuration done */ + return IOE_OK; +} + +/** + * @brief Configures and enables the Temperature sensor module. + * @param None + * @retval IOE_OK if all initializations are OK. Other value if error. + */ +uint8_t IOE_TempSens_Config(void) +{ + __IO uint8_t tmp = 0; + + /* Enable Temperature Sensor Fct: already done in IOE_Config */ + tmp = I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_SYS_CTRL2); + tmp &= ~(uint32_t)(IOE_TEMPSENS_FCT | IOE_ADC_FCT); + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_SYS_CTRL2, tmp); + + /* Enable the TEMPSENS module */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TEMP_CTRL, 0x01); + + /* Aquire data enable */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_TEMP_CTRL, 0x3); + + /* All configuration done */ + return IOE_OK; +} + +/** + * @brief Configures the selected pin to be in Alternate function or not + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param IO_Pin: IO_Pin_x, Where x can be from 0 to 7. + * @param NewState: State of the AF for the selected pin, could be + * ENABLE or DISABLE. + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_IOAFConfig(uint8_t DeviceAddr, uint8_t IO_Pin, FunctionalState NewState) +{ + uint8_t tmp = 0; + + /* Get the current state of the GPIO_AF register */ + tmp = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_AF); + + if (NewState != DISABLE) + { + /* Enable the selected pins alternate function */ + tmp |= (uint8_t)IO_Pin; + } + else + { + /* Disable the selected pins alternate function */ + tmp &= ~(uint8_t)IO_Pin; + } + + /* Write back the new valu in GPIO_AF register */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_AF, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Configures the Edge for which a transition is detectable for the + * the selected pin. + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param IO_Pin: IO_Pin_x, Where x can be from 0 to 7. + * @param Edge: The edge which will be detected. This parameter can be one or a + * a combination of follwing values: EDGE_FALLING and EDGE_RISING . + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_IOEdgeConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Edge) +{ + uint8_t tmp1 = 0, tmp2 = 0; + + /* Get the registers values */ + tmp1 = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_FE); + tmp2 = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_RE); + + /* Disable the Falling Edge */ + tmp1 &= ~(uint8_t)IO_Pin; + /* Disable the Falling Edge */ + tmp2 &= ~(uint8_t)IO_Pin; + + /* Enable the Falling edge if selected */ + if (Edge & EDGE_FALLING) + { + tmp1 |= (uint8_t)IO_Pin; + } + + /* Enable the Rising edge if selected */ + if (Edge & EDGE_RISING) + { + tmp2 |= (uint8_t)IO_Pin; + } + + /* Write back the registers values */ + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_FE, tmp1); + I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_RE, tmp2); + + /* if OK return 0 */ + return IOE_OK; +} + +/** + * @brief Configures the Interrupt line active state and format (level/edge) + * @param Polarity: could be + * @arg Polarity_Low: Interrupt line is active Low/Falling edge + * @arg Polarity_High: Interrupt line is active High/Rising edge + * @param Type: Interrupt line activity type, could be one of the following values + * @arg Type_Level: Interrupt line is active in level model + * @arg Type_Edge: Interrupt line is active in edge model + * @retval IOE_OK: if all initializations are OK. Other value if error. + */ +uint8_t IOE_ITOutConfig(uint8_t Polarity, uint8_t Type) +{ + uint8_t tmp = 0; + + /* Get the register IOE_REG_INT_CTRL value */ + tmp = I2C_ReadDeviceRegister(IOE_1_ADDR, IOE_REG_INT_CTRL); + + /* Mask the polarity and type bits */ + tmp &= ~(uint8_t)0x06; + + /* Modify the Interrupt Output line configuration */ + tmp |= (uint8_t)(Polarity | Type); + + /* Set the register */ + I2C_WriteDeviceRegister(IOE_1_ADDR, IOE_REG_INT_CTRL, tmp); + + /* If all OK return IOE_OK */ + return IOE_OK; +} + +/** + * @brief Writes a value in a register of the device through I2C. + * @param DeviceAddr: The address of the IOExpander, could be : IOE_1_ADDR. + * @param RegisterAddr: The target register adress + * @param RegisterValue: The target register value to be written + * @retval IOE_OK: if all operations are OK. Other value if error. + */ +uint8_t I2C_WriteDeviceRegister(uint8_t DeviceAddr, uint8_t RegisterAddr, uint8_t RegisterValue) +{ + uint32_t read_verif = 0; + uint8_t IOE_BufferTX = 0; + + /* Get Value to be written */ + IOE_BufferTX = RegisterValue; + + /* Configure DMA Peripheral */ + IOE_DMA_Config(IOE_DMA_TX, (uint8_t*)(&IOE_BufferTX)); + + /* Enable the I2C peripheral */ + I2C_GenerateSTART(IOE_I2C, ENABLE); + + /* Test on SB Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_SB) == RESET) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Transmit the slave address and enable writing operation */ + I2C_Send7bitAddress(IOE_I2C, DeviceAddr, I2C_Direction_Transmitter); + + /* Test on ADDR Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_CheckEvent(IOE_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Transmit the first address for r/w operations */ + I2C_SendData(IOE_I2C, RegisterAddr); + + /* Test on TXE FLag (data dent) */ + IOE_TimeOut = TIMEOUT_MAX; + while ((!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_BTF))) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Enable I2C DMA request */ + I2C_DMACmd(IOE_I2C,ENABLE); + + /* Enable DMA TX Channel */ + DMA_Cmd(IOE_DMA_TX_CHANNEL, ENABLE); + + /* Wait until DMA Transfer Complete */ + IOE_TimeOut = TIMEOUT_MAX; + while (!DMA_GetFlagStatus(IOE_DMA_TX_TCFLAG)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Wait until BTF Flag is set before generating STOP */ + IOE_TimeOut = 2 * TIMEOUT_MAX; + while ((!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_BTF))) + { + } + + /* Send STOP Condition */ + I2C_GenerateSTOP(IOE_I2C, ENABLE); + + /* Disable DMA TX Channel */ + DMA_Cmd(IOE_DMA_TX_CHANNEL, DISABLE); + + /* Disable I2C DMA request */ + I2C_DMACmd(IOE_I2C,DISABLE); + + /* Clear DMA TX Transfer Complete Flag */ + DMA_ClearFlag(IOE_DMA_TX_TCFLAG); + +#ifdef VERIFY_WRITTENDATA + /* Verify (if needed) that the loaded data is correct */ + + /* Read the just written register*/ + read_verif = I2C_ReadDeviceRegister(DeviceAddr, RegisterAddr); + /* Load the register and verify its value */ + if (read_verif != RegisterValue) + { + /* Control data wrongly tranfered */ + read_verif = IOE_FAILURE; + } + else + { + /* Control data correctly transfered */ + read_verif = 0; + } +#endif + + /* Return the verifying value: 0 (Passed) or 1 (Failed) */ + return read_verif; +} + +/** + * @brief Reads a register of the device through I2C. + * @param DeviceAddr: The address of the device, could be : IOE_1_ADDR. + * @param RegisterAddr: The target register adress (between 00x and 0x24) + * @retval The value of the read register (0xAA if Timout occured) + */ +uint8_t I2C_ReadDeviceRegister(uint8_t DeviceAddr, uint8_t RegisterAddr) +{ + uint8_t IOE_BufferRX[2] = {0x00, 0x00}; + + /* Configure DMA Peripheral */ + IOE_DMA_Config(IOE_DMA_RX, (uint8_t*)IOE_BufferRX); + + /* Enable DMA NACK automatic generation */ + I2C_DMALastTransferCmd(IOE_I2C, ENABLE); + + /* Enable the I2C peripheral */ + I2C_GenerateSTART(IOE_I2C, ENABLE); + + /* Test on SB Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_SB)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send device address for write */ + I2C_Send7bitAddress(IOE_I2C, DeviceAddr, I2C_Direction_Transmitter); + + /* Test on ADDR Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_CheckEvent(IOE_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send the device's internal address to write to */ + I2C_SendData(IOE_I2C, RegisterAddr); + + /* Test on TXE FLag (data dent) */ + IOE_TimeOut = TIMEOUT_MAX; + while ((!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_BTF))) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send START condition a second time */ + I2C_GenerateSTART(IOE_I2C, ENABLE); + + /* Test on SB Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_SB)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send IOExpander address for read */ + I2C_Send7bitAddress(IOE_I2C, DeviceAddr, I2C_Direction_Receiver); + + /* Test on ADDR Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_CheckEvent(IOE_I2C, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Enable I2C DMA request */ + I2C_DMACmd(IOE_I2C,ENABLE); + + /* Enable DMA RX Channel */ + DMA_Cmd(IOE_DMA_RX_CHANNEL, ENABLE); + + /* Wait until DMA Transfer Complete */ + IOE_TimeOut = 2 * TIMEOUT_MAX; + while (!DMA_GetFlagStatus(IOE_DMA_RX_TCFLAG)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send STOP Condition */ + I2C_GenerateSTOP(IOE_I2C, ENABLE); + + /* Disable DMA RX Channel */ + DMA_Cmd(IOE_DMA_RX_CHANNEL, DISABLE); + + /* Disable I2C DMA request */ + I2C_DMACmd(IOE_I2C,DISABLE); + + /* Clear DMA RX Transfer Complete Flag */ + DMA_ClearFlag(IOE_DMA_RX_TCFLAG); + + /* return a pointer to the IOE_Buffer */ + return (uint8_t)IOE_BufferRX[0]; +} + + +/** + * @brief Reads a buffer of 2 bytes from the device registers. + * @param DeviceAddr: The address of the device, could be : IOE_1_ADDR. + * @param RegisterAddr: The target register adress (between 00x and 0x24) + * @retval A pointer to the buffer containing the two returned bytes (in halfword). + */ +uint16_t I2C_ReadDataBuffer(uint8_t DeviceAddr, uint32_t RegisterAddr) +{ + uint8_t tmp= 0; + uint8_t IOE_BufferRX[2] = {0x00, 0x00}; + + /* Configure DMA Peripheral */ + IOE_DMA_Config(IOE_DMA_RX, (uint8_t*)IOE_BufferRX); + + /* Enable DMA NACK automatic generation */ + I2C_DMALastTransferCmd(IOE_I2C, ENABLE); + + /* Enable the I2C peripheral */ + I2C_GenerateSTART(IOE_I2C, ENABLE); + + /* Test on SB Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_SB)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send device address for write */ + I2C_Send7bitAddress(IOE_I2C, DeviceAddr, I2C_Direction_Transmitter); + + /* Test on ADDR Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_CheckEvent(IOE_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send the device's internal address to write to */ + I2C_SendData(IOE_I2C, RegisterAddr); + + /* Test on TXE FLag (data dent) */ + IOE_TimeOut = TIMEOUT_MAX; + while ((!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_BTF))) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send START condition a second time */ + I2C_GenerateSTART(IOE_I2C, ENABLE); + + /* Test on SB Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_GetFlagStatus(IOE_I2C,I2C_FLAG_SB)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send IOExpander address for read */ + I2C_Send7bitAddress(IOE_I2C, DeviceAddr, I2C_Direction_Receiver); + + /* Test on ADDR Flag */ + IOE_TimeOut = TIMEOUT_MAX; + while (!I2C_CheckEvent(IOE_I2C, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Enable I2C DMA request */ + I2C_DMACmd(IOE_I2C,ENABLE); + + /* Enable DMA RX Channel */ + DMA_Cmd(IOE_DMA_RX_CHANNEL, ENABLE); + + /* Wait until DMA Transfer Complete */ + IOE_TimeOut = 2 * TIMEOUT_MAX; + while (!DMA_GetFlagStatus(IOE_DMA_RX_TCFLAG)) + { + if (IOE_TimeOut-- == 0) return(IOE_TimeoutUserCallback()); + } + + /* Send STOP Condition */ + I2C_GenerateSTOP(IOE_I2C, ENABLE); + + /* Disable DMA RX Channel */ + DMA_Cmd(IOE_DMA_RX_CHANNEL, DISABLE); + + /* Disable I2C DMA request */ + I2C_DMACmd(IOE_I2C,DISABLE); + + /* Clear DMA RX Transfer Complete Flag */ + DMA_ClearFlag(IOE_DMA_RX_TCFLAG); + + /* Reorganize received data */ + tmp = IOE_BufferRX[0]; + IOE_BufferRX[0] = IOE_BufferRX[1]; + IOE_BufferRX[1] = tmp; + + /* return a pointer to the IOE_Buffer */ + return *(uint16_t *)IOE_BufferRX; +} + +/** + * @brief Return Touch Screen X position value + * @param None + * @retval X position. + */ +static uint16_t IOE_TS_Read_X(void) +{ + int32_t x, xr; + + x = I2C_ReadDataBuffer(IOE_1_ADDR, IOE_REG_TSC_DATA_Y); + + /* first correction */ + xr = (x * 320) >> 12; + /* second correction */ + xr = ((xr * 32)/29) - 17; + + if(xr <= 0) + xr = 0; + + return (uint16_t)(xr); +} + +/** + * @brief Return Touch Screen Y position value + * @param None + * @retval Y position. + */ +static uint16_t IOE_TS_Read_Y(void) +{ + int32_t y, yr; + y= I2C_ReadDataBuffer(IOE_1_ADDR, IOE_REG_TSC_DATA_X); + + yr= (y * 240) >> 12; + yr = ((yr * 240) / 217) - 12; + + if(yr <= 0) + yr = 0; + + return (uint16_t)(yr); +} + +/** + * @brief Return Touch Screen Z position value + * @param None + * @retval Z position. + */ +static uint16_t IOE_TS_Read_Z(void) +{ + uint32_t z; + z = I2C_ReadDataBuffer(IOE_1_ADDR, IOE_REG_TSC_DATA_Z); + + + if(z <= 0) + z = 0; + + return (uint16_t)(z); +} + +/** + * @brief Initializes the GPIO pins used by the IO expander. + * @param None + * @retval None + */ +static void IOE_GPIO_Config(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable IOE_I2C and IOE_I2C_PORT & Alternate Function clocks */ + RCC_APB1PeriphClockCmd(IOE_I2C_CLK, ENABLE); + RCC_APB2PeriphClockCmd(IOE_I2C_SCL_GPIO_CLK | IOE_I2C_SDA_GPIO_CLK | IOE_IT_GPIO_CLK + | RCC_APB2Periph_AFIO, ENABLE); + + /* Reset IOE_I2C IP */ + RCC_APB1PeriphResetCmd(IOE_I2C_CLK, ENABLE); + + /* Release reset signal of IOE_I2C IP */ + RCC_APB1PeriphResetCmd(IOE_I2C_CLK, DISABLE); + + /* IOE_I2C SCL and SDA pins configuration */ + GPIO_InitStructure.GPIO_Pin = IOE_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; + GPIO_Init(IOE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /* IOE_I2C SCL and SDA pins configuration */ + GPIO_InitStructure.GPIO_Pin = IOE_I2C_SDA_PIN; + GPIO_Init(IOE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /* Set EXTI pin as Input PullUp - IO_Expander_INT */ + GPIO_InitStructure.GPIO_Pin = IOE_IT_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(IOE_IT_GPIO_PORT, &GPIO_InitStructure); + + /* Connect IO Expander IT line to EXTI line */ + GPIO_EXTILineConfig(IOE_IT_EXTI_PORT_SOURCE, IOE_IT_EXTI_PIN_SOURCE); +} + + +/** + * @brief Configure the I2C Peripheral used to communicate with IO_Expanders. + * @param None + * @retval None + */ +static void IOE_I2C_Config(void) +{ + I2C_InitTypeDef I2C_InitStructure; + + /* IOE_I2C configuration */ + I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; + I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2; + I2C_InitStructure.I2C_OwnAddress1 = 0x00; + I2C_InitStructure.I2C_Ack = I2C_Ack_Enable; + I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; + I2C_InitStructure.I2C_ClockSpeed = IOE_I2C_SPEED; + + I2C_Init(IOE_I2C, &I2C_InitStructure); +} + + +/** + * @brief Configure the DMA Peripheral used to handle communication via I2C. + * @param None + * @retval None + */ + +static void IOE_DMA_Config(IOE_DMADirection_TypeDef Direction, uint8_t* buffer) +{ + DMA_InitTypeDef DMA_InitStructure; + + RCC_AHBPeriphClockCmd(IOE_DMA_CLK, ENABLE); + + /* Initialize the DMA_PeripheralBaseAddr member */ + DMA_InitStructure.DMA_PeripheralBaseAddr = IOE_I2C_DR; + /* Initialize the DMA_MemoryBaseAddr member */ + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)buffer; + /* Initialize the DMA_PeripheralInc member */ + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + /* Initialize the DMA_MemoryInc member */ + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + /* Initialize the DMA_PeripheralDataSize member */ + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; + /* Initialize the DMA_MemoryDataSize member */ + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + /* Initialize the DMA_Mode member */ + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + /* Initialize the DMA_Priority member */ + DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; + /* Initialize the DMA_M2M member */ + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + + /* If using DMA for Reception */ + if (Direction == IOE_DMA_RX) + { + /* Initialize the DMA_DIR member */ + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; + + /* Initialize the DMA_BufferSize member */ + DMA_InitStructure.DMA_BufferSize = 2; + + DMA_DeInit(IOE_DMA_RX_CHANNEL); + + DMA_Init(IOE_DMA_RX_CHANNEL, &DMA_InitStructure); + } + /* If using DMA for Transmission */ + else if (Direction == IOE_DMA_TX) + { + /* Initialize the DMA_DIR member */ + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + + /* Initialize the DMA_BufferSize member */ + DMA_InitStructure.DMA_BufferSize = 1; + + DMA_DeInit(IOE_DMA_TX_CHANNEL); + + DMA_Init(IOE_DMA_TX_CHANNEL, &DMA_InitStructure); + } +} + +/** + * @brief Configures the IO expander Interrupt line and GPIO in EXTI mode. + * @param None + * @retval None + */ +static void IOE_EXTI_Config(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + EXTI_InitTypeDef EXTI_InitStructure; + + /* Enable Button GPIO clock */ + RCC_APB2PeriphClockCmd(IOE_IT_GPIO_CLK | RCC_APB2Periph_AFIO, ENABLE); + + /* Configure Button pin as input floating */ + GPIO_InitStructure.GPIO_Pin = IOE_IT_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(IOE_IT_GPIO_PORT, &GPIO_InitStructure); + + /* Connect Button EXTI Line to Button GPIO Pin */ + GPIO_EXTILineConfig(IOE_IT_EXTI_PORT_SOURCE, IOE_IT_EXTI_PIN_SOURCE); + + /* Configure Button EXTI line */ + EXTI_InitStructure.EXTI_Line = IOE_IT_EXTI_LINE; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling; + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); + + /* Enable and set Button EXTI Interrupt to the lowest priority */ + NVIC_InitStructure.NVIC_IRQChannel = IOE_IT_EXTI_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +} + +#ifndef USE_Delay +/** + * @brief Inserts a delay time. + * @param nCount: specifies the delay time length. + * @retval None + */ +static void delay(__IO uint32_t nCount) +{ + __IO uint32_t index = 0; + for(index = (100000 * nCount); index != 0; index--) + { + } +} +#endif /* USE_Delay*/ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.h new file mode 100644 index 0000000..76adb3b --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_ioe.h @@ -0,0 +1,491 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_ioe.h + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file contains all the functions prototypes for the IO Expander + * firmware driver. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + + /* File Info : --------------------------------------------------------------- + SUPPORTED FEATURES: + - Touch Screen Features: Single point mode (Polling/Interrupt). + - TempSensor Feature: accuracy not determined (Polling). + - IO Read/write : Set/Reset and Read (Polling/Interrupt). + + UNSUPPORTED FEATURES: + - Row ADC Feature is not supported (not implemented on STM32100E-EVAL board) + - Joystick: config and Read (Polling/Interrupt) +----------------------------------------------------------------------------*/ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32100E_EVAL_IOE_H +#define __STM32100E_EVAL_IOE_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @defgroup STM32100E_EVAL_IOE + * @{ + */ + +/** @defgroup STM32100E_EVAL_IOE_Exported_Types + * @{ + */ + +/** + * @brief Touch Screen Information structure + */ +typedef struct +{ + uint16_t TouchDetected; + uint16_t X; + uint16_t Y; + uint16_t Z; +}TS_STATE; + + +/** + * @brief IO_Expander Error codes + */ +typedef enum +{ + IOE_OK = 0, + IOE_FAILURE, + IOE_TIMEOUT, + PARAM_ERROR, + IOE1_NOT_OPERATIONAL +}IOE_Status_TypDef; + +/** + * @brief IO bit values + */ +typedef enum +{ + BitReset = 0, + BitSet = 1 +}IOE_BitValue_TypeDef; + +/** + * @brief IOE DMA Direction + */ +typedef enum +{ + IOE_DMA_TX = 0, + IOE_DMA_RX = 1 +}IOE_DMADirection_TypeDef; + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_IOE_Exported_Constants + * @{ + */ + +/** + * @brief Uncomment the line below to enable verfying each written byte in write + * operation. The I2C_WriteDeviceRegister() function will then compare the + * written and read data and return error status if a mismatch occurs. + */ +/* #define VERIFY_WRITTENDATA */ + +/** + * @brief Uncomment the line below if you want to use user defined Delay function + * (for precise timing), otherwise default _delay_ function defined within + * this driver is used (less precise timing). + */ +/* #define USE_Delay */ + +/** + * @brief Uncomment the line below if you want to use user timeout callback. + * Function prototypes is declared in this file but function body may be + * implemented into user application. + */ +/* #define USE_TIMEOUT_USER_CALLBACK */ + +#ifdef USE_Delay +#include "main.h" + + #define _delay_ Delay /* !< User can provide more timing precise _delay_ function + (with 10ms time base), using SysTick for example */ +#else + #define _delay_ delay /* !< Default _delay_ function with less precise timing */ +#endif + +/*------------------------------------------------------------------------------ + Hardware Configuration +------------------------------------------------------------------------------*/ +/** + * @brief I2C port definitions + */ +#define IOE_I2C I2C2 +#define IOE_I2C_CLK RCC_APB1Periph_I2C2 +#define IOE_I2C_SCL_PIN GPIO_Pin_10 +#define IOE_I2C_SCL_GPIO_PORT GPIOB +#define IOE_I2C_SCL_GPIO_CLK RCC_APB2Periph_GPIOB +#define IOE_I2C_SDA_PIN GPIO_Pin_11 +#define IOE_I2C_SDA_GPIO_PORT GPIOB +#define IOE_I2C_SDA_GPIO_CLK RCC_APB2Periph_GPIOB +#define IOE_I2C_DR ((uint32_t)0x40005810) +#define IOE_I2C_SPEED 300000 + +/** + * @brief IOE DMA definitions + */ +#define IOE_DMA DMA1 +#define IOE_DMA_CLK RCC_AHBPeriph_DMA1 +#define IOE_DMA_TX_CHANNEL DMA1_Channel4 +#define IOE_DMA_RX_CHANNEL DMA1_Channel5 +#define IOE_DMA_TX_TCFLAG DMA1_FLAG_TC4 +#define IOE_DMA_RX_TCFLAG DMA1_FLAG_TC5 + + +/** + * @brief IO Expander Interrupt line on EXTI + */ +#define IOE_IT_PIN GPIO_Pin_12 +#define IOE_IT_GPIO_PORT GPIOA +#define IOE_IT_GPIO_CLK RCC_APB2Periph_GPIOA +#define IOE_IT_EXTI_PORT_SOURCE GPIO_PortSourceGPIOA +#define IOE_IT_EXTI_PIN_SOURCE GPIO_PinSource12 +#define IOE_IT_EXTI_LINE EXTI_Line12 +#define IOE_IT_EXTI_IRQn EXTI15_10_IRQn + + +/** + * @brief The 7 bits IO Expanders adresses and chip IDs + */ +#define IOE_1_ADDR 0x82 +#define STMPE811_ID 0x0811 + + +/*------------------------------------------------------------------------------ + Functional and Interrupt Management +------------------------------------------------------------------------------*/ +/** + * @brief IO Expander Functionalities definitions + */ +#define IOE_ADC_FCT 0x01 +#define IOE_TS_FCT 0x02 +#define IOE_IO_FCT 0x04 +#define IOE_TEMPSENS_FCT 0x08 + +/** + * @brief Interrupt source configuration definitons + */ +#define IOE_ITSRC_TSC 0x01 /* IO_Exapnder 1 */ +#define IOE_ITSRC_TEMPSENS 0x08 /* IO_Exapnder 1 */ + +/** + * @brief Glaobal Interrupts definitions + */ +#define IOE_GIT_GPIO 0x80 +#define IOE_GIT_ADC 0x40 +#define IOE_GIT_TEMP 0x20 +#define IOE_GIT_FE 0x10 +#define IOE_GIT_FF 0x08 +#define IOE_GIT_FOV 0x04 +#define IOE_GIT_FTH 0x02 +#define IOE_GIT_TOUCH 0x01 + +/** + * @brief IO Exapanders Pins definition + */ +#define IO1_IN_ALL_PINS (uint32_t)(IO_Pin_ALL) +#define IO1_OUT_ALL_PINS (uint32_t)(IO_Pin_ALL) + + +/*------------------------------------------------------------------------------ + STMPE811 device register definition +------------------------------------------------------------------------------*/ +/** + * @brief Identification registers + */ +#define IOE_REG_CHP_ID 0x00 +#define IOE_REG_ID_VER 0x02 + +/** + * @brief General Control Registers + */ +#define IOE_REG_SYS_CTRL1 0x03 +#define IOE_REG_SYS_CTRL2 0x04 +#define IOE_REG_SPI_CFG 0x08 + +/** + * @brief Interrupt Control register + */ +#define IOE_REG_INT_CTRL 0x09 +#define IOE_REG_INT_EN 0x0A +#define IOE_REG_INT_STA 0x0B +#define IOE_REG_GPIO_INT_EN 0x0C +#define IOE_REG_GPIO_INT_STA 0x0D + +/** + * @brief GPIO Registers + */ +#define IOE_REG_GPIO_SET_PIN 0x10 +#define IOE_REG_GPIO_CLR_PIN 0x11 +#define IOE_REG_GPIO_MP_STA 0x12 +#define IOE_REG_GPIO_DIR 0x13 +#define IOE_REG_GPIO_ED 0x14 +#define IOE_REG_GPIO_RE 0x15 +#define IOE_REG_GPIO_FE 0x16 +#define IOE_REG_GPIO_AF 0x17 + +/** + * @brief ADC Registers + */ +#define IOE_REG_ADC_INT_EN 0x0E +#define IOE_REG_ADC_INT_STA 0x0F +#define IOE_REG_ADC_CTRL1 0x20 +#define IOE_REG_ADC_CTRL2 0x21 +#define IOE_REG_ADC_CAPT 0x22 +#define IOE_REG_ADC_DATA_CH0 0x30 /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH1 0x32 /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH2 0x34 /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH3 0x36 /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH4 0x38 /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH5 0x3A /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH6 0x3B /* 16-Bit register */ +#define IOE_REG_ADC_DATA_CH7 0x3C /* 16-Bit register */ + +/** + * @brief TouchScreen Registers + */ +#define IOE_REG_TSC_CTRL 0x40 +#define IOE_REG_TSC_CFG 0x41 +#define IOE_REG_WDM_TR_X 0x42 +#define IOE_REG_WDM_TR_Y 0x44 +#define IOE_REG_WDM_BL_X 0x46 +#define IOE_REG_WDM_BL_Y 0x48 +#define IOE_REG_FIFO_TH 0x4A +#define IOE_REG_FIFO_STA 0x4B +#define IOE_REG_FIFO_SIZE 0x4C +#define IOE_REG_TSC_DATA_X 0x4D +#define IOE_REG_TSC_DATA_Y 0x4F +#define IOE_REG_TSC_DATA_Z 0x51 +#define IOE_REG_TSC_DATA_XYZ 0x52 +#define IOE_REG_TSC_FRACT_XYZ 0x56 +#define IOE_REG_TSC_DATA 0x57 +#define IOE_REG_TSC_I_DRIVE 0x58 +#define IOE_REG_TSC_SHIELD 0x59 + +/** + * @brief Temperature Sensor registers + */ +#define IOE_REG_TEMP_CTRL 0x60 +#define IOE_REG_TEMP_DATA 0x61 +#define IOE_REG_TEMP_TH 0x62 + +/*------------------------------------------------------------------------------ + Functions parameters defines +------------------------------------------------------------------------------*/ +/** + * @brief Touch Screen Pins definition + */ +#define TOUCH_YD IO_Pin_1 /* IO_Exapnader_1 */ /* Input */ +#define TOUCH_XD IO_Pin_2 /* IO_Exapnader_1 */ /* Input */ +#define TOUCH_YU IO_Pin_3 /* IO_Exapnader_1 */ /* Input */ +#define TOUCH_XU IO_Pin_4 /* IO_Exapnader_1 */ /* Input */ +#define TOUCH_IO_ALL (uint32_t)(IO_Pin_1 | IO_Pin_2 | IO_Pin_3 | IO_Pin_4) + +/** + * @brief IO Pins + */ +#define IO_Pin_0 0x01 +#define IO_Pin_1 0x02 +#define IO_Pin_2 0x04 +#define IO_Pin_3 0x08 +#define IO_Pin_4 0x10 +#define IO_Pin_5 0x20 +#define IO_Pin_6 0x40 +#define IO_Pin_7 0x80 +#define IO_Pin_ALL 0xFF + +/** + * @brief IO Pin directions + */ +#define Direction_IN 0x00 +#define Direction_OUT 0x01 + +/** + * @brief Interrupt Line output parameters + */ +#define Polarity_Low 0x00 +#define Polarity_High 0x04 +#define Type_Level 0x00 +#define Type_Edge 0x02 + +/** + * @brief IO Interrupts + */ +#define IO_IT_0 0x01 +#define IO_IT_1 0x02 +#define IO_IT_2 0x04 +#define IO_IT_3 0x08 +#define IO_IT_4 0x10 +#define IO_IT_5 0x20 +#define IO_IT_6 0x40 +#define IO_IT_7 0x80 +#define ALL_IT 0xFF +#define IOE_TS_IT (uint8_t)(IO_IT_0 | IO_IT_1 | IO_IT_2) + +/** + * @brief Edge detection value + */ +#define EDGE_FALLING 0x01 +#define EDGE_RISING 0x02 + +/** + * @brief Global interrupt Enable bit + */ +#define IOE_GIT_EN 0x01 + +/** + * @} + */ + + + +/** @defgroup STM32100E_EVAL_IOE_Exported_Macros + * @{ + */ +/** + * @} + */ + + + +/** @defgroup STM32100E_EVAL_IOE_Exported_Functions + * @{ + */ + +/** + * @brief Configuration and initialization functions + */ +uint8_t IOE_Config(void); +uint8_t IOE_ITConfig(uint32_t IOE_ITSRC_Source); + +/** + * @brief Timeout user callback function. This function is called when a timeout + * condition occurs during communication with IO Expander. Only protoype + * of this function is decalred in IO Expander driver. Its implementation + * may be done into user application. This function may typically stop + * current operations and reset the I2C peripheral and IO Expander. + * To enable this function use uncomment the define USE_TIMEOUT_USER_CALLBACK + * at the top of this file. + */ +#ifdef USE_TIMEOUT_USER_CALLBACK + uint8_t IOE_TimeoutUserCallback(void); +#else + #define IOE_TimeoutUserCallback() IOE_TIMEOUT +#endif /* USE_TIMEOUT_USER_CALLBACK */ + +/** + * @brief IO pins control functions + */ +uint8_t IOE_WriteIOPin(uint8_t IO_Pin, IOE_BitValue_TypeDef BitVal); +uint8_t IOE_ReadIOPin(uint32_t IO_Pin); + +/** + * @brief Touch Screen controller functions + */ +TS_STATE* IOE_TS_GetState(void); + +/** + * @brief Interrupts Mangement functions + */ +FlagStatus IOE_GetGITStatus(uint8_t DeviceAddr, uint8_t Global_IT); +uint8_t IOE_ClearGITPending(uint8_t DeviceAddr, uint8_t IO_IT); +FlagStatus IOE_GetIOITStatus(uint8_t DeviceAddr, uint8_t IO_IT); +uint8_t IOE_ClearIOITPending(uint8_t DeviceAddr, uint8_t IO_IT); + + +/** + * @brief Temperature Sensor functions + */ +uint32_t IOE_TempSens_GetData(void); + + +/** + * @brief IO-Expander Control functions + */ +uint8_t IOE_IsOperational(uint8_t DeviceAddr); +uint8_t IOE_Reset(uint8_t DeviceAddr); +uint16_t IOE_ReadID(uint8_t DeviceAddr); + +uint8_t IOE_FnctCmd(uint8_t DeviceAddr, uint8_t Fct, FunctionalState NewState); +uint8_t IOE_IOPinConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Direction); +uint8_t IOE_GITCmd(uint8_t DeviceAddr, FunctionalState NewState); +uint8_t IOE_GITConfig(uint8_t DeviceAddr, uint8_t Global_IT, FunctionalState NewState); +uint8_t IOE_IOITConfig(uint8_t DeviceAddr, uint8_t IO_IT, FunctionalState NewState); + +/** + * @brief Low Layer functions + */ +uint8_t IOE_TS_Config(void); +uint8_t IOE_TempSens_Config(void); +uint8_t IOE_IOAFConfig(uint8_t DeviceAddr, uint8_t IO_Pin, FunctionalState NewState); +uint8_t IOE_IOEdgeConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Edge); +uint8_t IOE_ITOutConfig(uint8_t Polarity, uint8_t Type); + +uint8_t I2C_WriteDeviceRegister(uint8_t DeviceAddr, uint8_t RegisterAddr, uint8_t RegisterValue); +uint8_t I2C_ReadDeviceRegister(uint8_t DeviceAddr, uint8_t RegisterAddr); +uint16_t I2C_ReadDataBuffer(uint8_t DeviceAddr, uint32_t RegisterAddr); +#ifdef __cplusplus +} + +#endif +#endif /* __STM32100E_EVAL_IOE_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.c new file mode 100644 index 0000000..fe2bfdf --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.c @@ -0,0 +1,1419 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_lcd.c + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file includes the LCD driver for AM-240320L8TNQW00H + * (LCD_ILI9320), AM240320D5TOQW01H (LCD_ILI9325) and AM-240320LDTNQW00H + * (LCD_SPFD5408B) Liquid Crystal Display Module of STM32100E-EVAL board. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32100e_eval_lcd.h" +#include "../Common/fonts.c" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @defgroup STM32100E_EVAL_LCD + * @brief This file includes the LCD driver for AM-240320L8TNQW00H + * (LCD_ILI9320), AM240320D5TOQW01H (LCD_ILI9325) and AM-240320LDTNQW00H + * (LCD_SPFD5408B) Liquid Crystal Display Module of STM32100E-EVAL board. + * @{ + */ + +/** @defgroup STM32100E_EVAL_LCD_Private_TypesDefinitions + * @{ + */ +typedef struct +{ + __IO uint16_t LCD_REG; + __IO uint16_t LCD_RAM; +} LCD_TypeDef; +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LCD_Private_Defines + * @{ + */ +/* Note: LCD /CS is CE4 - Bank 4 of NOR/SRAM Bank 1~4 */ +#define LCD_BASE ((uint32_t)(0x60000000 | 0x0C000000)) +#define LCD ((LCD_TypeDef *) LCD_BASE) +#define MAX_POLY_CORNERS 200 +#define POLY_Y(Z) ((int32_t)((Points + Z)->X)) +#define POLY_X(Z) ((int32_t)((Points + Z)->Y)) +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LCD_Private_Macros + * @{ + */ +#define ABS(X) ((X) > 0 ? (X) : -(X)) +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LCD_Private_Variables + * @{ + */ +static sFONT *LCD_Currentfonts; +/* Global variables to set the written text color */ +static __IO uint16_t TextColor = 0x0000, BackColor = 0xFFFF; + +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LCD_Private_FunctionPrototypes + * @{ + */ +#ifndef USE_Delay +static void delay(vu32 nCount); +#endif /* USE_Delay*/ +static void PutPixel(int16_t x, int16_t y); +static void LCD_PolyLineRelativeClosed(pPoint Points, uint16_t PointCount, uint16_t Closed); +/** + * @} + */ + + +/** @defgroup STM32100E_EVAL_LCD_Private_Functions + * @{ + */ + +/** + * @brief DeInitializes the LCD. + * @param None + * @retval None + */ +void LCD_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< LCD Display Off */ + LCD_DisplayOff(); + + /* BANK 4 (of NOR/SRAM Bank 1~4) is disabled */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); + + /*!< LCD_SPI DeInit */ + FSMC_NORSRAMDeInit(FSMC_Bank1_NORSRAM4); + + /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14), + PD.10(D15), PD.14(D0), PD.15(D1) as input floating */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | + GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOD, &GPIO_InitStructure); + /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10), + PE.14(D11), PE.15(D12) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + /* Set PF.00(A0 (RS)) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_Init(GPIOF, &GPIO_InitStructure); + /* Set PG.12(NE4 (LCD/CS)) as alternate function push pull - CE3(LCD /CS) */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_Init(GPIOG, &GPIO_InitStructure); +} + +/** + * @brief Initializes the LCD. + * @param None + * @retval None + */ +void STM32100E_LCD_Init(void) +{ + __IO uint32_t lcdid = 0; + +/* Configure the LCD Control pins --------------------------------------------*/ + LCD_CtrlLinesConfig(); +/* Configure the FSMC Parallel interface -------------------------------------*/ + LCD_FSMCConfig(); + + _delay_(5); /* delay 50 ms */ + + /* Read the LCD ID */ + lcdid = LCD_ReadReg(0x00); + + /* Check if the LCD is SPFD5408B Controller */ + if(lcdid == 0x5408) + { + /* Start Initial Sequence ------------------------------------------------*/ + LCD_WriteReg(LCD_REG_1, 0x0100); /* Set SS bit */ + LCD_WriteReg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + LCD_WriteReg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + LCD_WriteReg(LCD_REG_4, 0x0000); /* Resize register */ + LCD_WriteReg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + LCD_WriteReg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + LCD_WriteReg(LCD_REG_10, 0x0000); /* FMARK function */ + LCD_WriteReg(LCD_REG_12, 0x0000); /* RGB 18-bit System interface setting */ + LCD_WriteReg(LCD_REG_13, 0x0000); /* Frame marker Position */ + LCD_WriteReg(LCD_REG_15, 0x0000); /* RGB interface polarity, no impact */ + /* Power On sequence -----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_17, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_16, 0x12B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x01BD); /* External reference voltage= Vci */ + _delay_(5); + LCD_WriteReg(LCD_REG_19, 0x1400); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x000E); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + LCD_WriteReg(LCD_REG_33, 0x013F); /* GRAM Vertical Address */ + /* Adjust the Gamma Curve (SPFD5408B)-------------------------------------*/ + LCD_WriteReg(LCD_REG_48, 0x0b0d); + LCD_WriteReg(LCD_REG_49, 0x1923); + LCD_WriteReg(LCD_REG_50, 0x1c26); + LCD_WriteReg(LCD_REG_51, 0x261c); + LCD_WriteReg(LCD_REG_52, 0x2419); + LCD_WriteReg(LCD_REG_53, 0x0d0b); + LCD_WriteReg(LCD_REG_54, 0x1006); + LCD_WriteReg(LCD_REG_55, 0x0610); + LCD_WriteReg(LCD_REG_56, 0x0706); + LCD_WriteReg(LCD_REG_57, 0x0304); + LCD_WriteReg(LCD_REG_58, 0x0e05); + LCD_WriteReg(LCD_REG_59, 0x0e01); + LCD_WriteReg(LCD_REG_60, 0x010e); + LCD_WriteReg(LCD_REG_61, 0x050e); + LCD_WriteReg(LCD_REG_62, 0x0403); + LCD_WriteReg(LCD_REG_63, 0x0607); + /* Set GRAM area ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + LCD_WriteReg(LCD_REG_81, 0x00EF); /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + LCD_WriteReg(LCD_REG_83, 0x013F); /* Vertical GRAM End Address */ + LCD_WriteReg(LCD_REG_96, 0xA700); /* Gate Scan Line */ + LCD_WriteReg(LCD_REG_97, 0x0001); /* NDL, VLE, REV */ + LCD_WriteReg(LCD_REG_106, 0x0000); /* set scrolling line */ + /* Partial Display Control -----------------------------------------------*/ + LCD_WriteReg(LCD_REG_128, 0x0000); + LCD_WriteReg(LCD_REG_129, 0x0000); + LCD_WriteReg(LCD_REG_130, 0x0000); + LCD_WriteReg(LCD_REG_131, 0x0000); + LCD_WriteReg(LCD_REG_132, 0x0000); + LCD_WriteReg(LCD_REG_133, 0x0000); + /* Panel Control ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_144, 0x0010); + LCD_WriteReg(LCD_REG_146, 0x0000); + LCD_WriteReg(LCD_REG_147, 0x0003); + LCD_WriteReg(LCD_REG_149, 0x0110); + LCD_WriteReg(LCD_REG_151, 0x0000); + LCD_WriteReg(LCD_REG_152, 0x0000); + /* Set GRAM write direction and BGR=1 + I/D=01 (Horizontal : increment, Vertical : decrement) + AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); + LCD_WriteReg(LCD_REG_7, 0x0112); /* 262K color and display ON */ + LCD_SetFont(&LCD_DEFAULT_FONT); + return; + } + else if(lcdid == 0x9325) /* Check if the LCD is ILI9325 Controller */ + { + /* Start Initial Sequence ------------------------------------------------*/ + LCD_WriteReg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + LCD_WriteReg(LCD_REG_1, 0x0100); /* Set SS and SM bit */ + LCD_WriteReg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + LCD_WriteReg(LCD_REG_3, 0x1018); /* Set GRAM write direction and BGR=1. */ + LCD_WriteReg(LCD_REG_4, 0x0000); /* Resize register */ + LCD_WriteReg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + LCD_WriteReg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + LCD_WriteReg(LCD_REG_10, 0x0000); /* FMARK function */ + LCD_WriteReg(LCD_REG_12, 0x0000); /* RGB interface setting */ + LCD_WriteReg(LCD_REG_13, 0x0000); /* Frame marker Position */ + LCD_WriteReg(LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence -----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + LCD_WriteReg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve (ILI9325)---------------------------------------*/ + LCD_WriteReg(LCD_REG_48, 0x0007); + LCD_WriteReg(LCD_REG_49, 0x0302); + LCD_WriteReg(LCD_REG_50, 0x0105); + LCD_WriteReg(LCD_REG_53, 0x0206); + LCD_WriteReg(LCD_REG_54, 0x0808); + LCD_WriteReg(LCD_REG_55, 0x0206); + LCD_WriteReg(LCD_REG_56, 0x0504); + LCD_WriteReg(LCD_REG_57, 0x0007); + LCD_WriteReg(LCD_REG_60, 0x0105); + LCD_WriteReg(LCD_REG_61, 0x0808); + + /* Set GRAM area ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + LCD_WriteReg(LCD_REG_81, 0x00EF); /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + LCD_WriteReg(LCD_REG_83, 0x013F); /* Vertical GRAM End Address */ + + LCD_WriteReg(LCD_REG_96, 0xA700); /* Gate Scan Line(GS=1, scan direction is G320~G1) */ + LCD_WriteReg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + LCD_WriteReg(LCD_REG_106, 0x0000); /* set scrolling line */ + + /* Partial Display Control -----------------------------------------------*/ + LCD_WriteReg(LCD_REG_128, 0x0000); + LCD_WriteReg(LCD_REG_129, 0x0000); + LCD_WriteReg(LCD_REG_130, 0x0000); + LCD_WriteReg(LCD_REG_131, 0x0000); + LCD_WriteReg(LCD_REG_132, 0x0000); + LCD_WriteReg(LCD_REG_133, 0x0000); + + /* Panel Control ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_144, 0x0010); + LCD_WriteReg(LCD_REG_146, 0x0000); + LCD_WriteReg(LCD_REG_147, 0x0003); + LCD_WriteReg(LCD_REG_149, 0x0110); + LCD_WriteReg(LCD_REG_151, 0x0000); + LCD_WriteReg(LCD_REG_152, 0x0000); + + /* set GRAM write direction and BGR = 1 */ + /* I/D=00 (Horizontal : increment, Vertical : decrement) */ + /* AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); + + LCD_WriteReg(LCD_REG_7, 0x0133); /* 262K color and display ON */ + LCD_SetFont(&LCD_DEFAULT_FONT); + return; + } + /* Check if the LCD is ILI9320 Controller */ +/* Start Initial Sequence ----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_229,0x8000); /* Set the internal vcore voltage */ + LCD_WriteReg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + LCD_WriteReg(LCD_REG_1, 0x0100); /* set SS and SM bit */ + LCD_WriteReg(LCD_REG_2, 0x0700); /* set 1 line inversion */ + LCD_WriteReg(LCD_REG_3, 0x1030); /* set GRAM write direction and BGR=1. */ + LCD_WriteReg(LCD_REG_4, 0x0000); /* Resize register */ + LCD_WriteReg(LCD_REG_8, 0x0202); /* set the back porch and front porch */ + LCD_WriteReg(LCD_REG_9, 0x0000); /* set non-display area refresh cycle ISC[3:0] */ + LCD_WriteReg(LCD_REG_10, 0x0000); /* FMARK function */ + LCD_WriteReg(LCD_REG_12, 0x0000); /* RGB interface setting */ + LCD_WriteReg(LCD_REG_13, 0x0000); /* Frame marker Position */ + LCD_WriteReg(LCD_REG_15, 0x0000); /* RGB interface polarity */ +/* Power On sequence ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + LCD_WriteReg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ +/* Adjust the Gamma Curve ----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_48, 0x0006); + LCD_WriteReg(LCD_REG_49, 0x0101); + LCD_WriteReg(LCD_REG_50, 0x0003); + LCD_WriteReg(LCD_REG_53, 0x0106); + LCD_WriteReg(LCD_REG_54, 0x0b02); + LCD_WriteReg(LCD_REG_55, 0x0302); + LCD_WriteReg(LCD_REG_56, 0x0707); + LCD_WriteReg(LCD_REG_57, 0x0007); + LCD_WriteReg(LCD_REG_60, 0x0600); + LCD_WriteReg(LCD_REG_61, 0x020b); + +/* Set GRAM area -------------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + LCD_WriteReg(LCD_REG_81, 0x00EF); /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + LCD_WriteReg(LCD_REG_83, 0x013F); /* Vertical GRAM End Address */ + LCD_WriteReg(LCD_REG_96, 0x2700); /* Gate Scan Line */ + LCD_WriteReg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + LCD_WriteReg(LCD_REG_106, 0x0000); /* set scrolling line */ +/* Partial Display Control ---------------------------------------------------*/ + LCD_WriteReg(LCD_REG_128, 0x0000); + LCD_WriteReg(LCD_REG_129, 0x0000); + LCD_WriteReg(LCD_REG_130, 0x0000); + LCD_WriteReg(LCD_REG_131, 0x0000); + LCD_WriteReg(LCD_REG_132, 0x0000); + LCD_WriteReg(LCD_REG_133, 0x0000); +/* Panel Control -------------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_144, 0x0010); + LCD_WriteReg(LCD_REG_146, 0x0000); + LCD_WriteReg(LCD_REG_147, 0x0003); + LCD_WriteReg(LCD_REG_149, 0x0110); + LCD_WriteReg(LCD_REG_151, 0x0000); + LCD_WriteReg(LCD_REG_152, 0x0000); + /* Set GRAM write direction and BGR = 1 */ + /* I/D=01 (Horizontal : increment, Vertical : decrement) */ + /* AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); + LCD_WriteReg(LCD_REG_7, 0x0173); /* 262K color and display ON */ + LCD_SetFont(&LCD_DEFAULT_FONT); +} + +/** + * @brief Sets the LCD Text and Background colors. + * @param _TextColor: specifies the Text Color. + * @param _BackColor: specifies the Background Color. + * @retval None + */ +void LCD_SetColors(__IO uint16_t _TextColor, __IO uint16_t _BackColor) +{ + TextColor = _TextColor; + BackColor = _BackColor; +} + +/** + * @brief Gets the LCD Text and Background colors. + * @param _TextColor: pointer to the variable that will contain the Text + Color. + * @param _BackColor: pointer to the variable that will contain the Background + Color. + * @retval None + */ +void LCD_GetColors(__IO uint16_t *_TextColor, __IO uint16_t *_BackColor) +{ + *_TextColor = TextColor; *_BackColor = BackColor; +} + +/** + * @brief Sets the Text color. + * @param Color: specifies the Text color code RGB(5-6-5). + * @retval None + */ +void LCD_SetTextColor(__IO uint16_t Color) +{ + TextColor = Color; +} + + +/** + * @brief Sets the Background color. + * @param Color: specifies the Background color code RGB(5-6-5). + * @retval None + */ +void LCD_SetBackColor(__IO uint16_t Color) +{ + BackColor = Color; +} + +/** + * @brief Sets the Text Font. + * @param fonts: specifies the font to be used. + * @retval None + */ +void LCD_SetFont(sFONT *fonts) +{ + LCD_Currentfonts = fonts; +} + +/** + * @brief Gets the Text Font. + * @param None. + * @retval the used font. + */ +sFONT *LCD_GetFont(void) +{ + return LCD_Currentfonts; +} + +/** + * @brief Clears the selected line. + * @param Line: the Line to be cleared. + * This parameter can be one of the following values: + * @arg Linex: where x can be 0..n + * @retval None + */ +void LCD_ClearLine(uint8_t Line) +{ + uint16_t refcolumn = LCD_PIXEL_WIDTH - 1; + /* Send the string character by character on lCD */ + while (((refcolumn + 1)&0xFFFF) >= LCD_Currentfonts->Width) + { + /* Display one character on LCD */ + LCD_DisplayChar(Line, refcolumn, ' '); + /* Decrement the column position by 16 */ + refcolumn -= LCD_Currentfonts->Width; + } +} + + +/** + * @brief Clears the hole LCD. + * @param Color: the color of the background. + * @retval None + */ +void LCD_Clear(uint16_t Color) +{ + uint32_t index = 0; + + LCD_SetCursor(0x00, 0x013F); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(index = 0; index < 76800; index++) + { + LCD->LCD_RAM = Color; + } +} + + +/** + * @brief Sets the cursor position. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @retval None + */ +void LCD_SetCursor(uint8_t Xpos, uint16_t Ypos) +{ + LCD_WriteReg(LCD_REG_32, Xpos); + LCD_WriteReg(LCD_REG_33, Ypos); +} + + +/** + * @brief Draws a character on LCD. + * @param Xpos: the Line where to display the character shape. + * @param Ypos: start column address. + * @param c: pointer to the character data. + * @retval None + */ +void LCD_DrawChar(uint8_t Xpos, uint16_t Ypos, const uint16_t *c) +{ + uint32_t index = 0, i = 0; + uint8_t Xaddress = 0; + + Xaddress = Xpos; + + LCD_SetCursor(Xaddress, Ypos); + + for(index = 0; index < LCD_Currentfonts->Height; index++) + { + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(i = 0; i < LCD_Currentfonts->Width; i++) + { + if((((c[index] & ((0x80 << ((LCD_Currentfonts->Width / 12 ) * 8 ) ) >> i)) == 0x00) &&(LCD_Currentfonts->Width <= 12))|| + (((c[index] & (0x1 << i)) == 0x00)&&(LCD_Currentfonts->Width > 12 ))) + + { + LCD_WriteRAM(BackColor); + } + else + { + LCD_WriteRAM(TextColor); + } + } + Xaddress++; + LCD_SetCursor(Xaddress, Ypos); + } +} + + +/** + * @brief Displays one character (16dots width, 24dots height). + * @param Line: the Line where to display the character shape . + * This parameter can be one of the following values: + * @arg Linex: where x can be 0..9 + * @param Column: start column address. + * @param Ascii: character ascii code, must be between 0x20 and 0x7E. + * @retval None + */ +void LCD_DisplayChar(uint8_t Line, uint16_t Column, uint8_t Ascii) +{ + Ascii -= 32; + LCD_DrawChar(Line, Column, &LCD_Currentfonts->table[Ascii * LCD_Currentfonts->Height]); +} + + +/** + * @brief Displays a maximum of 20 char on the LCD. + * @param Line: the Line where to display the character shape . + * This parameter can be one of the following values: + * @arg Linex: where x can be 0..9 + * @param *ptr: pointer to string to display on LCD. + * @retval None + */ +void LCD_DisplayStringLine(uint8_t Line, uint8_t *ptr) +{ + uint16_t refcolumn = LCD_PIXEL_WIDTH - 1; + + /* Send the string character by character on lCD */ + while ((*ptr != 0) & (((refcolumn + 1) & 0xFFFF) >= LCD_Currentfonts->Width)) + { + /* Display one character on LCD */ + LCD_DisplayChar(Line, refcolumn, *ptr); + /* Decrement the column position by 16 */ + refcolumn -= LCD_Currentfonts->Width; + /* Point on the next character */ + ptr++; + } +} + + +/** + * @brief Sets a display window + * @param Xpos: specifies the X buttom left position. + * @param Ypos: specifies the Y buttom left position. + * @param Height: display window height. + * @param Width: display window width. + * @retval None + */ +void LCD_SetDisplayWindow(uint8_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width) +{ + /* Horizontal GRAM Start Address */ + if(Xpos >= Height) + { + LCD_WriteReg(LCD_REG_80, (Xpos - Height + 1)); + } + else + { + LCD_WriteReg(LCD_REG_80, 0); + } + /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_81, Xpos); + /* Vertical GRAM Start Address */ + if(Ypos >= Width) + { + LCD_WriteReg(LCD_REG_82, (Ypos - Width + 1)); + } + else + { + LCD_WriteReg(LCD_REG_82, 0); + } + /* Vertical GRAM End Address */ + LCD_WriteReg(LCD_REG_83, Ypos); + LCD_SetCursor(Xpos, Ypos); +} + + +/** + * @brief Disables LCD Window mode. + * @param None + * @retval None + */ +void LCD_WindowModeDisable(void) +{ + LCD_SetDisplayWindow(239, 0x13F, 240, 320); + LCD_WriteReg(LCD_REG_3, 0x1018); +} + + +/** + * @brief Displays a line. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Length: line length. + * @param Direction: line direction. + * This parameter can be one of the following values: Vertical or Horizontal. + * @retval None + */ +void LCD_DrawLine(uint8_t Xpos, uint16_t Ypos, uint16_t Length, uint8_t Direction) +{ + uint32_t i = 0; + + LCD_SetCursor(Xpos, Ypos); + if(Direction == LCD_DIR_HORIZONTAL) + { + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(i = 0; i < Length; i++) + { + LCD_WriteRAM(TextColor); + } + } + else + { + for(i = 0; i < Length; i++) + { + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + Xpos++; + LCD_SetCursor(Xpos, Ypos); + } + } +} + + +/** + * @brief Displays a rectangle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Height: display rectangle height. + * @param Width: display rectangle width. + * @retval None + */ +void LCD_DrawRect(uint8_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width) +{ + LCD_DrawLine(Xpos, Ypos, Width, LCD_DIR_HORIZONTAL); + LCD_DrawLine((Xpos + Height), Ypos, Width, LCD_DIR_HORIZONTAL); + + LCD_DrawLine(Xpos, Ypos, Height, LCD_DIR_VERTICAL); + LCD_DrawLine(Xpos, (Ypos - Width + 1), Height, LCD_DIR_VERTICAL); +} + + +/** + * @brief Displays a circle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Radius + * @retval None + */ +void LCD_DrawCircle(uint8_t Xpos, uint16_t Ypos, uint16_t Radius) +{ + int32_t D;/* Decision Variable */ + uint32_t CurX;/* Current X Value */ + uint32_t CurY;/* Current Y Value */ + + D = 3 - (Radius << 1); + CurX = 0; + CurY = Radius; + + while (CurX <= CurY) + { + LCD_SetCursor(Xpos + CurX, Ypos + CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos + CurX, Ypos - CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurX, Ypos + CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurX, Ypos - CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos + CurY, Ypos + CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos + CurY, Ypos - CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurY, Ypos + CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurY, Ypos - CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + if (D < 0) + { + D += (CurX << 2) + 6; + } + else + { + D += ((CurX - CurY) << 2) + 10; + CurY--; + } + CurX++; + } +} + + +/** + * @brief Displays a monocolor picture. + * @param Pict: pointer to the picture array. + * @retval None + */ +void LCD_DrawMonoPict(const uint32_t *Pict) +{ + uint32_t index = 0, i = 0; + LCD_SetCursor(0, (LCD_PIXEL_WIDTH - 1)); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(index = 0; index < 2400; index++) + { + for(i = 0; i < 32; i++) + { + if((Pict[index] & (1 << i)) == 0x00) + { + LCD_WriteRAM(BackColor); + } + else + { + LCD_WriteRAM(TextColor); + } + } + } +} + + +/** + * @brief Displays a bitmap picture loaded in the internal Flash. + * @param BmpAddress: Bmp picture address in the internal Flash. + * @retval None + */ +void LCD_WriteBMP(uint32_t BmpAddress) +{ + uint32_t index = 0, size = 0; + /* Read bitmap size */ + size = *(__IO uint16_t *) (BmpAddress + 2); + size |= (*(__IO uint16_t *) (BmpAddress + 4)) << 16; + /* Get bitmap data address offset */ + index = *(__IO uint16_t *) (BmpAddress + 10); + index |= (*(__IO uint16_t *) (BmpAddress + 12)) << 16; + size = (size - index)/2; + BmpAddress += index; + /* Set GRAM write direction and BGR = 1 */ + /* I/D=00 (Horizontal : decrement, Vertical : decrement) */ + /* AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1008); + + LCD_WriteRAM_Prepare(); + + for(index = 0; index < size; index++) + { + LCD_WriteRAM(*(__IO uint16_t *)BmpAddress); + BmpAddress += 2; + } + + /* Set GRAM write direction and BGR = 1 */ + /* I/D = 01 (Horizontal : increment, Vertical : decrement) */ + /* AM = 1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); +} + +/** + * @brief Displays a full rectangle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Height: rectangle height. + * @param Width: rectangle width. + * @retval None + */ +void LCD_DrawFullRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height) +{ + LCD_SetTextColor(TextColor); + + LCD_DrawLine(Xpos, Ypos, Width, LCD_DIR_HORIZONTAL); + LCD_DrawLine((Xpos + Height), Ypos, Width, LCD_DIR_HORIZONTAL); + + LCD_DrawLine(Xpos, Ypos, Height, LCD_DIR_VERTICAL); + LCD_DrawLine(Xpos, (Ypos - Width + 1), Height, LCD_DIR_VERTICAL); + + Width -= 2; + Height--; + Ypos--; + + LCD_SetTextColor(BackColor); + + while(Height--) + { + LCD_DrawLine(++Xpos, Ypos, Width, LCD_DIR_HORIZONTAL); + } + + LCD_SetTextColor(TextColor); +} + +/** + * @brief Displays a full circle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Radius + * @retval None + */ +void LCD_DrawFullCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius) +{ + int32_t D; /* Decision Variable */ + uint32_t CurX;/* Current X Value */ + uint32_t CurY;/* Current Y Value */ + + D = 3 - (Radius << 1); + + CurX = 0; + CurY = Radius; + + LCD_SetTextColor(BackColor); + + while (CurX <= CurY) + { + if(CurY > 0) + { + LCD_DrawLine(Xpos - CurX, Ypos + CurY, 2*CurY, LCD_DIR_HORIZONTAL); + LCD_DrawLine(Xpos + CurX, Ypos + CurY, 2*CurY, LCD_DIR_HORIZONTAL); + } + + if(CurX > 0) + { + LCD_DrawLine(Xpos - CurY, Ypos + CurX, 2*CurX, LCD_DIR_HORIZONTAL); + LCD_DrawLine(Xpos + CurY, Ypos + CurX, 2*CurX, LCD_DIR_HORIZONTAL); + } + if (D < 0) + { + D += (CurX << 2) + 6; + } + else + { + D += ((CurX - CurY) << 2) + 10; + CurY--; + } + CurX++; + } + + LCD_SetTextColor(TextColor); + LCD_DrawCircle(Xpos, Ypos, Radius); +} + +/** + * @brief Displays an uni line (between two points). + * @param x1: specifies the point 1 x position. + * @param y1: specifies the point 1 y position. + * @param x2: specifies the point 2 x position. + * @param y2: specifies the point 2 y position. + * @retval None + */ +void LCD_DrawUniLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) +{ + int16_t deltax = 0, deltay = 0, x = 0, y = 0, xinc1 = 0, xinc2 = 0, + yinc1 = 0, yinc2 = 0, den = 0, num = 0, numadd = 0, numpixels = 0, + curpixel = 0; + + deltax = ABS(x2 - x1); /* The difference between the x's */ + deltay = ABS(y2 - y1); /* The difference between the y's */ + x = x1; /* Start x off at the first pixel */ + y = y1; /* Start y off at the first pixel */ + + if (x2 >= x1) /* The x-values are increasing */ + { + xinc1 = 1; + xinc2 = 1; + } + else /* The x-values are decreasing */ + { + xinc1 = -1; + xinc2 = -1; + } + + if (y2 >= y1) /* The y-values are increasing */ + { + yinc1 = 1; + yinc2 = 1; + } + else /* The y-values are decreasing */ + { + yinc1 = -1; + yinc2 = -1; + } + + if (deltax >= deltay) /* There is at least one x-value for every y-value */ + { + xinc1 = 0; /* Don't change the x when numerator >= denominator */ + yinc2 = 0; /* Don't change the y for every iteration */ + den = deltax; + num = deltax / 2; + numadd = deltay; + numpixels = deltax; /* There are more x-values than y-values */ + } + else /* There is at least one y-value for every x-value */ + { + xinc2 = 0; /* Don't change the x for every iteration */ + yinc1 = 0; /* Don't change the y when numerator >= denominator */ + den = deltay; + num = deltay / 2; + numadd = deltax; + numpixels = deltay; /* There are more y-values than x-values */ + } + + for (curpixel = 0; curpixel <= numpixels; curpixel++) + { + PutPixel(x, y); /* Draw the current pixel */ + num += numadd; /* Increase the numerator by the top of the fraction */ + if (num >= den) /* Check if numerator >= denominator */ + { + num -= den; /* Calculate the new numerator value */ + x += xinc1; /* Change the x as appropriate */ + y += yinc1; /* Change the y as appropriate */ + } + x += xinc2; /* Change the x as appropriate */ + y += yinc2; /* Change the y as appropriate */ + } +} + +/** + * @brief Displays an polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_PolyLine(pPoint Points, uint16_t PointCount) +{ + int16_t X = 0, Y = 0; + + if(PointCount < 2) + { + return; + } + + while(--PointCount) + { + X = Points->X; + Y = Points->Y; + Points++; + LCD_DrawUniLine(X, Y, Points->X, Points->Y); + } +} + +/** + * @brief Displays an relative polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @param Closed: specifies if the draw is closed or not. + * 1: closed, 0 : not closed. + * @retval None + */ +static void LCD_PolyLineRelativeClosed(pPoint Points, uint16_t PointCount, uint16_t Closed) +{ + int16_t X = 0, Y = 0; + pPoint First = Points; + + if(PointCount < 2) + { + return; + } + X = Points->X; + Y = Points->Y; + while(--PointCount) + { + Points++; + LCD_DrawUniLine(X, Y, X + Points->X, Y + Points->Y); + X = X + Points->X; + Y = Y + Points->Y; + } + if(Closed) + { + LCD_DrawUniLine(First->X, First->Y, X, Y); + } +} + +/** + * @brief Displays a closed polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_ClosedPolyLine(pPoint Points, uint16_t PointCount) +{ + LCD_PolyLine(Points, PointCount); + LCD_DrawUniLine(Points->X, Points->Y, (Points+PointCount-1)->X, (Points+PointCount-1)->Y); +} + +/** + * @brief Displays a relative polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_PolyLineRelative(pPoint Points, uint16_t PointCount) +{ + LCD_PolyLineRelativeClosed(Points, PointCount, 0); +} + +/** + * @brief Displays a closed relative polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_ClosedPolyLineRelative(pPoint Points, uint16_t PointCount) +{ + LCD_PolyLineRelativeClosed(Points, PointCount, 1); +} + + +/** + * @brief Displays a full polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_FillPolyLine(pPoint Points, uint16_t PointCount) +{ + /* public-domain code by Darel Rex Finley, 2007 */ + uint16_t nodes = 0, nodeX[MAX_POLY_CORNERS], pixelX = 0, pixelY = 0, i = 0, + j = 0, swap = 0; + uint16_t IMAGE_LEFT = 0, IMAGE_RIGHT = 0, IMAGE_TOP = 0, IMAGE_BOTTOM = 0; + + IMAGE_LEFT = IMAGE_RIGHT = Points->X; + IMAGE_TOP= IMAGE_BOTTOM = Points->Y; + + for(i = 1; i < PointCount; i++) + { + pixelX = POLY_X(i); + if(pixelX < IMAGE_LEFT) + { + IMAGE_LEFT = pixelX; + } + if(pixelX > IMAGE_RIGHT) + { + IMAGE_RIGHT = pixelX; + } + + pixelY = POLY_Y(i); + if(pixelY < IMAGE_TOP) + { + IMAGE_TOP = pixelY; + } + if(pixelY > IMAGE_BOTTOM) + { + IMAGE_BOTTOM = pixelY; + } + } + + LCD_SetTextColor(BackColor); + + /* Loop through the rows of the image. */ + for (pixelY = IMAGE_TOP; pixelY < IMAGE_BOTTOM; pixelY++) + { + /* Build a list of nodes. */ + nodes = 0; j = PointCount-1; + + for (i = 0; i < PointCount; i++) + { + if (POLY_Y(i)<(double) pixelY && POLY_Y(j)>=(double) pixelY || POLY_Y(j)<(double) pixelY && POLY_Y(i)>=(double) pixelY) + { + nodeX[nodes++]=(int) (POLY_X(i)+((pixelY-POLY_Y(i))*(POLY_X(j)-POLY_X(i)))/(POLY_Y(j)-POLY_Y(i))); + } + j = i; + } + + /* Sort the nodes, via a simple "Bubble" sort. */ + i = 0; + while (i < nodes-1) + { + if (nodeX[i]>nodeX[i+1]) + { + swap = nodeX[i]; + nodeX[i] = nodeX[i+1]; + nodeX[i+1] = swap; + if(i) + { + i--; + } + } + else + { + i++; + } + } + + /* Fill the pixels between node pairs. */ + for (i = 0; i < nodes; i+=2) + { + if(nodeX[i] >= IMAGE_RIGHT) + { + break; + } + if(nodeX[i+1] > IMAGE_LEFT) + { + if (nodeX[i] < IMAGE_LEFT) + { + nodeX[i]=IMAGE_LEFT; + } + if(nodeX[i+1] > IMAGE_RIGHT) + { + nodeX[i+1] = IMAGE_RIGHT; + } + LCD_SetTextColor(BackColor); + LCD_DrawLine(pixelY, nodeX[i+1], nodeX[i+1] - nodeX[i], LCD_DIR_HORIZONTAL); + LCD_SetTextColor(TextColor); + PutPixel(pixelY, nodeX[i+1]); + PutPixel(pixelY, nodeX[i]); + /* for (j=nodeX[i]; j<nodeX[i+1]; j++) PutPixel(j,pixelY); */ + } + } + } + + /* draw the edges */ + LCD_SetTextColor(TextColor); +} + +/** + * @brief Writes to the selected LCD register. + * @param LCD_Reg: address of the selected register. + * @param LCD_RegValue: value to write to the selected register. + * @retval None + */ +void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue) +{ + /* Write 16-bit Index, then Write Reg */ + LCD->LCD_REG = LCD_Reg; + /* Write 16-bit Reg */ + LCD->LCD_RAM = LCD_RegValue; +} + + +/** + * @brief Reads the selected LCD Register. + * @param LCD_Reg: address of the selected register. + * @retval LCD Register Value. + */ +uint16_t LCD_ReadReg(uint8_t LCD_Reg) +{ + /* Write 16-bit Index (then Read Reg) */ + LCD->LCD_REG = LCD_Reg; + /* Read 16-bit Reg */ + return (LCD->LCD_RAM); +} + + +/** + * @brief Prepare to write to the LCD RAM. + * @param None + * @retval None + */ +void LCD_WriteRAM_Prepare(void) +{ + LCD->LCD_REG = LCD_REG_34; +} + + +/** + * @brief Writes to the LCD RAM. + * @param RGB_Code: the pixel color in RGB mode (5-6-5). + * @retval None + */ +void LCD_WriteRAM(uint16_t RGB_Code) +{ + /* Write 16-bit GRAM Reg */ + LCD->LCD_RAM = RGB_Code; +} + + +/** + * @brief Reads the LCD RAM. + * @param None + * @retval LCD RAM Value. + */ +uint16_t LCD_ReadRAM(void) +{ + /* Write 16-bit Index (then Read Reg) */ + LCD->LCD_REG = LCD_REG_34; /* Select GRAM Reg */ + /* Read 16-bit Reg */ + return LCD->LCD_RAM; +} + + +/** + * @brief Power on the LCD. + * @param None + * @retval None + */ +void LCD_PowerOn(void) +{ +/* Power On sequence ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude*/ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_7, 0x0173); /* 262K color and display ON */ +} + + +/** + * @brief Enables the Display. + * @param None + * @retval None + */ +void LCD_DisplayOn(void) +{ + /* Display On */ + LCD_WriteReg(LCD_REG_7, 0x0173); /* 262K color and display ON */ +} + + +/** + * @brief Disables the Display. + * @param None + * @retval None + */ +void LCD_DisplayOff(void) +{ + /* Display Off */ + LCD_WriteReg(LCD_REG_7, 0x0); +} + + +/** + * @brief Configures LCD Control lines (FSMC Pins) in alternate function mode. + * @param None + * @retval None + */ +void LCD_CtrlLinesConfig(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | + RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG | + RCC_APB2Periph_AFIO, ENABLE); + + /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14), + PD.10(D15), PD.14(D0), PD.15(D1) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | + GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10), + PE.14(D11), PE.15(D12) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + /* Set PF.00(A0 (RS)) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_Init(GPIOF, &GPIO_InitStructure); + + /* Set PG.12(NE4 (LCD/CS)) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_Init(GPIOG, &GPIO_InitStructure); +} + +/** + * @brief Configures the Parallel interface (FSMC) for LCD(Parallel mode) + * @param None + * @retval None + */ +void LCD_FSMCConfig(void) +{ + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; +/*-- FSMC Configuration ------------------------------------------------------*/ +/*----------------------- SRAM Bank 4 ----------------------------------------*/ + /* FSMC_Bank1_NORSRAM4 configuration */ + p.FSMC_AddressSetupTime = 1; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 2; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + /* Color LCD configuration ------------------------------------ + LCD configured as follow: + - Data/Address MUX = Disable + - Memory Type = SRAM + - Data Width = 16bit + - Write Operation = Enable + - Extended Mode = Enable + - Asynchronous Wait = Disable */ + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + /* BANK 4 (of NOR/SRAM Bank) is enabled */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); +} + +/** + * @brief Displays a pixel. + * @param x: pixel x. + * @param y: pixel y. + * @retval None + */ +static void PutPixel(int16_t x, int16_t y) +{ + if(x < 0 || x > 239 || y < 0 || y > 319) + { + return; + } + LCD_DrawLine(x, y, 1, LCD_DIR_HORIZONTAL); +} + +#ifndef USE_Delay +/** + * @brief Inserts a delay time. + * @param nCount: specifies the delay time length. + * @retval None + */ +static void delay(vu32 nCount) +{ + vu32 index = 0; + for(index = (34000 * nCount); index != 0; index--) + { + } +} +#endif /* USE_Delay*/ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.h new file mode 100644 index 0000000..66320cd --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100E_EVAL/stm32100e_eval_lcd.h @@ -0,0 +1,359 @@ +/** + ****************************************************************************** + * @file stm32100e_eval_lcd.h + * @author MCD Application Team + * @version V4.5.0 + * @date 07-March-2011 + * @brief This file contains all the functions prototypes for the stm32100e_eval_lcd + * firmware driver. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32100E_EVAL_LCD_H +#define __STM32100E_EVAL_LCD_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" +#include "../Common/fonts.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL + * @{ + */ + +/** @addtogroup STM32100E_EVAL_LCD + * @{ + */ + +/** @defgroup STM32100E_EVAL_LCD_Exported_Types + * @{ + */ +typedef struct +{ + int16_t X; + int16_t Y; +} Point, * pPoint; +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LCD_Exported_Constants + * @{ + */ + +/** + * @brief Uncomment the line below if you want to use user defined Delay function + * (for precise timing), otherwise default _delay_ function defined within + * this driver is used (less precise timing). + */ +/* #define USE_Delay */ + +#ifdef USE_Delay +#include "main.h" + #define _delay_ Delay /* !< User can provide more timing precise _delay_ function + (with 10ms time base), using SysTick for example */ +#else + #define _delay_ delay /* !< Default _delay_ function with less precise timing */ +#endif + +/** + * @brief LCD Registers + */ +#define LCD_REG_0 0x00 +#define LCD_REG_1 0x01 +#define LCD_REG_2 0x02 +#define LCD_REG_3 0x03 +#define LCD_REG_4 0x04 +#define LCD_REG_5 0x05 +#define LCD_REG_6 0x06 +#define LCD_REG_7 0x07 +#define LCD_REG_8 0x08 +#define LCD_REG_9 0x09 +#define LCD_REG_10 0x0A +#define LCD_REG_12 0x0C +#define LCD_REG_13 0x0D +#define LCD_REG_14 0x0E +#define LCD_REG_15 0x0F +#define LCD_REG_16 0x10 +#define LCD_REG_17 0x11 +#define LCD_REG_18 0x12 +#define LCD_REG_19 0x13 +#define LCD_REG_20 0x14 +#define LCD_REG_21 0x15 +#define LCD_REG_22 0x16 +#define LCD_REG_23 0x17 +#define LCD_REG_24 0x18 +#define LCD_REG_25 0x19 +#define LCD_REG_26 0x1A +#define LCD_REG_27 0x1B +#define LCD_REG_28 0x1C +#define LCD_REG_29 0x1D +#define LCD_REG_30 0x1E +#define LCD_REG_31 0x1F +#define LCD_REG_32 0x20 +#define LCD_REG_33 0x21 +#define LCD_REG_34 0x22 +#define LCD_REG_36 0x24 +#define LCD_REG_37 0x25 +#define LCD_REG_40 0x28 +#define LCD_REG_41 0x29 +#define LCD_REG_43 0x2B +#define LCD_REG_45 0x2D +#define LCD_REG_48 0x30 +#define LCD_REG_49 0x31 +#define LCD_REG_50 0x32 +#define LCD_REG_51 0x33 +#define LCD_REG_52 0x34 +#define LCD_REG_53 0x35 +#define LCD_REG_54 0x36 +#define LCD_REG_55 0x37 +#define LCD_REG_56 0x38 +#define LCD_REG_57 0x39 +#define LCD_REG_58 0x3A +#define LCD_REG_59 0x3B +#define LCD_REG_60 0x3C +#define LCD_REG_61 0x3D +#define LCD_REG_62 0x3E +#define LCD_REG_63 0x3F +#define LCD_REG_64 0x40 +#define LCD_REG_65 0x41 +#define LCD_REG_66 0x42 +#define LCD_REG_67 0x43 +#define LCD_REG_68 0x44 +#define LCD_REG_69 0x45 +#define LCD_REG_70 0x46 +#define LCD_REG_71 0x47 +#define LCD_REG_72 0x48 +#define LCD_REG_73 0x49 +#define LCD_REG_74 0x4A +#define LCD_REG_75 0x4B +#define LCD_REG_76 0x4C +#define LCD_REG_77 0x4D +#define LCD_REG_78 0x4E +#define LCD_REG_79 0x4F +#define LCD_REG_80 0x50 +#define LCD_REG_81 0x51 +#define LCD_REG_82 0x52 +#define LCD_REG_83 0x53 +#define LCD_REG_96 0x60 +#define LCD_REG_97 0x61 +#define LCD_REG_106 0x6A +#define LCD_REG_118 0x76 +#define LCD_REG_128 0x80 +#define LCD_REG_129 0x81 +#define LCD_REG_130 0x82 +#define LCD_REG_131 0x83 +#define LCD_REG_132 0x84 +#define LCD_REG_133 0x85 +#define LCD_REG_134 0x86 +#define LCD_REG_135 0x87 +#define LCD_REG_136 0x88 +#define LCD_REG_137 0x89 +#define LCD_REG_139 0x8B +#define LCD_REG_140 0x8C +#define LCD_REG_141 0x8D +#define LCD_REG_143 0x8F +#define LCD_REG_144 0x90 +#define LCD_REG_145 0x91 +#define LCD_REG_146 0x92 +#define LCD_REG_147 0x93 +#define LCD_REG_148 0x94 +#define LCD_REG_149 0x95 +#define LCD_REG_150 0x96 +#define LCD_REG_151 0x97 +#define LCD_REG_152 0x98 +#define LCD_REG_153 0x99 +#define LCD_REG_154 0x9A +#define LCD_REG_157 0x9D +#define LCD_REG_192 0xC0 +#define LCD_REG_193 0xC1 +#define LCD_REG_229 0xE5 + +/** + * @brief LCD color + */ +#define LCD_COLOR_WHITE 0xFFFF +#define LCD_COLOR_BLACK 0x0000 +#define LCD_COLOR_GREY 0xF7DE +#define LCD_COLOR_BLUE 0x001F +#define LCD_COLOR_BLUE2 0x051F +#define LCD_COLOR_RED 0xF800 +#define LCD_COLOR_MAGENTA 0xF81F +#define LCD_COLOR_GREEN 0x07E0 +#define LCD_COLOR_CYAN 0x7FFF +#define LCD_COLOR_YELLOW 0xFFE0 + +/** + * @brief LCD Lines depending on the chosen fonts. + */ +#define LCD_LINE_0 LINE(0) +#define LCD_LINE_1 LINE(1) +#define LCD_LINE_2 LINE(2) +#define LCD_LINE_3 LINE(3) +#define LCD_LINE_4 LINE(4) +#define LCD_LINE_5 LINE(5) +#define LCD_LINE_6 LINE(6) +#define LCD_LINE_7 LINE(7) +#define LCD_LINE_8 LINE(8) +#define LCD_LINE_9 LINE(9) +#define LCD_LINE_10 LINE(10) +#define LCD_LINE_11 LINE(11) +#define LCD_LINE_12 LINE(12) +#define LCD_LINE_13 LINE(13) +#define LCD_LINE_14 LINE(14) +#define LCD_LINE_15 LINE(15) +#define LCD_LINE_16 LINE(16) +#define LCD_LINE_17 LINE(17) +#define LCD_LINE_18 LINE(18) +#define LCD_LINE_19 LINE(19) +#define LCD_LINE_20 LINE(20) +#define LCD_LINE_21 LINE(21) +#define LCD_LINE_22 LINE(22) +#define LCD_LINE_23 LINE(23) +#define LCD_LINE_24 LINE(24) +#define LCD_LINE_25 LINE(25) +#define LCD_LINE_26 LINE(26) +#define LCD_LINE_27 LINE(27) +#define LCD_LINE_28 LINE(28) +#define LCD_LINE_29 LINE(29) + +/** + * @brief LCD default font + */ +#define LCD_DEFAULT_FONT Font16x24 + +/** + * @brief LCD Direction + */ +#define LCD_DIR_HORIZONTAL 0x0000 +#define LCD_DIR_VERTICAL 0x0001 + +/** + * @brief LCD Size (Width and Height) + */ +#define LCD_PIXEL_WIDTH 0x0140 +#define LCD_PIXEL_HEIGHT 0x00F0 + +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LCD_Exported_Macros + * @{ + */ +#define ASSEMBLE_RGB(R, G, B) ((((R)& 0xF8) << 8) | (((G) & 0xFC) << 3) | (((B) & 0xF8) >> 3)) +/** + * @} + */ + +/** @defgroup STM32100E_EVAL_LCD_Exported_Functions + * @{ + */ +/** @defgroup + * @{ + */ +void LCD_DeInit(void); +void STM32100E_LCD_Init(void); +void LCD_SetColors(__IO uint16_t _TextColor, __IO uint16_t _BackColor); +void LCD_GetColors(__IO uint16_t *_TextColor, __IO uint16_t *_BackColor); +void LCD_SetTextColor(__IO uint16_t Color); +void LCD_SetBackColor(__IO uint16_t Color); +void LCD_ClearLine(uint8_t Line); +void LCD_Clear(uint16_t Color); +void LCD_SetCursor(uint8_t Xpos, uint16_t Ypos); +void LCD_DrawChar(uint8_t Xpos, uint16_t Ypos, const uint16_t *c); +void LCD_DisplayChar(uint8_t Line, uint16_t Column, uint8_t Ascii); +void LCD_SetFont(sFONT *fonts); +sFONT *LCD_GetFont(void); +void LCD_DisplayStringLine(uint8_t Line, uint8_t *ptr); +void LCD_SetDisplayWindow(uint8_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width); +void LCD_WindowModeDisable(void); +void LCD_DrawLine(uint8_t Xpos, uint16_t Ypos, uint16_t Length, uint8_t Direction); +void LCD_DrawRect(uint8_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width); +void LCD_DrawCircle(uint8_t Xpos, uint16_t Ypos, uint16_t Radius); +void LCD_DrawMonoPict(const uint32_t *Pict); +void LCD_WriteBMP(uint32_t BmpAddress); +void LCD_DrawUniLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); +void LCD_DrawFullRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height); +void LCD_DrawFullCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius); +void LCD_PolyLine(pPoint Points, uint16_t PointCount); +void LCD_PolyLineRelative(pPoint Points, uint16_t PointCount); +void LCD_ClosedPolyLine(pPoint Points, uint16_t PointCount); +void LCD_ClosedPolyLineRelative(pPoint Points, uint16_t PointCount); +void LCD_FillPolyLine(pPoint Points, uint16_t PointCount); +/** + * @} + */ + +/** @defgroup + * @{ + */ +void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue); +uint16_t LCD_ReadReg(uint8_t LCD_Reg); +void LCD_WriteRAM_Prepare(void); +void LCD_WriteRAM(uint16_t RGB_Code); +uint16_t LCD_ReadRAM(void); +void LCD_PowerOn(void); +void LCD_DisplayOn(void); +void LCD_DisplayOff(void); +/** + * @} + */ + +/** @defgroup + * @{ + */ +void LCD_CtrlLinesConfig(void); +void LCD_FSMCConfig(void); +/** + * @} + */ + +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif /* __STM32100E_EVAL_LCD_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |