diff options
author | Trygve Laugstøl <trygvis@inamo.no> | 2016-09-15 00:37:46 +0200 |
---|---|---|
committer | Trygve Laugstøl <trygvis@inamo.no> | 2016-09-15 00:37:46 +0200 |
commit | 7f098579387bb16c775ab28490be2f347b05e51b (patch) | |
tree | 4064322990b90a42d155d0d9c14a4ea11af717ae /py | |
parent | e4444b71b96c896690817a02cf66199183b68a19 (diff) | |
download | kicad-utils-7f098579387bb16c775ab28490be2f347b05e51b.tar.gz kicad-utils-7f098579387bb16c775ab28490be2f347b05e51b.tar.bz2 kicad-utils-7f098579387bb16c775ab28490be2f347b05e51b.tar.xz kicad-utils-7f098579387bb16c775ab28490be2f347b05e51b.zip |
Adding CMake commands:
kicad_pcb_plot() that plots the PCB in PDF, PS and SVG formats.
kicad_gerber() that generates GERBER files from a PCB. Can optionally create a ZIP file with all the files. Supports old (protel) naming of files.
Diffstat (limited to 'py')
-rwxr-xr-x | py/kicad_gerber.py | 145 | ||||
-rwxr-xr-x | py/kicad_pcb_plot.py | 33 |
2 files changed, 161 insertions, 17 deletions
diff --git a/py/kicad_gerber.py b/py/kicad_gerber.py new file mode 100755 index 0000000..41ae3af --- /dev/null +++ b/py/kicad_gerber.py @@ -0,0 +1,145 @@ +#!/usr/bin/env python +import sys +import os +import argparse +from pcbnew import * + +parser = argparse.ArgumentParser(description='KiCAD PCB to GERBER converter') + +parser.add_argument('--pcb', + required=True, + dest='pcb', + action='store', + help='A foo.kicad_pcb file') + +parser.add_argument('--output-directory', + required=True, + dest='output_directory', + action='store', + help='Directory to store output files') + +parser.add_argument('--detect-files-only', + dest='detect_files_only', + action='store_true', + help='Don\'t create the GERBER files, just list the files to be created') + +parser.add_argument('--create-drill-map-file', + dest='create_drill_map_file', + action='store_true', + help='Create drill map file') + +parser.add_argument('--protel-extensions', + dest='protel_extensions', + action='store_true', + help='Use Protel filename extensions') + +args = parser.parse_args() + +filename = args.pcb + +board = LoadBoard(filename) + +plot_plan = [ + ("GTO", board.GetLayerName(F_SilkS), F_SilkS, "Silk front"), + ("GTS", board.GetLayerName(F_Mask), F_Mask, "Mask front"), + ("GBO", board.GetLayerName(B_SilkS), B_SilkS, "Silk bottom"), + ("GBS", board.GetLayerName(B_Mask), B_Mask, "Mask bottom"), + ("GBR", board.GetLayerName(Edge_Cuts), Edge_Cuts, "Edges"), +] + +layers = board.GetEnabledLayers() +for i in layers.CuStack(): + name = board.GetLayerName(i) + plot_plan.append(("", name, i, "Copper Layer " + name)) + +pctl = PLOT_CONTROLLER(board) +popt = pctl.GetPlotOptions() +popt.SetOutputDirectory(args.output_directory) + +# A nasty hack to get the base filename +pctl.SetLayer(F_Cu) +pctl.OpenPlotfile("", PLOT_FORMAT_GERBER, "") +filename = pctl.GetPlotFileName() +try: + os.remove(filename) +except: + pass +pctl.ClosePlot() + +basename = filename.replace('.gbr', '') +drlFile = basename + ".drl" +drlFileProtel = basename + ".txt" + +if args.protel_extensions: + popt.SetUseGerberProtelExtensions(True) + +if args.detect_files_only: + for layer_info in plot_plan: + filenamePostfix = layer_info[1] + layer_num = layer_info[2] + pctl.SetLayer(layer_num) + + pctl.OpenPlotfile(filenamePostfix, PLOT_FORMAT_GERBER, layer_info[3]) + filename = pctl.GetPlotFileName() + print filename + try: + os.remove(filename) + except: + pass + + pctl.ClosePlot() + if args.protel_extensions: + print drlFileProtel + else: + print drlFile + sys.exit(0) + +# Set some important plot options: +popt.SetPlotFrameRef(False) +popt.SetLineWidth(FromMM(0.35)) + +popt.SetAutoScale(False) +popt.SetScale(1) +popt.SetMirror(False) +popt.SetUseGerberAttributes(True) +popt.SetExcludeEdgeLayer(False) +popt.SetScale(1) +popt.SetUseAuxOrigin(True) + +# This by gerbers only (also the name is truly horrid!) +popt.SetSubtractMaskFromSilk(False) + +for layer_info in plot_plan: + filenamePostfix = layer_info[1] + layer_num = layer_info[2] + pctl.SetLayer(layer_num) + + pctl.OpenPlotfile(filenamePostfix, PLOT_FORMAT_GERBER, layer_info[3]) + pctl.PlotLayer() + pctl.ClosePlot() + +popt.SetDrillMarksType(PCB_PLOT_PARAMS.FULL_DRILL_SHAPE) + +drlwriter = EXCELLON_WRITER(board) +# drlwriter.SetMapFileFormat(PLOT_FORMAT_PDF) +drlwriter.SetMapFileFormat(PLOT_FORMAT_GERBER) + +mirror = False +minimalHeader = False +offset = wxPoint(0, 0) +# False to generate 2 separate drill files (one for plated holes, one for non plated holes) +# True to generate only one drill file +mergeNPTH = False +drlwriter.SetOptions(mirror, minimalHeader, offset, mergeNPTH) + +metricFmt = True +drlwriter.SetFormat(metricFmt) + +genDrl = True +genMap = args.create_drill_map_file + +drlwriter.CreateDrillandMapFilesSet(pctl.GetPlotDirName(), genDrl, genMap) + +if args.protel_extensions: + os.rename(drlFile, basename + ".txt") + pass diff --git a/py/kicad_pcb_plot.py b/py/kicad_pcb_plot.py index ef62cb2..d6f123d 100755 --- a/py/kicad_pcb_plot.py +++ b/py/kicad_pcb_plot.py @@ -53,7 +53,8 @@ PLOT_FORMAT_GERBER import sys from pcbnew import * -filename=sys.argv[1] #e.g left-main/left-main.kicad_pcb + +filename = sys.argv[1] # e.g left-main/left-main.kicad_pcb board = LoadBoard(filename) @@ -64,8 +65,6 @@ popt = pctl.GetPlotOptions() # popt.SetOutputDirectory("plot/") popt.SetOutputDirectory(sys.argv[2]) - - # Set some important plot options: popt.SetPlotFrameRef(False) popt.SetLineWidth(FromMM(0.35)) @@ -102,16 +101,16 @@ pctl.PlotLayer() # param 0 is a string added to the file base name to identify the drawing # param 1 is the layer ID plot_plan = [ - ( "F.Cu", F_Cu, "Front layer" ), - ( "B.Cu", B_Cu, "Bottom layer" ), - ( "F.Paste", F_Paste, "Paste front" ), - ( "B.Paste", B_Paste, "Paste bottom" ), - ( "F.Silk", F_SilkS, "Silk front" ), - ( "B.Silk", B_SilkS, "Silk bottom" ), - ( "F.Mask", F_Mask, "Mask front" ), - ( "B.Mask", B_Mask, "Mask bottom" ), - ( "Edge.Cuts", Edge_Cuts, "Edges" ), - ( "Cmts.User", Cmts_User, "User comments" ), + ("F.Cu", F_Cu, "Front layer"), + ("B.Cu", B_Cu, "Bottom layer"), + ("F.Paste", F_Paste, "Paste front"), + ("B.Paste", B_Paste, "Paste bottom"), + ("F.Silk", F_SilkS, "Silk front"), + ("B.Silk", B_SilkS, "Silk bottom"), + ("F.Mask", F_Mask, "Mask front"), + ("B.Mask", B_Mask, "Mask bottom"), + ("Edge.Cuts", Edge_Cuts, "Edges"), + ("Cmts.User", Cmts_User, "User comments"), ] for layer_info in plot_plan: @@ -180,7 +179,7 @@ pctl.SetLayer(Cmts_User) pctl.PlotLayer() # Bottom mask as lines only, in red -#popt.SetMode(LINE) +# popt.SetMode(LINE) popt.SetColor(RED) pctl.SetLayer(B_Mask) pctl.PlotLayer() @@ -192,7 +191,7 @@ pctl.PlotLayer() # Top paste in light blue, filled popt.SetColor(BLUE) -#popt.SetMode(FILLED) +# popt.SetMode(FILLED) pctl.SetLayer(F_Paste) pctl.PlotLayer() @@ -229,7 +228,7 @@ popt.SetReferenceColor(19) popt.SetValueColor(21) popt.SetColor(0) -#popt.SetMode(LINE) +# popt.SetMode(LINE) pctl.SetLayer(B_SilkS) pctl.PlotLayer() popt.SetColor(14) @@ -258,7 +257,7 @@ pctl.PlotLayer() # better anyway... popt.SetColor(17) -#popt.SetMode(FILLED) +# popt.SetMode(FILLED) popt.SetDrillMarksType(PCB_PLOT_PARAMS.FULL_DRILL_SHAPE) pctl.SetLayer(B_Cu) pctl.PlotLayer() |