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author | Trygve Laugstøl <trygvis@inamo.no> | 2017-12-08 20:52:02 +0100 |
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committer | Trygve Laugstøl <trygvis@inamo.no> | 2017-12-08 20:52:02 +0100 |
commit | 6cd194703674268b313918b590f2bc483c641efa (patch) | |
tree | 1b504f96497280e50f8e5bb6530d46ce570a2047 /test | |
parent | efe5d835eaa26d8696c3352c4e1ed42da16fe27b (diff) | |
download | ee-python-6cd194703674268b313918b590f2bc483c641efa.tar.gz ee-python-6cd194703674268b313918b590f2bc483c641efa.tar.bz2 ee-python-6cd194703674268b313918b590f2bc483c641efa.tar.xz ee-python-6cd194703674268b313918b590f2bc483c641efa.zip |
o Parsing pads and stuff.
Diffstat (limited to 'test')
-rw-r--r-- | test/kicad_pcb/parser-1.kicad_pcb | 20 | ||||
-rw-r--r-- | test/test_parse_pcb.py | 9 |
2 files changed, 18 insertions, 11 deletions
diff --git a/test/kicad_pcb/parser-1.kicad_pcb b/test/kicad_pcb/parser-1.kicad_pcb index 9aa6ab4..99f5d33 100644 --- a/test/kicad_pcb/parser-1.kicad_pcb +++ b/test/kicad_pcb/parser-1.kicad_pcb @@ -2,8 +2,8 @@ (general (links 5) - (no_connects 1) - (area 139.649999 101.549999 152.450001 109.270001) + (no_connects 0) + (area 137.492381 96.36 152.55 110.085) (thickness 1.6) (drawings 5) (tracks 14) @@ -58,8 +58,8 @@ (mod_edge_width 0.15) (mod_text_size 1 1) (mod_text_width 0.15) - (pad_size 1.524 1.524) - (pad_drill 0.762) + (pad_size 0.8 0.75) + (pad_drill 0) (pad_to_mask_clearance 0.2) (aux_axis_origin 0 0) (visible_elements FFFFFF7F) @@ -107,16 +107,16 @@ (add_net "Net-(J1-Pad2)") ) - (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A29152D) - (at 149.86 106.68 180) + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5A2A3416) (tstamp 5A29152D) + (at 149.86 106.68 180.1) (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") (tags "capacitor 0603") (path /5A2915AE) (attr smd) - (fp_text reference C1 (at 0 -1.5 180) (layer F.SilkS) + (fp_text reference C1 (at 0 -1.5 180.1) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value C (at 0 1.5 180) (layer F.Fab) + (fp_text value C (at 0 1.5 180.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) @@ -129,10 +129,10 @@ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 180) (layer F.Fab) + (fp_text user %R (at 0 0 180.1) (layer F.Fab) (effects (font (size 0.3 0.3) (thickness 0.075))) ) - (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (pad 2 smd rect (at 0.75 0 180.1) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) (net 3 GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) (net 1 "Net-(C1-Pad1)")) diff --git a/test/test_parse_pcb.py b/test/test_parse_pcb.py index 9592b92..3199a78 100644 --- a/test/test_parse_pcb.py +++ b/test/test_parse_pcb.py @@ -12,4 +12,11 @@ def test_parsing(): del kicad_pcb.modules print(str(kicad_pcb)) for m in modules: - print(m) + pads = m.pads + del m.pads + print(" {}".format(m)) + for p in pads: + print(" {}".format(p)) + + assert len(modules) == 4 + assert len(pads) == 2 |