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author | Trygve Laugstøl <trygvis@inamo.no> | 2018-08-23 17:08:59 +0200 |
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committer | Trygve Laugstøl <trygvis@inamo.no> | 2018-08-23 17:12:21 +0200 |
commit | 3061ecca3d0fdfb87dabbf5f63c9e06c2a30f53a (patch) | |
tree | ab49cc16ed0b853452c5c2ed2d3042416d628986 /thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/CMSIS/nrf51/port_cmsis.c | |
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Diffstat (limited to 'thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/CMSIS/nrf51/port_cmsis.c')
-rw-r--r-- | thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/CMSIS/nrf51/port_cmsis.c | 243 |
1 files changed, 243 insertions, 0 deletions
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/CMSIS/nrf51/port_cmsis.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/CMSIS/nrf51/port_cmsis.c new file mode 100644 index 0000000..d6d209f --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/CMSIS/nrf51/port_cmsis.c @@ -0,0 +1,243 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the ARM CM0 port. + *----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#ifdef SOFTDEVICE_PRESENT +#include "nrf_soc.h" +#endif + +/* Make sure that all elements in isr state fits in uint32_t element*/ +#include "portmacro_cmsis.h" +STATIC_ASSERT(sizeof(portISRState_t) == sizeof(uint32_t)); + +/* Constants used for assertion check of the selected CPU */ +#define portCORTEX_M0_r0p0_ID ( 0x410CC200UL ) + +/* Constants required to check the validity of an interrupt priority. */ +#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) +#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) +#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) + +/* Constants required to set up the initial stack. */ +#define portINITIAL_XPSR (((xPSR_Type){.b.T = 1}).w) +#define portINITIAL_EXEC_RETURN ( 0xfffffffd ) + +/* Let the user override the pre-loading of the initial LR with the address of +prvTaskExitError() in case is messes up unwinding of the stack in the +debugger. */ +#ifdef configTASK_RETURN_ADDRESS + #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS +#else + #define portTASK_RETURN_ADDRESS prvTaskExitError +#endif + +/* Each task maintains its own interrupt status in the critical nesting +variable. */ +static UBaseType_t uxCriticalNesting = 0; + +#ifdef SOFTDEVICE_PRESENT +/* Flag that is set when yielding should be done after critical section exiting */ +static UBaseType_t uxYieldFlag = 0; +#endif + +/* + * Setup the timer to generate the tick interrupts. The implementation in this + * file is weak to allow application writers to change the timer used to + * generate the tick interrupt. + */ +extern void vPortSetupTimerInterrupt( void ); + +/* + * Exception handlers. + */ +void xPortSysTickHandler( void ); + +/* + * Start first task is a separate function so it can be tested in isolation. + */ +extern void vPortStartFirstTask( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + + +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* Simulate the stack frame as it would be created by a context switch + interrupt. */ + + /* Offset added to account for the way the MCU uses the stack on entry/exit + of interrupts, and to ensure alignment. */ + pxTopOfStack--; + + *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxCode; /* PC */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */ + + /* Save code space by skipping register initialisation. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + + pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +static void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + its caller as there is nothing to return to. If a task wants to exit it + should instead call vTaskDelete( NULL ). + + Artificially force an assert() to be triggered if configASSERT() is + defined, then stop here so application writers can catch the error. */ + configASSERT( uxCriticalNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + for ( ;; ); +} + + +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +BaseType_t xPortStartScheduler( void ) +{ + /* This port can be used only on Cortex-M0 processor */ + configASSERT( SCB->CPUID == portCORTEX_M0_r0p0_ID ); + + /* Make PendSV the lowest priority interrupts. */ + NVIC_SetPriority(PendSV_IRQn, configKERNEL_INTERRUPT_PRIORITY); + + /* Start the timer that generates the tick ISR. Interrupts are disabled + here already. */ + vPortSetupTimerInterrupt(); + + /* Initialise the critical nesting count ready for the first task. */ + uxCriticalNesting = 0; + + /* Finally this port requires SEVONPEND to be active */ + SCB->SCR |= SCB_SCR_SEVONPEND_Msk; + + /* Start the first task. */ + vPortStartFirstTask(); + + /* Should never get here as the tasks will now be executing! Call the task + exit error function to prevent compiler warnings about a static function + not being called in the case that the application writer overrides this + functionality by defining configTASK_RETURN_ADDRESS. */ + prvTaskExitError(); + + /* Should not get here! */ + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented in ports where there is nothing to return to. + Artificially force an assert. */ + configASSERT( uxCriticalNesting == 1000UL ); +} +/*-----------------------------------------------------------*/ + +void vPortTaskYield( void ) +{ +#ifdef SOFTDEVICE_PRESENT + if (uxCriticalNesting > 0) + { + uxYieldFlag = 1; + } + else + { + portPendSVSchedule(); + } +#else + portPendSVSchedule(); +#endif +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + + /* This is not the interrupt safe version of the enter critical function so + assert() if it is being called from an interrupt context. Only API + functions that end in "FromISR" can be used in an interrupt. Only assert if + the critical nesting count is 1 to protect against recursive calls if the + assert function also uses a critical section. */ + if ( uxCriticalNesting == 1 ) + { + configASSERT( ( SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk ) == 0 ); + } +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + if ( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); +#ifdef SOFTDEVICE_PRESENT + if (uxYieldFlag) + { + uxYieldFlag = 0; + portPendSVSchedule(); + } +#endif + } +} +/*-----------------------------------------------------------*/ + +void vPortSafeTaskSwitchContext( void ) +{ + uint32_t isrstate = portSET_INTERRUPT_MASK_FROM_ISR(); + vTaskSwitchContext(); + portCLEAR_INTERRUPT_MASK_FROM_ISR(isrstate); +} |