o Initial import.HEADmaster

5 files changed, 680 insertions, 0 deletions

diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_gpio.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_gpio.c
new file mode 100644
index 0000000..d4243d8
--- /dev/null
+++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_gpio.c
@@ -0,0 +1,97 @@
+/**
+* \copyright
+* Copyright (c) 2018, Infineon Technologies AG
+* All rights reserved.
+*
+* This software is provided with terms and conditions as specified in OPTIGA(TM) Trust X Evaluation Kit License Agreement.
+* \endcopyright
+*
+* \author Infineon AG
+*
+* \file
+*
+* \brief This file implements the platform abstraction layer APIs for gpio.
+*
+* \addtogroup  grPAL
+* @{
+*/
+
+
+/**********************************************************************************************************************
+ * HEADER FILES
+ *********************************************************************************************************************/
+#include "pal_gpio.h"
+#include "nrf_gpio.h"
+#include "pal_ifx_i2c_config.h"
+
+/**********************************************************************************************************************
+ * MACROS
+ *********************************************************************************************************************/
+ 
+/**********************************************************************************************************************
+ * LOCAL DATA
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ * LOCAL ROUTINES
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ * API IMPLEMENTATION
+ *********************************************************************************************************************/
+
+void pal_gpio_init()
+{
+    // Init power pins
+    nrf_gpio_cfg_output(19);
+    nrf_gpio_cfg_output(20);
+
+    // Set power pins to enable power
+    nrf_gpio_pin_clear(19); // Enable power for the *on-board* Trust X device
+    nrf_gpio_pin_set(20);   // Disable power for *external* Trust X device inside the 2GO slot
+
+    // Init reset pin
+    nrf_gpio_cfg_output((uint32_t)(optiga_reset_0.p_gpio_hw));
+}
+
+/**
+* Sets the GPIO pin to high state
+* 
+* <b>API Details:</b>
+*      The API sets the pin high, only if the pin is assigned to a valid gpio context.<br>
+*      Otherwise the API returns without any failure status.<br>
+*
+*\param[in] p_gpio_context Pointer to pal layer gpio context
+*
+*
+*/
+void pal_gpio_set_high(const pal_gpio_t* p_gpio_context)
+{
+    if (p_gpio_context != NULL && p_gpio_context->p_gpio_hw != NULL)
+    {
+        nrf_gpio_pin_set((uint32_t)(p_gpio_context->p_gpio_hw));
+    }
+}
+
+/**
+* Sets the gpio pin to low state
+*
+* <b>API Details:</b>
+*      The API set the pin low, only if the pin is assigned to a valid gpio context.<br>
+*      Otherwise the API returns without any failure status.<br>
+* 
+*\param[in] p_gpio_context Pointer to pal layer gpio context
+*
+*/
+void pal_gpio_set_low(const pal_gpio_t* p_gpio_context)
+{
+    if (p_gpio_context != NULL && p_gpio_context->p_gpio_hw != NULL)
+    {
+        nrf_gpio_pin_clear((uint32_t)(p_gpio_context->p_gpio_hw));
+    }
+}
+
+/**
+* @}
+*/
+
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_i2c.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_i2c.c
new file mode 100644
index 0000000..24897ba
--- /dev/null
+++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_i2c.c
@@ -0,0 +1,314 @@
+/**
+* \copyright
+* Copyright(c) 2018, Infineon Technologies AG
+* All rights reserved.
+*
+* This software is provided with terms and conditions as specified in OPTIGA(TM) Trust X Evaluation Kit License Agreement.
+* \endcopyright
+*
+* \author Infineon AG
+*
+* \file
+*
+* \brief This file implements the platform abstraction layer(pal) APIs for I2C.
+*
+* \addtogroup  grPAL
+* @{
+*/
+
+/**********************************************************************************************************************
+ * HEADER FILES
+ *********************************************************************************************************************/
+#include "pal_i2c.h"
+#include "ifx_i2c.h"
+#include "nrf_twi_mngr.h"
+
+/// @cond hidden
+
+/**********************************************************************************************************************
+ * MACROS
+ *********************************************************************************************************************/
+#define PAL_I2C_MASTER_MAX_BITRATE  (400)
+
+/** @brief PIN for I2C SCL to Infineon OPTIGA Trust X device */
+#define OPTIGA_PIN_I2C_SCL   (27)
+/** @brief PIN for I2C SDA to Infineon OPTIGA Trust X device */
+#define OPTIGA_PIN_I2C_SDA   (26)
+
+/** @brief I2C driver instance */
+#define TWI_INSTANCE_ID             0
+
+/** @brief Maximal number of pending I2C transactions */
+#define MAX_PENDING_TRANSACTIONS    5
+
+/*********************************************************************************************************************
+ * LOCAL DATA
+ *********************************************************************************************************************/
+
+/* Pointer to the current pal i2c context */
+static pal_i2c_t * gp_pal_i2c_current_ctx;
+
+/** @brief Definition of TWI manager instance */
+NRF_TWI_MNGR_DEF(m_app_twi, MAX_PENDING_TRANSACTIONS, TWI_INSTANCE_ID);
+
+/** @brief Definition of TWI manager transfer instance */
+static nrf_twi_mngr_transfer_t    m_transfer;
+
+/** @brief Definition of TWI manager transaction instance */
+static nrf_twi_mngr_transaction_t m_transaction;
+
+/**********************************************************************************************************************
+ * LOCAL ROUTINES
+ *********************************************************************************************************************/
+
+/**
+ * Pal I2C event handler function to invoke the registered upper layer callback<br>
+ *
+ *<b>API Details:</b>
+ *  - This function implements the platform specific i2c event handling mechanism<br>
+ *  - It calls the registered upper layer function after completion of the I2C read/write operations<br>
+ *  - The respective event status are explained below.
+ *   - #PAL_I2C_EVENT_ERROR when I2C fails due to low level failures(NACK/I2C protocol errors)
+ *   - #PAL_I2C_EVENT_SUCCESS when operation is successfully completed
+ *
+ * \param[in] p_pal_i2c_ctx   Pointer to the pal i2c context #pal_i2c_t
+ * \param[in] event           Status of the event reported after read/write completion or due to I2C errors
+ *
+ */
+static void app_twi_callback(ret_code_t result, void * p_user_data)
+{
+    app_event_handler_t upper_layer_handler;
+    //lint --e{611} suppress "void* function pointer is type casted to app_event_handler_t type"
+    upper_layer_handler = (app_event_handler_t)gp_pal_i2c_current_ctx->upper_layer_event_handler;
+
+    if (result == NRF_SUCCESS)
+    {
+        upper_layer_handler(gp_pal_i2c_current_ctx->upper_layer_ctx, PAL_I2C_EVENT_SUCCESS);
+    }
+    else
+    {
+        upper_layer_handler(gp_pal_i2c_current_ctx->upper_layer_ctx, PAL_I2C_EVENT_ERROR);
+    }
+}
+
+/// @endcond
+
+/**********************************************************************************************************************
+ * API IMPLEMENTATION
+ *********************************************************************************************************************/
+
+/**
+ * API to initialize the i2c master with the given context.
+ * <br>
+ *
+ *<b>API Details:</b>
+ * - The platform specific initialization of I2C master has to be implemented as part of this API, if required.<br>
+ * - If the target platform does not demand explicit initialization of i2c master
+ *   (Example: If the platform driver takes care of init after the reset), it would not be required to implement.<br>
+ * - The implementation must take care the following scenarios depending upon the target platform selected.
+ *   - The implementation must handle the acquiring and releasing of the I2C bus before initializing the I2C master to
+ *     avoid interrupting the ongoing slave I2C transactions using the same I2C master.
+ *   - If the I2C bus is in busy state, the API must not initialize and return #PAL_STATUS_I2C_BUSY status.
+ *   - Repeated initialization must be taken care with respect to the platform requirements. (Example: Multiple users/applications  
+ *     sharing the same I2C master resource)
+ *
+ *<b>User Input:</b><br>
+ * - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
+ *
+ * \param[in] p_i2c_context   Pal i2c context to be initialized
+ *
+ * \retval  #PAL_STATUS_SUCCESS  Returns when the I2C master init it successfull
+ * \retval  #PAL_STATUS_FAILURE  Returns when the I2C init fails.
+ */
+pal_status_t pal_i2c_init(const pal_i2c_t* p_i2c_context)
+{
+    nrf_drv_twi_config_t const config = {
+           .scl                = OPTIGA_PIN_I2C_SCL,
+           .sda                = OPTIGA_PIN_I2C_SDA,
+           .frequency          = (nrf_drv_twi_frequency_t) NRF_TWI_FREQ_400K,
+           .interrupt_priority = APP_IRQ_PRIORITY_LOWEST,
+           .clear_bus_init     = false
+        };
+
+    // Initialize I2C driver
+    if (nrf_twi_mngr_init(&m_app_twi, &config) != NRF_SUCCESS)
+    {
+        return PAL_STATUS_FAILURE;
+    }
+    return PAL_STATUS_SUCCESS;
+}
+
+/**
+ * API to de-initialize the I2C master with the specified context.
+ * <br>
+ *
+ *<b>API Details:</b>
+ * - The platform specific de-initialization of I2C master has to be implemented as part of this API, if required.<br>
+ * - If the target platform does not demand explicit de-initialization of i2c master
+ *   (Example: If the platform driver takes care of init after the reset), it would not be required to implement.<br>
+ * - The implementation must take care the following scenarios depending upon the target platform selected.
+ *   - The implementation must handle the acquiring and releasing of the I2C bus before de-initializing the I2C master to
+ *     avoid interrupting the ongoing slave I2C transactions using the same I2C master.
+ *   - If the I2C bus is in busy state, the API must not de-initialize and return #PAL_STATUS_I2C_BUSY status.
+ *   - This API must ensure that multiple users/applications sharing the same I2C master resource is not impacted.
+ *
+ *<b>User Input:</b><br>
+ * - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
+ *
+ * \param[in] p_i2c_context   I2C context to be de-initialized
+ *
+ * \retval  #PAL_STATUS_SUCCESS  Returns when the I2C master de-init it successfull
+ * \retval  #PAL_STATUS_FAILURE  Returns when the I2C de-init fails.
+ */
+pal_status_t pal_i2c_deinit(const pal_i2c_t* p_i2c_context)
+{
+    nrf_twi_mngr_uninit(&m_app_twi);
+    return PAL_STATUS_SUCCESS;
+}
+
+/**
+ * Platform abstraction layer API to write the data to I2C slave.
+ * <br>
+ * <br>
+ * \image html pal_i2c_write.png "pal_i2c_write()" width=20cm
+ *
+ *
+ *<b>API Details:</b>
+ * - The API attempts to write if the I2C bus is free, else it returns busy status #PAL_STATUS_I2C_BUSY<br>
+ * - The bus is released only after the completion of transmission or after completion of error handling.<br>
+ * - The API invokes the upper layer handler with the respective event status as explained below.
+ *   - #PAL_I2C_EVENT_BUSY when I2C bus in busy state
+ *   - #PAL_I2C_EVENT_ERROR when API fails
+ *   - #PAL_I2C_EVENT_SUCCESS when operation is successfully completed asynchronously
+ *<br>
+ *
+ *<b>User Input:</b><br>
+ * - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
+ * - The upper_layer_event_handler must be initialized in the p_i2c_context before invoking the API.<br>
+ *
+ *<b>Notes:</b><br> 
+ *  - Otherwise the below implementation has to be updated to handle different bitrates based on the input context.<br>
+ *  - The caller of this API must take care of the guard time based on the slave's requirement.<br>
+ *
+ * \param[in] p_i2c_context  Pointer to the pal I2C context #pal_i2c_t
+ * \param[in] p_data         Pointer to the data to be written
+ * \param[in] length         Length of the data to be written
+ *
+ * \retval  #PAL_STATUS_SUCCESS  Returns when the I2C write is invoked successfully
+ * \retval  #PAL_STATUS_FAILURE  Returns when the I2C write fails.
+ * \retval  #PAL_STATUS_I2C_BUSY Returns when the I2C bus is busy. 
+ */
+pal_status_t pal_i2c_write(pal_i2c_t* p_i2c_context,uint8_t* p_data , uint16_t length)
+{
+    gp_pal_i2c_current_ctx = p_i2c_context;
+
+    m_transfer.p_data    = p_data;
+    m_transfer.length    = length;
+    m_transfer.operation = NRF_TWI_MNGR_WRITE_OP(IFX_I2C_BASE_ADDR);
+    m_transfer.flags     = 0;
+
+    m_transaction.callback            = app_twi_callback;
+    m_transaction.number_of_transfers = 1;
+    m_transaction.p_required_twi_cfg  = NULL;
+    m_transaction.p_transfers         = &m_transfer;
+    m_transaction.p_user_data         = (void*) PAL_STATUS_SUCCESS;
+
+    if (nrf_twi_mngr_schedule(&m_app_twi, &m_transaction) != NRF_SUCCESS)
+    {
+        app_twi_callback(NRF_ERROR_BUSY, 0);
+    }
+
+    return PAL_STATUS_SUCCESS;
+}
+
+/**
+ * Platform abstraction layer API to read the data from I2C slave.
+ * <br>
+ * <br>
+ * \image html pal_i2c_read.png "pal_i2c_read()" width=20cm
+ *
+ *<b>API Details:</b>
+ * - The API attempts to read if the I2C bus is free, else it returns busy status #PAL_STATUS_I2C_BUSY<br>
+ * - The bus is released only after the completion of reception or after completion of error handling.<br>
+ * - The API invokes the upper layer handler with the respective event status as explained below.
+ *   - #PAL_I2C_EVENT_BUSY when I2C bus in busy state
+ *   - #PAL_I2C_EVENT_ERROR when API fails
+ *   - #PAL_I2C_EVENT_SUCCESS when operation is successfully completed asynchronously
+ *<br>
+ *
+ *<b>User Input:</b><br>
+ * - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
+ * - The upper_layer_event_handler must be initialized in the p_i2c_context before invoking the API.<br>
+ *
+ *<b>Notes:</b><br> 
+ *  - Otherwise the below implementation has to be updated to handle different bitrates based on the input context.<br>
+ *  - The caller of this API must take care of the guard time based on the slave's requirement.<br>
+ *
+ * \param[in]  p_i2c_context  pointer to the PAL i2c context #pal_i2c_t
+ * \param[in]  p_data         Pointer to the data buffer to store the read data
+ * \param[in]  length         Length of the data to be read
+ *
+ * \retval  #PAL_STATUS_SUCCESS  Returns when the I2C read is invoked successfully
+ * \retval  #PAL_STATUS_FAILURE  Returns when the I2C read fails.
+ * \retval  #PAL_STATUS_I2C_BUSY Returns when the I2C bus is busy.
+ */
+pal_status_t pal_i2c_read(pal_i2c_t* p_i2c_context , uint8_t* p_data , uint16_t length)
+{
+    gp_pal_i2c_current_ctx = p_i2c_context;
+
+    m_transfer.p_data    = p_data;
+    m_transfer.length    = length;
+    m_transfer.operation = NRF_TWI_MNGR_READ_OP(IFX_I2C_BASE_ADDR);
+    m_transfer.flags     = 0;
+
+    m_transaction.callback            = app_twi_callback;
+    m_transaction.number_of_transfers = 1;
+    m_transaction.p_required_twi_cfg  = 0;
+    m_transaction.p_transfers         = &m_transfer;
+    m_transaction.p_user_data         = (void*) PAL_STATUS_SUCCESS;
+
+    if (nrf_twi_mngr_schedule(&m_app_twi, &m_transaction) != NRF_SUCCESS)
+    {
+        app_twi_callback(NRF_ERROR_BUSY, 0);
+    }
+
+    return PAL_STATUS_SUCCESS;
+}
+   
+/**
+ * Platform abstraction layer API to set the bitrate/speed(KHz) of I2C master.
+ * <br>
+ *
+ *<b>API Details:</b>
+ * - Sets the bitrate of I2C master if the I2C bus is free, else it returns busy status #PAL_STATUS_I2C_BUSY<br>
+ * - The bus is released after the setting the bitrate.<br>
+ * - This API must take care of setting the bitrate to I2C master's maximum supported value. 
+ * - Eg. In XMC4500, the maximum supported bitrate is 400 KHz. If the supplied bitrate is greater than 400KHz, the API will 
+ *   set the I2C master's bitrate to 400KHz.
+ * - Use the #PAL_I2C_MASTER_MAX_BITRATE macro to specify the maximum supported bitrate value for the target platform.
+ * - If upper_layer_event_handler is initialized, the upper layer handler is invoked with the respective event 
+ *   status listed below.
+ *   - #PAL_I2C_EVENT_BUSY when I2C bus in busy state
+ *   - #PAL_I2C_EVENT_ERROR when API fails to set the bit rate 
+ *   - #PAL_I2C_EVENT_SUCCESS when operation is successful
+ *<br>
+ *
+ *<b>User Input:</b><br>
+ * - The input #pal_i2c_t  p_i2c_context must not be NULL.<br>
+ *
+ * \param[in] p_i2c_context  Pointer to the pal i2c context
+ * \param[in] bitrate        Bitrate to be used by i2c master in KHz
+ *
+ * \retval  #PAL_STATUS_SUCCESS  Returns when the setting of bitrate is successfully completed
+ * \retval  #PAL_STATUS_FAILURE  Returns when the setting of bitrate fails.
+ * \retval  #PAL_STATUS_I2C_BUSY Returns when the I2C bus is busy.
+ */
+pal_status_t pal_i2c_set_bitrate(const pal_i2c_t* p_i2c_context , uint16_t bitrate)
+{
+    // Bitrate is fixed to the maximum frequency on this platform (400K)
+    return PAL_STATUS_SUCCESS;
+}
+
+/**
+* @}
+*/
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_ifx_i2c_config.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_ifx_i2c_config.c
new file mode 100644
index 0000000..bb4b51f
--- /dev/null
+++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_ifx_i2c_config.c
@@ -0,0 +1,71 @@
+/**
+* \copyright
+* Copyright(c) 2018, Infineon Technologies AG
+* All rights reserved.
+*
+* This software is provided with terms and conditions as specified in OPTIGA(RM) Trust X Evaluation Kit License Agreement.
+* \endcopyright
+*
+* \author Infineon AG
+*
+* \file
+*
+* \brief This file implements platform abstraction layer configurations for ifx i2c protocol.
+*
+* \addtogroup  grPAL
+* @{
+*/
+
+/**********************************************************************************************************************
+ * HEADER FILES
+ *********************************************************************************************************************/
+#include "stdlib.h"
+#include "stdio.h"
+#include "pal_gpio.h"
+#include "pal_i2c.h"
+#include "ifx_i2c_config.h"
+
+/*********************************************************************************************************************
+ * pal ifx i2c instance
+ *********************************************************************************************************************/
+/**
+ * \brief PAL I2C configuration for OPTIGA. 
+ */
+pal_i2c_t optiga_pal_i2c_context_0 =
+{
+    /// Pointer to I2C master platform specific context
+    NULL,
+    /// Slave address
+    IFX_I2C_BASE_ADDR,
+    /// Upper layer context
+    NULL,
+    /// Callback event handler
+    NULL
+};
+
+/*********************************************************************************************************************
+ * PAL GPIO configurations defined for XMC4500
+ *********************************************************************************************************************/
+/**
+* \brief PAL vdd pin configuration for OPTIGA. 
+ */
+pal_gpio_t optiga_vdd_0 =
+{
+    // Platform specific GPIO context for the pin used to toggle Vdd.
+    (void*)NULL
+};
+
+/**
+ * \brief PAL reset pin configuration for OPTIGA.
+ */
+pal_gpio_t optiga_reset_0 =
+{
+    // Platform specific GPIO context for the pin used to toggle Reset.
+    (void*)18
+};
+
+
+/**
+* @}
+*/
+
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_os_event.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_os_event.c
new file mode 100644
index 0000000..809c2bd
--- /dev/null
+++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_os_event.c
@@ -0,0 +1,127 @@
+/**
+* \copyright
+* Copyright(c) 2018, Infineon Technologies AG
+* All rights reserved.
+*
+* This software is provided with terms and conditions as specified in OPTIGA(TM) Trust X Evaluation Kit License Agreement.
+* \endcopyright
+*
+* \author Infineon AG
+*
+* \file
+*
+* \brief This file implements the platform abstraction layer APIs for os event/scheduler.
+*
+* \addtogroup  grPAL
+* @{
+*/
+
+/**********************************************************************************************************************
+ * HEADER FILES
+ *********************************************************************************************************************/
+#include "stdlib.h"
+#include "stdio.h"
+#include "pal_os_event.h"
+#include "nrf_rtc.h"
+#include "nrf_drv_rtc.h"
+
+/**********************************************************************************************************************
+ * MACROS
+ *********************************************************************************************************************/
+
+/*********************************************************************************************************************
+ * LOCAL DATA
+ *********************************************************************************************************************/
+/// @cond hidden 
+/// Callback function when timer elapses
+static volatile register_callback callback_registered = NULL;
+/// Pointer to store upper layer callback context (For example: Ifx i2c context)
+static void * callback_ctx;
+
+const nrf_drv_rtc_t rtc2 = NRF_DRV_RTC_INSTANCE(2);
+static nrf_drv_rtc_config_t m_rtc2_config = NRF_DRV_RTC_DEFAULT_CONFIG;
+
+// Tick count for pal_os_timer
+volatile uint32_t g_tick_count = 0;
+
+/**
+*  Timer callback handler. 
+*
+*  This get called from the TIMER elapse event.<br>
+*  Once the timer expires, the registered callback funtion gets called from the timer event handler, if
+*  the call back is not NULL.<br>
+*
+*\param[in] args Callback argument
+*
+*/
+static void ifx_rtc_handler(nrf_drv_rtc_int_type_t int_type)
+{
+    volatile register_callback callback;
+
+    if (int_type == NRF_DRV_RTC_INT_TICK)
+    {
+        g_tick_count++;
+    }
+
+    if (int_type == NRF_DRV_RTC_INT_COMPARE0)
+    {
+        nrf_drv_rtc_cc_disable(&rtc2, 0);
+
+        if (callback_registered != NULL)
+        {
+            callback = callback_registered;
+            callback_registered = NULL;
+            callback(callback_ctx);
+        }
+    }
+}
+
+/// @endcond
+
+void pal_os_event_init()
+{
+    // Initialize the RTC2 driver instance
+    APP_ERROR_CHECK(nrf_drv_rtc_init(&rtc2, &m_rtc2_config, ifx_rtc_handler));
+
+    // Set the prescaler to approximately get 1 ms intervals
+    m_rtc2_config.prescaler = 31;
+
+    // Enable tick event and interrupt
+    nrf_drv_rtc_tick_enable(&rtc2, true);
+
+    // Power on RTC instance
+    nrf_drv_rtc_enable(&rtc2);
+}
+
+/**
+* Platform specific event call back registration function to trigger once when timer expires.
+* <br>
+*
+* <b>API Details:</b>
+*         This function registers the callback function supplied by the caller.<br>
+*         It triggers a timer with the supplied time interval in microseconds.<br>
+*         Once the timer expires, the registered callback function gets called.<br>
+* 
+* \param[in] callback              Callback function pointer
+* \param[in] callback_args         Callback arguments
+* \param[in] time_us               time in micro seconds to trigger the call back
+*
+*/
+void pal_os_event_register_callback_oneshot(register_callback callback, 
+                                            void* callback_args, 
+                                            uint32_t time_us)
+{
+    callback_registered = callback;
+    callback_ctx = callback_args;
+
+    // Clear the counter
+    nrf_drv_rtc_counter_clear(&rtc2);
+
+    // Set the compare register to trigger approximately at time_us
+    APP_ERROR_CHECK(nrf_drv_rtc_cc_set(&rtc2, 0, (time_us / 1024) + 1 , true));
+}
+
+/**
+* @}
+*/
+
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_os_timer.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_os_timer.c
new file mode 100644
index 0000000..da2deba
--- /dev/null
+++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/infineon/pal/nrf5x/pal_os_timer.c
@@ -0,0 +1,71 @@
+/**
+* \copyright
+* Copyright (c) 2018, Infineon Technologies AG
+* All rights reserved.
+*
+* This software is provided with terms and conditions as specified in OPTIGA(TM) Trust X Evaluation Kit License Agreement.
+* \endcopyright
+*
+* \author Infineon AG
+*
+* \file
+*
+* \brief This file implements the platform abstraction layer APIs for timer.
+*
+* \addtogroup  grPAL
+* @{
+*/
+
+/**********************************************************************************************************************
+ * HEADER FILES
+ *********************************************************************************************************************/
+#include "pal_os_timer.h"
+#include "nrf_delay.h"
+#include "nrf_rtc.h"
+#include "nrf_drv_rtc.h"
+
+/**********************************************************************************************************************
+ * MACROS
+ *********************************************************************************************************************/
+ 
+/// @cond hidden 
+/*********************************************************************************************************************
+ * LOCAL DATA
+ *********************************************************************************************************************/
+// Defined in pal_os_event.c
+extern volatile uint32_t g_tick_count;
+
+/**********************************************************************************************************************
+ * LOCAL ROUTINES
+ *********************************************************************************************************************/
+/// @endcond
+
+/**********************************************************************************************************************
+ * API IMPLEMENTATION
+ *********************************************************************************************************************/
+/**
+* Get the current time in milliseconds<br>
+*
+*
+* \retval  uint32_t time in milliseconds
+*/
+uint32_t pal_os_timer_get_time_in_milliseconds(void)
+{
+    return (g_tick_count);
+}
+
+/**
+* Function to wait or delay until the given milliseconds time
+* 
+* \param[in] milliseconds Delay value in milliseconds
+*
+*/
+void pal_os_timer_delay_in_milliseconds(uint16_t milliseconds)
+{
+    nrf_delay_ms(milliseconds);
+}
+
+/**
+* @}
+*/
+