diff options
Diffstat (limited to 'thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader')
50 files changed, 18212 insertions, 0 deletions
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ant_boot_settings_api.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ant_boot_settings_api.c new file mode 100644 index 0000000..88c2a2f --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ant_boot_settings_api.c @@ -0,0 +1,161 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#include <stdint.h> +#include <string.h> + +#include "ant_interface.h" +#include "ant_parameters.h" +#include "nrf_sdh_soc.h" + + +#include "bootloader_types.h" +#include "ant_boot_settings_api.h" + + /**< This variable reserves a codepage for bootloader specific settings, to ensure the compiler doesn't locate any code or variables at his location. */ +#if defined ( __CC_ARM ) +uint8_t m_ant_boot_settings[ANT_BOOT_SETTINGS_SIZE] __attribute__((at(ANT_BOOT_SETTINGS_LOCATION))); +#else +uint8_t m_ant_boot_settings[ANT_BOOT_SETTINGS_SIZE] __attribute__((section (".ant_boot_settings"))) __attribute__((used)); +#endif + +volatile uint8_t mb_flash_busy = false; +/* + * sd_flash_page_erase() and sd_flash_write() generates an event at SD_EVT_IRQHandler + * Please include run this function inside SD_EVT_IRQHandler + * + */ +void ant_boot_settings_sys_event_handler(uint32_t sys_evt, void * p_context) +{ + if ((sys_evt == NRF_EVT_FLASH_OPERATION_SUCCESS) || (sys_evt == NRF_EVT_FLASH_OPERATION_ERROR)) + { + mb_flash_busy = false; + } +} + +NRF_SDH_SOC_OBSERVER(m_soc_evt_observer, 0, ant_boot_settings_sys_event_handler, NULL); + +uint32_t ant_boot_settings_save(ant_boot_settings_t * boot_settings) +{ + ret_code_t err_code = NRF_SUCCESS; + + mb_flash_busy = true; + err_code = sd_flash_write((uint32_t *) ANT_BOOT_SETTINGS_LOCATION, + (uint32_t*)boot_settings, + ANT_BOOT_SETTINGS_SIZE / 4); + if (err_code == NRF_SUCCESS) + { + while (mb_flash_busy); // wait until it is done + } + else + { + return err_code; + } + + return err_code; +} + +uint32_t ant_boot_settings_clear(ant_boot_settings_t * boot_settings) +{ + ret_code_t err_code = NRF_SUCCESS; + + // Clears \ presets the bootloader_settings memory + memset(boot_settings, 0xFF, sizeof(ant_boot_settings_t)); + + // Erases entire bootloader_settings in flash + mb_flash_busy = true; + err_code = sd_flash_page_erase(FLASH_LAST_PAGE); // last flash page + if (err_code == NRF_SUCCESS) + { + while (mb_flash_busy); // wait until it is done + } + else + { + return err_code; + } + + return err_code; +} + +void ant_boot_settings_get(const ant_boot_settings_t ** pp_boot_settings) +{ + // Read only pointer to antfs boot settings in flash. + static ant_boot_settings_t const * const p_boot_settings = + (ant_boot_settings_t *)&m_ant_boot_settings[0]; + + *pp_boot_settings = p_boot_settings; +} + +void ant_boot_settings_validate(bool enter_boot_mode) +{ + ret_code_t err_code = NRF_SUCCESS; + uint32_t param_flags; + + if (enter_boot_mode) + { + param_flags = 0xFFFFFFFC; + } + else + { + param_flags = 0xFFFFFFFE; + } + + mb_flash_busy = true; + err_code = sd_flash_write((uint32_t *) ANT_BOOT_PARAM_FLAGS_BASE , + (uint32_t *) ¶m_flags, + 1); + if (err_code == NRF_SUCCESS) + { + while (mb_flash_busy); // wait until it is done + } +} + + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/antfs_ota.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/antfs_ota.c new file mode 100644 index 0000000..a7d25f8 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/antfs_ota.c @@ -0,0 +1,196 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#include <stdint.h> +#include <string.h> + +#include "crc.h" +#include "ant_interface.h" // ant stack softdevice access +#include "ant_boot_settings.h" +#include "antfs.h" +#include "antfs_ota.h" +#include "app_error.h" + +#include <dfu_types.h> // + +#include "version.c" + +#define HEADER_CRC_SEED 0 + +static const uint8_t identifier_string[4] = {".SUF"}; + +static uint8_t m_ota_image_header_size; +static uint8_t m_ota_image_header_count = 0; +static uint8_t m_ota_image_header[OTA_IMAGE_HEADER_SIZE_MAX]; +static const ota_image_header_t * mp_ota_image_header = (ota_image_header_t * )&m_ota_image_header[0]; + +static uint8_t m_ota_update_info_file[OTA_UPDATE_INFO_FILE_SIZE]; + +void antfs_ota_init (void) +{ + m_ota_image_header_size = 0; + m_ota_image_header_count = 0; +} + +/**/ + +static void antfs_ota_update_information_file_update(void) +{ + uint32_t u32_temp, err_code; + + m_ota_update_info_file[OTA_INFO_FILE_STRUCTURE_VERSION_OFFSET] = OTA_INFO_FILE_STRUCTURE_VERSION; /* File Structure Version */ + m_ota_update_info_file[OTA_INFO_HARDWARE_VERSION_OFFSET] = OTA_INFO_HARDWARE_VERSION; /* Hardware Version */ + m_ota_update_info_file[OTA_INFO_REGION_PRODUCT_ID_OFFSET] = OTA_INFO_REGION_PRODUCT_ID; /* Region/Product Identifier*/ + + u32_temp = DFU_IMAGE_MAX_SIZE_FULL; /* Maximum swap space */ + (void)uint32_encode(u32_temp, &m_ota_update_info_file[OTA_INFO_MAXIMUM_SWAP_SPACE_OFFSET]); + + u32_temp = OTA_INFO_WIRELESS_STACK_VERSION_ID; + (void)uint32_encode(u32_temp, &m_ota_update_info_file[OTA_INFO_WIRELESS_STACK_VERSION_ID_OFFSET]); /* Wireless Protocol Stack Version Identifier*/ + + m_ota_update_info_file[OTA_INFO_WIRELESS_STACK_VERSION_LENGTH_OFFSET] = OTA_INFO_WIRELESS_STACK_VERSION_STRING_BYTES; /* Wireless Protocol Stack Version String Length*/ + + err_code = sd_ant_version_get(&m_ota_update_info_file[OTA_INFO_WIRELESS_STACK_VERSION_STRING_OFFSET]); /* Wireless Protocol Stack Version String*/ + APP_ERROR_CHECK(err_code); + + u32_temp = OTA_INFO_BOOTLOADER_VERSION_ID; + (void)uint32_encode(u32_temp, &m_ota_update_info_file[OTA_INFO_BOOTLOADER_VERSION_ID_OFFSET]); /* Bootloader Version Identifier*/ + + m_ota_update_info_file[OTA_INFO_BOOTLOADER_VERSION_LENGTH_OFFSET] = OTA_INFO_BOOTLOADER_VERSION_STRING_BYTES; /* Bootloader Version String Length*/ + + memcpy(&m_ota_update_info_file[OTA_INFO_BOOTLOADER_VERSION_STRING_OFFSET], /* Bootloader Version String*/ + ac_bootloader_version, + sizeof(ac_bootloader_version)); + + u32_temp = OTA_INFO_APPLICATION_VERSION_ID; + (void)uint32_encode(u32_temp, &m_ota_update_info_file[OTA_INFO_APPLICATION_VERSION_ID_OFFSET]); /* Application Version Identifier*/ + + m_ota_update_info_file[OTA_INFO_APPLICATION_VERSION_LENGTH_OFFSET] = OTA_INFO_APPLICATION_VERSION_STRING_BYTES; /* Application Version String Length*/ + + memcpy(&m_ota_update_info_file[OTA_INFO_APPLICATION_VERSION_STRING_OFFSET], /* Application Version String*/ + ANT_BOOT_APP_VERSION, + OTA_INFO_APPLICATION_VERSION_STRING_BYTES); +} + +void antfs_ota_update_information_file_get (uint32_t * p_length, uint8_t ** pp_data) +{ + static bool ota_info_file_prepared = false; + + if (!ota_info_file_prepared) + { + antfs_ota_update_information_file_update(); + } + + *pp_data = m_ota_update_info_file; + *p_length = OTA_UPDATE_INFO_FILE_SIZE; +} + +bool antfs_ota_image_header_parsing(uint8_t ** pp_data, uint32_t * p_length) +{ + while (*p_length) + { + if (!m_ota_image_header_size) + { + m_ota_image_header_size = *(*pp_data); + } + + if ( m_ota_image_header_count < m_ota_image_header_size) + { + m_ota_image_header[m_ota_image_header_count] = *(*pp_data); + (*pp_data)++; // advance the pointer, + (*p_length)--; // decrease the length + m_ota_image_header_count++; // increase the version info count + } + else + { + // no implementation + } + + if ( m_ota_image_header_count == m_ota_image_header_size) + { + return true; + } + } + return false; +} + +ota_image_header_t * antfs_ota_image_header_get (void) +{ + /* + * Few sanity checks to make sure header is valid. + */ + if ( m_ota_image_header_count != m_ota_image_header_size) // Check if we got all the header first. + { + return NULL; + } + + if ((mp_ota_image_header->file_struct_version < OTA_IMAGE_FILE_STRUCT_VERSION_RANGE_START) || // Check if we can handle this file structure version. + (mp_ota_image_header->file_struct_version > OTA_IMAGE_FILE_STRUCT_VERSION_RANGE_END)) + { + return NULL; + } + + for (int i=0; i<OTA_IMAGE_ID_STRING_SIZE_MAX; i++) // Check if it is .SUF file + { + if (mp_ota_image_header->identifier_string[i] != identifier_string[i]) + { + return false; + } + } + + return (ota_image_header_t *) mp_ota_image_header; +} + +uint16_t antfs_ota_image_header_crc_get (void) +{ + return crc_crc16_update(HEADER_CRC_SEED, m_ota_image_header, m_ota_image_header_count); +} + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader.c new file mode 100644 index 0000000..7e09c7e --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader.c @@ -0,0 +1,516 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "bootloader.h" +#include <string.h> +#include "bootloader_types.h" +#include "bootloader_util.h" +#include "dfu.h" +#include "dfu_transport.h" +#include "nrf.h" +#include "app_error.h" +#include "nrf_sdm.h" +#include "nrf_soc.h" +#include "nordic_common.h" +#include "pstorage.h" +#include "app_scheduler.h" +#include "nrf_delay.h" + +#include "debug_pin.h" + +#define IRQ_ENABLED 0x01 /**< Field identifying if an interrupt is enabled. */ +#define MAX_NUMBER_INTERRUPTS 32 /**< Maximum number of interrupts available. */ + +/* +* bootloader_settings space is subdivided into 8 128byte sized blocks to properly use pstorage data abstraction scheme +* with the intent to use the last block located, specifically at 0x3FF80, for ant_boot_settings matters. +*/ +#define BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE 128 +#define BOOTLOADER_SETTINGS_FLASH_BLOCK_COUNT 8 /* Total of 1024 */ + +typedef enum +{ + BOOTLOADER_UPDATING, + BOOTLOADER_SETTINGS_SAVING, + BOOTLOADER_COMPLETE, + BOOTLOADER_TIMEOUT, + BOOTLOADER_RESET, +} bootloader_status_t; + +static pstorage_handle_t m_bootsettings_handle; /**< Pstorage handle to use for registration and identifying the bootloader module on subsequent calls to the pstorage module for load and store of bootloader setting in flash. */ +static bootloader_status_t m_update_status; /**< Current update status for the bootloader module to ensure correct behaviour when updating settings and when update completes. */ +static uint8_t m_delay_applied = false;/**< Delay has been applied before the initial access to flash > */ + +/* NOTE: Temporary use of this page until the bootloader_settings slotting is implemented */ +#define BOOT_SETTINGS_PEND_ADDRESS (BOOTLOADER_MBR_RETAINING_PAGE_ADDRESS) +#define BOOT_SETTINGS_PEND_VALUE 0xFFFFFFFE + +uint32_t blocking_flash_page_erase(uint32_t page_number) +{ + uint32_t err_code; + do{ + err_code = sd_flash_page_erase(page_number); + } while (err_code == NRF_ERROR_BUSY); + return err_code; +} + +uint32_t blocking_flash_word_write(uint32_t * const p_dst, uint32_t data) +{ + uint32_t err_code; + do{ + err_code = sd_flash_write(p_dst, &data, 1); + } while (err_code == NRF_ERROR_BUSY); + return err_code; +} + +static void pstorage_callback_handler(pstorage_handle_t * handle, uint8_t op_code, uint32_t result, uint8_t * p_data, uint32_t data_len) +{ + // If we are in BOOTLOADER_SETTINGS_SAVING state and we receive an PSTORAGE_STORE_OP_CODE + // response then settings has been saved and update has completed. + if ((m_update_status == BOOTLOADER_SETTINGS_SAVING) && (op_code == PSTORAGE_STORE_OP_CODE) && (handle->block_id == BOOTLOADER_SETTINGS_ADDRESS)) // + { + m_update_status = BOOTLOADER_COMPLETE; + + /*Clears bootloader_settings critical flag*/ + if (*((uint32_t *)BOOT_SETTINGS_PEND_ADDRESS) == BOOT_SETTINGS_PEND_VALUE) + { + uint32_t err_code = blocking_flash_page_erase(BOOT_SETTINGS_PEND_ADDRESS / CODE_PAGE_SIZE); + APP_ERROR_CHECK(err_code); + } + } + APP_ERROR_CHECK(result); +} + + +/**@brief Function for waiting for events. + * + * @details This function will place the chip in low power mode while waiting for events from + * the S110 SoftDevice or other peripherals. When interrupted by an event, it will call the + * @ref app_sched_execute function to process the received event. This function will return + * when the final state of the firmware update is reached OR when a tear down is in + * progress. + */ +static void wait_for_events(void) +{ + for (;;) + { + // Wait in low power state for any events. + uint32_t err_code = sd_app_evt_wait(); + APP_ERROR_CHECK(err_code); + + // Event received. Process it from the scheduler. + app_sched_execute(); + + if ((m_update_status == BOOTLOADER_COMPLETE) || + (m_update_status == BOOTLOADER_TIMEOUT) || + (m_update_status == BOOTLOADER_RESET)) + { + // When update has completed or a timeout/reset occured we will return. + return; + } + } +} + + +bool bootloader_app_is_valid(uint32_t app_addr) +{ + const bootloader_settings_t * p_bootloader_settings; + + // Critical flag was not cleared. + if (*((uint32_t *)BOOT_SETTINGS_PEND_ADDRESS) == BOOT_SETTINGS_PEND_VALUE) + { + return false; + } + + // There exists an application in CODE region 1. + if (*((uint32_t *) app_addr) == EMPTY_FLASH_MASK) + { + return false; + } + + bootloader_util_settings_get(&p_bootloader_settings); + + // The application in CODE region 1 was not flagged as invalid. + if (p_bootloader_settings->valid_app == BOOTLOADER_SETTINGS_INVALID_APPLICATION) + { + return false; + } + + return true; +} + + +static void bootloader_settings_save(bootloader_settings_t * p_settings) +{ + //TODO. This is temporary + static uint8_t ant_boot_settings[BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE]; + static pstorage_handle_t ant_boot_settings_handle; + + /* Backing up ant_boot_settings. */ + ant_boot_settings_handle.module_id = m_bootsettings_handle.module_id; + ant_boot_settings_handle.block_id = m_bootsettings_handle.block_id + (BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE * (BOOTLOADER_SETTINGS_FLASH_BLOCK_COUNT - 1)); + memcpy(ant_boot_settings, (uint8_t*)ant_boot_settings_handle.block_id, BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE); + + /* NOTE: Must erase the whole module to prevent pstorage block erasing which uses swap space*/ + uint32_t err_code = pstorage_clear(&m_bootsettings_handle, + BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE * BOOTLOADER_SETTINGS_FLASH_BLOCK_COUNT); + APP_ERROR_CHECK(err_code); + + /* Write back ant_boot_settings */ + err_code = pstorage_store(&ant_boot_settings_handle, + ant_boot_settings, + BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE, + 0); + APP_ERROR_CHECK(err_code); + + err_code = pstorage_store(&m_bootsettings_handle, + (uint8_t *)p_settings, + sizeof(bootloader_settings_t), + 0); + APP_ERROR_CHECK(err_code); +} + + +void bootloader_dfu_update_process(dfu_update_status_t update_status) +{ + static bootloader_settings_t settings; + const bootloader_settings_t * p_bootloader_settings; + uint32_t err_code; + + bootloader_util_settings_get(&p_bootloader_settings); /* Extract current values of the bootloader_settings*/ + memcpy(&settings, p_bootloader_settings, sizeof(bootloader_settings_t)); /* Copy over to local bootloader_settings*/ + + if (update_status.status_code == DFU_UPDATE_NEW_IMAGES) + { + if (update_status.sd_image_size != NEW_IMAGE_SIZE_EMPTY) + { + settings.sd_image.st.size = update_status.sd_image_size; + settings.sd_image.st.bank = update_status.bank_used; + } + else + { + settings.sd_image.st.size = NEW_IMAGE_SIZE_EMPTY; + } + + if (update_status.bl_image_size != NEW_IMAGE_SIZE_EMPTY) + { + settings.bl_image.st.size = update_status.bl_image_size; + settings.bl_image.st.bank = update_status.bank_used; + } + else + { + settings.bl_image.st.size = NEW_IMAGE_SIZE_EMPTY; + } + + if (update_status.ap_image_size != NEW_IMAGE_SIZE_EMPTY) + { + settings.ap_image.st.size = update_status.ap_image_size; + settings.ap_image.st.bank = update_status.bank_used; + } + else + { + settings.ap_image.st.size = NEW_IMAGE_SIZE_EMPTY; + } + + settings.src_image_address = update_status.src_image_address; + m_update_status = BOOTLOADER_SETTINGS_SAVING; + + /*Clears bootloader_settings critical flag - in case it was used by MBR*/ + if (*((uint32_t *)BOOT_SETTINGS_PEND_ADDRESS) != 0xFFFFFFFF) + { + err_code = blocking_flash_page_erase(BOOT_SETTINGS_PEND_ADDRESS / CODE_PAGE_SIZE); + APP_ERROR_CHECK(err_code); + } + + // TEMPORARY: This serves as a critical flag for the bootloader_settings updating. + err_code = blocking_flash_word_write((uint32_t *)BOOT_SETTINGS_PEND_ADDRESS, + BOOT_SETTINGS_PEND_VALUE); + APP_ERROR_CHECK(err_code); + + bootloader_settings_save(&settings); + } + else if (update_status.status_code == DFU_UPDATE_AP_SWAPPED) + { + settings.ap_image.st.bank = NEW_IMAGE_BANK_DONE; + settings.ap_image.st.size = p_bootloader_settings->ap_image.st.size; + settings.valid_app = BOOTLOADER_SETTINGS_VALID_APPLICATION; + m_update_status = BOOTLOADER_SETTINGS_SAVING; + + /*Clears bootloader_settings critical flag - in case it was used by MBR*/ + if (*((uint32_t *)BOOT_SETTINGS_PEND_ADDRESS) != 0xFFFFFFFF) + { + err_code = blocking_flash_page_erase(BOOT_SETTINGS_PEND_ADDRESS / CODE_PAGE_SIZE); + APP_ERROR_CHECK(err_code); + } + + // TEMPORARY: This serves as a critical flag for the bootloader_settings updating. + err_code = blocking_flash_word_write((uint32_t *)BOOT_SETTINGS_PEND_ADDRESS, + BOOT_SETTINGS_PEND_VALUE); + APP_ERROR_CHECK(err_code); + + bootloader_settings_save(&settings); + } + else if (update_status.status_code == DFU_UPDATE_AP_INVALIDATED) + { + if (p_bootloader_settings->valid_app != BOOTLOADER_SETTINGS_INVALID_APPLICATION) + { + settings.valid_app = BOOTLOADER_SETTINGS_INVALID_APPLICATION; + m_update_status = BOOTLOADER_UPDATING; + bootloader_settings_save(&settings); + } + } + else if (update_status.status_code == DFU_TIMEOUT) + { + // Timeout has occurred. Close the connection with the DFU Controller. +// dfu_transport_close(); + + m_update_status = BOOTLOADER_TIMEOUT; + } + else if (update_status.status_code == DFU_RESET) + { + // Timeout has occurred. Close the connection with the DFU Controller. +// dfu_transport_close(); + + m_update_status = BOOTLOADER_RESET; + } + else + { + // No implementation needed. + } +} + + +uint32_t bootloader_init(void) +{ + uint32_t err_code; + pstorage_module_param_t storage_params; + + storage_params.cb = pstorage_callback_handler; + storage_params.block_size = BOOTLOADER_SETTINGS_FLASH_BLOCK_SIZE; + storage_params.block_count = BOOTLOADER_SETTINGS_FLASH_BLOCK_COUNT; + + err_code = pstorage_init(); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + err_code = pstorage_register(&storage_params, &m_bootsettings_handle); + + m_delay_applied = false; + return err_code; +} + + +uint32_t bootloader_dfu_start(void) +{ + uint32_t err_code = NRF_SUCCESS; + + err_code = dfu_init(); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + err_code = dfu_transport_update_start(); + + wait_for_events(); + + err_code = dfu_transport_close(); + + return err_code; +} + + +/**@brief Function for disabling all interrupts before jumping from bootloader to application. + */ +static void interrupts_disable(void) +{ + uint32_t interrupt_setting_mask; + uint8_t irq; + + // We start the loop from first interrupt, i.e. interrupt 0. + irq = 0; + // Fetch the current interrupt settings. + interrupt_setting_mask = NVIC->ISER[0]; + + for (; irq < MAX_NUMBER_INTERRUPTS; irq++) + { + if (interrupt_setting_mask & (IRQ_ENABLED << irq)) + { + // The interrupt was enabled, and hence disable it. + NVIC_DisableIRQ((IRQn_Type) irq); + } + } +} + +// Ensure that flash operations are not executed within the first 100 ms seconds to allow +// a debugger to be attached +static void debugger_delay (void) +{ + if (m_delay_applied == false) + { + m_delay_applied = true; + nrf_delay_ms(100); + } +} + +void bootloader_app_start(uint32_t app_addr) +{ + // If the applications CRC has been checked and passed, the magic number will be written and we + // can start the application safely. + uint32_t err_code = sd_softdevice_disable(); + APP_ERROR_CHECK(err_code); + + interrupts_disable(); + +#if defined (S210_V3_STACK) + err_code = sd_softdevice_forward_to_application(); +#else + err_code = sd_softdevice_vector_table_base_set(CODE_REGION_1_START); +#endif + APP_ERROR_CHECK(err_code); + + bootloader_util_app_start(CODE_REGION_1_START); +} + + +#if !defined (S210_V3_STACK) +uint32_t temp_value; +uint32_t bootloader_dfu_sd_update_continue() +{ + uint32_t err_code = NRF_SUCCESS; + const bootloader_settings_t * p_bootloader_settings; + + bootloader_util_settings_get(&p_bootloader_settings); + + /* Ignore update attempts on invalid src_image_address */ + if ( (p_bootloader_settings->src_image_address == SRC_IMAGE_ADDRESS_EMPTY) || + (p_bootloader_settings->src_image_address == SRC_IMAGE_ADDRESS_INVALID)) + { + return NRF_SUCCESS; + } + + if ( (p_bootloader_settings->sd_image.st.bank == NEW_IMAGE_BANK_0) || + (p_bootloader_settings->sd_image.st.bank == NEW_IMAGE_BANK_1)) + { + debugger_delay(); + + err_code = dfu_sd_image_swap(); + if (dfu_sd_image_validate() == NRF_SUCCESS) + { + /* This is a manual write to flash, non-softdevice managed */ + uint32_t address = (uint32_t)p_bootloader_settings + BOOTLOADER_SETTINGS_SD_IMAGE_SIZE_ADR_OFFSET; + temp_value = p_bootloader_settings->sd_image.all & 0x3FFFFFFF; // clears image bank bits. + err_code = blocking_flash_word_write((uint32_t *)address, temp_value); + //TODO need to catch verification error + } + } + return err_code; +} + +uint32_t bootloader_dfu_bl_update_continue(void) +{ + uint32_t err_code = NRF_SUCCESS; + const bootloader_settings_t * p_bootloader_settings; + + bootloader_util_settings_get(&p_bootloader_settings); + + /* Ignore update attempts on invalid src_image_address */ + if ( (p_bootloader_settings->src_image_address == SRC_IMAGE_ADDRESS_EMPTY) || + (p_bootloader_settings->src_image_address == SRC_IMAGE_ADDRESS_INVALID)) + { + return NRF_SUCCESS; + } + + if ( (p_bootloader_settings->bl_image.st.bank == NEW_IMAGE_BANK_0) || + (p_bootloader_settings->bl_image.st.bank == NEW_IMAGE_BANK_1)) + { + debugger_delay(); + + if (dfu_bl_image_validate() != NRF_SUCCESS) + { + err_code = dfu_bl_image_swap(); // reset is built in to the mbr bootloader swap + } + else + { + /* This is a manual write to flash, non-softdevice managed */ + uint32_t address = (uint32_t)p_bootloader_settings + BOOTLOADER_SETTINGS_BL_IMAGE_SIZE_ADR_OFFSET; + uint32_t value = p_bootloader_settings->bl_image.all & 0x3FFFFFFF; // clears image bank bits. + err_code = blocking_flash_word_write((uint32_t *)address, value); + //TODO need to catch verification error + } + } + return err_code; +} +#endif // !S210_V3_STACK + +uint32_t bootloader_dfu_ap_update_continue(void) +{ + uint32_t err_code = NRF_SUCCESS; + const bootloader_settings_t * p_bootloader_settings; + + bootloader_util_settings_get(&p_bootloader_settings); + + /* Ignore update attempts on invalid src_image_address */ + if ( (p_bootloader_settings->src_image_address == SRC_IMAGE_ADDRESS_EMPTY) || + (p_bootloader_settings->src_image_address == SRC_IMAGE_ADDRESS_INVALID)) + { + return NRF_SUCCESS; + } + + if ( (p_bootloader_settings->ap_image.st.bank == NEW_IMAGE_BANK_0) || + (p_bootloader_settings->ap_image.st.bank == NEW_IMAGE_BANK_1)) + { + /* If updating application only, we can start the copy right now*/ + if ((p_bootloader_settings->sd_image.st.size == NEW_IMAGE_SIZE_EMPTY) && + (p_bootloader_settings->bl_image.st.size == NEW_IMAGE_SIZE_EMPTY)) + { + err_code = dfu_ap_image_swap(); + + dfu_update_status_t update_status = {DFU_UPDATE_AP_SWAPPED, }; + + bootloader_dfu_update_process(update_status); + + wait_for_events(); + } + } + return err_code; +} diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util.c new file mode 100644 index 0000000..8ebc4b2 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util.c @@ -0,0 +1,83 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "bootloader_util.h" +#include <stdint.h> +#include "nordic_common.h" +#include "bootloader_types.h" +#include <dfu_types.h> +#include "compiler_abstraction.h" + +/**< This variables reserves a codepage for bootloader specific settings, to ensure the compiler doesn't locate any code or variables at his location. */ +extern uint8_t m_boot_settings[CODE_PAGE_SIZE]; +extern uint8_t m_boot_settings_pend[CODE_PAGE_SIZE]; + +/**< This variable ensures that the linker script will write the bootloader start address to the UICR register. This value will be written in the HEX file and thus written to UICR when the bootloader is flashed into the chip. */ +extern uint32_t m_uicr_bootloader_start_address; + +#ifdef NRF52 + +/**< This variable ensures that the linker script will write the retaining page address to the UICR register. This value will be written in the HEX file and thus written to UICR when the bootloader is flashed into the chip. */ +extern uint32_t m_uicr_nrffw_1; + +#endif + + +/**@brief Function for starting the application (compiler specific). + * + * @param[in] start_addr Start address. + */ +void StartApplication(uint32_t start_addr); + + +void bootloader_util_app_start(uint32_t start_addr) +{ + StartApplication(start_addr); +} + +void bootloader_util_settings_get(const bootloader_settings_t ** pp_bootloader_settings) +{ + // Read only pointer to bootloader settings in flash. + static bootloader_settings_t const * const p_bootloader_settings = + (bootloader_settings_t *)&m_boot_settings[0]; + + *pp_bootloader_settings = p_bootloader_settings; +} + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util_arm.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util_arm.c new file mode 100644 index 0000000..03cc4be --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util_arm.c @@ -0,0 +1,65 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "bootloader_util.h" +#include <stdint.h> +#include "nordic_common.h" +#include "bootloader_types.h" +#include <dfu_types.h> +#include "compiler_abstraction.h" + + +uint8_t m_boot_settings[CODE_PAGE_SIZE] __attribute__((at(BOOTLOADER_SETTINGS_ADDRESS))) __attribute__((used)); +uint8_t m_boot_settings_pend[CODE_PAGE_SIZE] __attribute__((at(BOOTLOADER_MBR_RETAINING_PAGE_ADDRESS))) __attribute__((used)); +uint32_t m_uicr_bootloader_start_address __attribute__((at(NRF_UICR_BOOT_START_ADDRESS))) = BOOTLOADER_REGION_START; +#ifdef NRF52 +uint32_t m_uicr_nrffw_1 __attribute__((at(NRF_UICR_NRFFW_1))) = BOOTLOADER_MBR_RETAINING_PAGE_ADDRESS; +#endif + + +__ASM void StartApplication(uint32_t start_addr) +{ + LDR R2, [R0] ; Get App MSP. + MSR MSP, R2 ; Set the main stack pointer to the applications MSP. + LDR R3, [R0, #0x00000004] ; Get application reset vector address. + BX R3 ; No return - stack code is now activated only through SVC and plain interrupts. + ALIGN +} + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util_gcc.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util_gcc.c new file mode 100644 index 0000000..07494a7 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/bootloader_util_gcc.c @@ -0,0 +1,68 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "bootloader_util.h" +#include <stdint.h> +#include "nordic_common.h" +#include "bootloader_types.h" +#include <dfu_types.h> +#include "compiler_abstraction.h" + + +uint8_t m_boot_settings[CODE_PAGE_SIZE] __attribute__((section (".boot_settings"))) __attribute__((used)); +uint8_t m_boot_settings_pend[CODE_PAGE_SIZE] __attribute__((section (".boot_settings_pending"))) __attribute__((used)); +uint32_t m_uicr_bootloader_start_address __attribute__((section (".uicr_boot_start_address"))) __attribute__((used)) = BOOTLOADER_REGION_START; +#ifdef NRF52 +uint32_t m_uicr_nrffw_1 __attribute__((section (".uicr_mbr_retaining_address"))) __attribute__((used)) = BOOTLOADER_MBR_RETAINING_PAGE_ADDRESS; +#endif + + +void StartApplication(uint32_t start_addr) +{ + __ASM volatile( + "LDR R2, [%0] \n" //Get App MSP. + "MSR MSP, R2 \n" //Set the main stack pointer to the applications MSP. + "LDR R3, [%0, #0x00000004] \n" //Get application reset vector address. + "BX R3 \n" //No return - stack code is now activated only through SVC and plain interrupts. + ".ALIGN \n" + :: "r" (start_addr) // Argument list for the gcc assembly. start_addr is %0. + ); +} + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/config/hci_mem_pool_internal.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/config/hci_mem_pool_internal.h new file mode 100644 index 0000000..99f4b12 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/config/hci_mem_pool_internal.h @@ -0,0 +1,69 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** @file + * + * @defgroup memory_pool_internal Memory Pool Internal + * @{ + * @ingroup memory_pool + * + * @brief Memory pool internal definitions + */ + +#ifndef MEM_POOL_INTERNAL_H__ +#define MEM_POOL_INTERNAL_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define TX_BUF_SIZE 160u /**< TX buffer size in bytes. */ +#define RX_BUF_SIZE TX_BUF_SIZE /**< RX buffer size in bytes. */ + +#define RX_BUF_QUEUE_SIZE 2u /**< RX buffer element size. */ + + +#ifdef __cplusplus +} +#endif + +#endif // MEM_POOL_INTERNAL_H__ + +/** @} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/config/pstorage_platform.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/config/pstorage_platform.h new file mode 100644 index 0000000..1eb4703 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/config/pstorage_platform.h @@ -0,0 +1,99 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + /** @cond To make doxygen skip this file */ + +/** @file + * This header contains defines with respect persistent storage that are specific to + * persistent storage implementation and application use case. + */ +#ifndef PSTORAGE_PL_H__ +#define PSTORAGE_PL_H__ + + #include <stdint.h> + +#define PSTORAGE_FLASH_PAGE_SIZE ((uint16_t)NRF_FICR->CODEPAGESIZE) /**< Size of one flash page. */ +#define PSTORAGE_FLASH_EMPTY_MASK 0xFFFFFFFF /**< Bit mask that defines an empty address in flash. */ + +#define PSTORAGE_FLASH_PAGE_END NRF_FICR->CODESIZE + +#define PSTORAGE_NUM_OF_PAGES 1 /**< Number of flash pages allocated for the pstorage module excluding the swap page, configurable based on system requirements. */ +#define PSTORAGE_MIN_BLOCK_SIZE 0x0010 /**< Minimum size of block that can be registered with the module. Should be configured based on system requirements, recommendation is not have this value to be at least size of word. */ + +#define PSTORAGE_DATA_START_ADDR ((PSTORAGE_FLASH_PAGE_END - PSTORAGE_NUM_OF_PAGES) \ + * PSTORAGE_FLASH_PAGE_SIZE) /**< Start address for persistent data, configurable according to system requirements. */ +#define PSTORAGE_DATA_END_ADDR (PSTORAGE_FLASH_PAGE_END * PSTORAGE_FLASH_PAGE_SIZE) /**< End address for persistent data, configurable according to system requirements. */ +#define PSTORAGE_SWAP_ADDR PSTORAGE_DATA_END_ADDR + +#define PSTORAGE_MAX_BLOCK_SIZE PSTORAGE_FLASH_PAGE_SIZE /**< Maximum size of block that can be registered with the module. Should be configured based on system requirements. And should be greater than or equal to the minimum size. */ +#define PSTORAGE_CMD_QUEUE_SIZE 10 /**< Maximum number of flash access commands that can be maintained by the module for all applications. Configurable. */ + +/**@brief Define this flag in case Raw access to persistent memory is to be enabled. Raw mode + * unlike the data mode is for uses other than storing data from various mode. This mode is + * employed when updating firmware or similar uses. Therefore, this mode shall be enabled + * only for these special use cases and typically disabled. + */ +#define PSTORAGE_RAW_MODE_ENABLE + +/** Abstracts persistently memory block identifier. */ +typedef uint32_t pstorage_block_t; + +typedef struct +{ + uint32_t module_id; /**< Module ID.*/ + pstorage_block_t block_id; /**< Block ID.*/ +} pstorage_handle_t; + +typedef uint32_t pstorage_size_t; /** Size of length and offset fields. */ + + + +#ifdef __cplusplus +} +#endif + +#endif // PSTORAGE_PL_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @} */ +/** @endcond */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/debug_pin.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/debug_pin.c new file mode 100644 index 0000000..e61bcbd --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/debug_pin.c @@ -0,0 +1,487 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#include "nrf.h" +//#include "nrf51_bitfields.h" +#include "debug_pin.h" + +#if defined (DEBUGGING_PINS_ENABLE) + +/////////////////////////////////////////////////////////////////////// +// This function outputs a Manchester waveform for a +// given priority context and event number. The particular waveforms were pre-calculated +// so that the transmission speed is as fast as possible. +// With Manchester encoding, the clock is XOR'd with an oversampled data stream. +// This way, one is guaranteed to have a transitition every bit period and +// the clock can be extracted from the data stream. +// After oversampling the data (e.g. bABC... -> bAABBCC) and XORing with 0x55 or +// b01010101. +// +// The following waveform lookup table was pre-determined: +// Data Output Waveform +// --------------------- +// 0 0x55 +// 1 0x56 +// 2 0x59 +// 3 0x5A +// 4 0x65 +// 5 0x66 +// 6 0x69 +// 7 0x6A +// 8 0x95 +// 9 0x96 +// 10 0x99 +// 11 0x9A +// 12 0xA5 +// 13 0xA6 +// 14 0xA9 +// 15 0xAA +/////////////////////////////////////////////////////////////////////// + +#define STACK_DEBUG_MANCHESTER_BYTE55(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE56(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE59(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE5A(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE65(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE66(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE69(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE6A(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE95(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE96(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE99(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTE9A(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTEA5(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTEA6(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTEA9(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_BYTEAA(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin) {NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();} + +#define STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin) {NRF_GPIO->OUTSET = 1UL << ucPin;\ + __nop(); __nop();\ + NRF_GPIO->OUTCLR = 1UL << ucPin;\ + __nop(); __nop();} + +void stack_debug_Manchester_Start(uint8_t ucPin, uint8_t ucCode) +{ + __disable_irq(); + + NRF_GPIO->OUTCLR = 1UL << ucPin; + __nop(); __nop(); + + switch (ucCode) + { + case 0: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTE55(ucPin); + break; + + case 1: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTE56(ucPin); + break; + + case 2: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTE59(ucPin); + break; + + case 3: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTE5A(ucPin); + break; + + case 4: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTE65(ucPin); + break; + + case 5: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTE66(ucPin); + break; + + case 6: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTE69(ucPin); + break; + + case 7: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTE6A(ucPin); + break; + + case 8: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTE95(ucPin); + break; + + case 9: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTE96(ucPin); + break; + + case 10: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTE99(ucPin); + break; + + case 11: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTE9A(ucPin); + break; + + case 12: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTEA5(ucPin); + break; + + case 13: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTEA6(ucPin); + break; + + case 14: + STACK_DEBUG_MANCHESTER_PREAMBLE_ODD(ucPin); + STACK_DEBUG_MANCHESTER_BYTEA9(ucPin); + break; + + case 15: + STACK_DEBUG_MANCHESTER_PREAMBLE_EVEN(ucPin); + STACK_DEBUG_MANCHESTER_BYTEAA(ucPin); + break; + + default: + break; + + } + + // clear last manchester code state + NRF_GPIO->OUTCLR = 1UL << ucPin; + __nop(); __nop(); + + // start window + NRF_GPIO->OUTSET = 1UL << ucPin; + __nop(); __nop(); + + __enable_irq(); +} + +void stack_debug_Manchester_Stop(uint8_t ucPin) +{ + __disable_irq(); + + // end window + NRF_GPIO->OUTCLR = 1UL << ucPin; + __nop(); __nop(); + + __enable_irq(); +} + +#endif // DEBUGGING_PINS_ENABLE diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/dfu_dual_bank.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/dfu_dual_bank.c new file mode 100644 index 0000000..3bf1f56 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/dfu_dual_bank.c @@ -0,0 +1,679 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include <stdint.h> +#include <stddef.h> +#include "dfu.h" +#include <dfu_types.h> +#include "nrf.h" +//#include "nrf.h" +//#include "nrf51_bitfields.h" +#include "app_util.h" +#include "nrf_sdm.h" +#include "app_error.h" +#include "nrf_error.h" +#include "app_timer.h" +#include "nordic_common.h" +#include "bootloader.h" +#include "bootloader_types.h" +#include "bootloader_util.h" +#include "crc.h" +#include "pstorage.h" +#include "nrf_gpio.h" +#if !defined (S210_V3_STACK) +#include "nrf_mbr.h" +#endif // !S210_V3_STACK + +#include "debug_pin.h" +/**@brief States of the DFU state machine. */ +typedef enum +{ + DFU_STATE_INIT_ERROR, /**< State for: dfu_init(...) error. */ + DFU_STATE_IDLE, /**< State for: idle. */ + DFU_STATE_RDY, /**< State for: ready. */ + DFU_STATE_RX_INIT_PKT, /**< State for: receiving initialization packet. */ + DFU_STATE_RX_DATA_PKT, /**< State for: receiving data packet. */ + DFU_STATE_VALIDATE, /**< State for: validate. */ + DFU_STATE_WAIT_4_ACTIVATE /**< State for: waiting for dfu_image_activate(). */ +} dfu_state_t; + +static dfu_state_t m_dfu_state; /**< Current DFU state. */ +static uint32_t m_image_size; /**< Size of the image that will be transmitted. */ +static dfu_start_packet_t m_start_packet; /**< Start packet received for this update procedure. Contains update mode and image sizes information to be used for image transfer. */ +static uint8_t m_active_bank; /**< Activated bank for new image buffering */ + +static uint32_t m_data_received; /**< Amount of received data. */ +APP_TIMER_DEF(m_dfu_timer_id); /**< Application timer id. */ +static bool m_dfu_timed_out = false; /**< Boolean flag value for tracking DFU timer timeout state. */ +static pstorage_handle_t m_storage_handle_swap; +static pstorage_handle_t m_storage_handle_app; +static pstorage_module_param_t m_storage_module_param; +static dfu_callback_t m_data_pkt_cb; + +#define DFU_TIMEOUT_INTERVAL APP_TIMER_TICKS(120000) /**< DFU timeout interval in units of timer ticks. */ + +//lint !e655 suppress Lint Warning 655: Bit-wise operations. +#define IS_UPDATING_SD() (m_start_packet.dfu_update_mode & DFU_UPDATE_SD) /**< Macro for determining if a SoftDevice update is ongoing. */ +//lint !e655 suppress Lint Warning 655: Bit-wise operations +#define IS_UPDATING_BL() (m_start_packet.dfu_update_mode & DFU_UPDATE_BL) /**< Macro for determining if a Bootloader update is ongoing. */ + +#define IS_UPDATING_APP() (m_start_packet.dfu_update_mode & DFU_UPDATE_APP) /**< Macro for determining if a Application update is ongoing. */ +#define IMAGE_WRITE_IN_PROGRESS() (m_data_received > 0) /**< Macro for determining is image write in progress. */ + + +static void pstorage_callback_handler(pstorage_handle_t * handle, uint8_t op_code, uint32_t result, uint8_t * p_data, uint32_t data_len) +{ + APP_ERROR_CHECK(result); + + if (handle->block_id != dfu_storage_start_address_get()) + { + //There is no need to process this. + return; + } + + if ((m_dfu_state == DFU_STATE_RX_DATA_PKT) && + (op_code == PSTORAGE_STORE_OP_CODE)) + { + if (m_data_pkt_cb != NULL) + { + m_data_pkt_cb(result, p_data); + } + } + + //clearing done. + if (op_code == PSTORAGE_CLEAR_OP_CODE) + { + if (m_data_pkt_cb != NULL) + { + m_data_pkt_cb(result, NULL); + } + } +} + + +/**@brief Function for handling the DFU timeout. + * + * @param[in] p_context The timeout context. + */ +static void dfu_timeout_handler(void * p_context) +{ + UNUSED_PARAMETER(p_context); + dfu_update_status_t update_status; + + m_dfu_timed_out = true; + update_status.status_code = DFU_TIMEOUT; + + bootloader_dfu_update_process(update_status); +} + + +/**@brief Function for restarting the DFU Timer. +* + * @details This function will stop and restart the DFU timer. This function will be called by the + * functions handling any DFU packet received from the peer that is transferring a firmware + * image. + */ +static uint32_t dfu_timer_restart(void) +{ + if (m_dfu_timed_out) + { + // The DFU timer had already timed out. + return NRF_ERROR_INVALID_STATE; + } + + uint32_t err_code = app_timer_stop(m_dfu_timer_id); + + if (err_code != NRF_SUCCESS) + { + err_code = app_timer_start(m_dfu_timer_id, DFU_TIMEOUT_INTERVAL, NULL); + } + + return err_code; +} + + +uint32_t dfu_init(void) +{ + uint32_t err_code = NRF_SUCCESS; + + m_storage_module_param.cb = pstorage_callback_handler; + + err_code = pstorage_raw_register(&m_storage_module_param, &m_storage_handle_app); + if (err_code != NRF_SUCCESS) + { + m_dfu_state = DFU_STATE_INIT_ERROR; + return err_code; + } + + m_storage_handle_app.block_id = CODE_REGION_1_START; + m_storage_handle_swap = m_storage_handle_app; + m_storage_handle_swap.block_id += DFU_IMAGE_MAX_SIZE_BANKED; + + // Create the timer to monitor the activity by the peer doing the firmware update. + err_code = app_timer_create(&m_dfu_timer_id, + APP_TIMER_MODE_SINGLE_SHOT, + dfu_timeout_handler); + if (err_code == NRF_SUCCESS) + { + // Start the DFU timer. + err_code = app_timer_start(m_dfu_timer_id, DFU_TIMEOUT_INTERVAL, NULL); + } + + m_data_received = 0; + m_dfu_state = DFU_STATE_IDLE; + + return err_code; +} + + +void dfu_register_callback(dfu_callback_t callback_handler) +{ + m_data_pkt_cb = callback_handler; +} + +uint32_t dfu_start_pkt_handle(dfu_update_packet_t * p_packet) +{ + uint32_t err_code = NRF_SUCCESS; + + m_start_packet = p_packet->params.start_packet; + + // Check that the requested update procedure is supported. + // Currently the following combinations are allowed: + // - Application + // - SoftDevice + // - Bootloader + // - SoftDevice with Bootloader + if (IS_UPDATING_APP() && //lint !e655 suppress lint warning 655: bit-wise operations + (IS_UPDATING_SD() || //lint !e655 suppress Lint Warning 655: Bit-wise operations + IS_UPDATING_BL() || //lint !e655 suppress lint warning 655: bit-wise operations + ((m_start_packet.app_image_size & (sizeof(uint32_t) - 1)) != 0))) + { + // Image_size is not a multiple of 4 (word size). + return NRF_ERROR_NOT_SUPPORTED; + } + + if (IS_UPDATING_SD() && //lint !e655 suppress lint warning 655: bit-wise operations + ((m_start_packet.sd_image_size & (sizeof(uint32_t) - 1)) != 0)) + { + // Image_size is not a multiple of 4 (word size). + return NRF_ERROR_NOT_SUPPORTED; + } + + if (IS_UPDATING_BL() && //lint !e655 suppress lint warning 655: bit-wise operations + ((m_start_packet.bl_image_size & (sizeof(uint32_t) - 1)) != 0)) + { + // Image_size is not a multiple of 4 (word size). + return NRF_ERROR_NOT_SUPPORTED; + } + + m_image_size = m_start_packet.sd_image_size + + m_start_packet.bl_image_size + + m_start_packet.app_image_size + + m_start_packet.info_bytes_size; + + if (IS_UPDATING_BL() && m_start_packet.bl_image_size > DFU_BL_IMAGE_MAX_SIZE)//lint !e655 suppress Lint Warning 655: Bit-wise operations + { + return NRF_ERROR_DATA_SIZE; + } + else if (m_image_size > DFU_IMAGE_MAX_SIZE_FULL) + { + return NRF_ERROR_DATA_SIZE; + } + else + { + // Do nothing. + } + + // If new softdevice size is greater than the code region 1 boundary + if (IS_UPDATING_SD() && m_start_packet.sd_image_size > (CODE_REGION_1_START - SOFTDEVICE_REGION_START))//lint !e655 suppress Lint Warning 655: Bit-wise operations + { + //calculate storage starting offset. + uint32_t storage_starting_offset; + storage_starting_offset = m_start_packet.sd_image_size - (CODE_REGION_1_START - SOFTDEVICE_REGION_START); + storage_starting_offset = CODE_REGION_1_START + storage_starting_offset; + if (storage_starting_offset & ~(NRF_FICR->CODEPAGESIZE - 1)) + { + storage_starting_offset &= ~(NRF_FICR->CODEPAGESIZE - 1); + storage_starting_offset += NRF_FICR->CODEPAGESIZE; + } + + m_storage_handle_app.block_id = storage_starting_offset; + } + + switch (m_dfu_state) + { + case DFU_STATE_RX_INIT_PKT: + // Valid peer activity detected. Hence restart the DFU timer. + err_code = dfu_timer_restart(); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + m_dfu_state = DFU_STATE_RDY; + //break; fallthrough + case DFU_STATE_RDY: + break; + + default: + err_code = NRF_ERROR_INVALID_STATE; + break; + } + + return err_code; +} + + +uint32_t dfu_data_pkt_handle(dfu_update_packet_t * p_packet) +{ + uint32_t data_length; + uint32_t err_code; + uint32_t * p_data; + + if (p_packet == NULL) + { + return NRF_ERROR_NULL; + } + + // Check pointer alignment. + if (((uint32_t) (p_packet->params.data_packet.p_data_packet)) & (sizeof(uint32_t) - 1)) + { + // The p_data_packet is not word aligned address. + return NRF_ERROR_INVALID_ADDR; + } + + switch (m_dfu_state) + { + case DFU_STATE_RDY: + case DFU_STATE_RX_INIT_PKT: + m_dfu_state = DFU_STATE_RX_DATA_PKT; + // fall-through. + + case DFU_STATE_RX_DATA_PKT: + data_length = p_packet->params.data_packet.packet_length * sizeof(uint32_t); + + if ((m_data_received + data_length) > m_image_size) + { + // The caller is trying to write more bytes into the flash than the size provided to + // the dfu_image_size_set function. This is treated as a serious error condition and + // an unrecoverable one. Hence point the variable mp_app_write_address to the top of + // the flash area. This will ensure that all future application data packet writes + // will be blocked because of the above check. + m_data_received = 0xFFFFFFFF; + + return NRF_ERROR_DATA_SIZE; + } + + // Valid peer activity detected. Hence restart the DFU timer. + err_code = dfu_timer_restart(); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + p_data = (uint32_t *)p_packet->params.data_packet.p_data_packet; + + if (m_active_bank == NEW_IMAGE_BANK_0) //lint !e655 suppress Lint Warning 655: Bit-wise operations + { + err_code = pstorage_raw_store(&m_storage_handle_app, (uint8_t*) p_data, data_length, m_data_received); + } + else + { + err_code = pstorage_raw_store(&m_storage_handle_swap, (uint8_t*) p_data, data_length, m_data_received); + } + + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + m_data_received += data_length; + + if (m_data_received != m_image_size) + { + // The entire image is not received yet. More data is expected. + err_code = NRF_ERROR_INVALID_LENGTH; + } + else + { + // The entire image has been received. Return NRF_SUCCESS. + err_code = NRF_SUCCESS; + } + break; + + default: + err_code = NRF_ERROR_INVALID_STATE; + break; + } + + return err_code; +} + +uint32_t dfu_init_pkt_handle(dfu_update_packet_t * p_packet) +{ + uint32_t err_code; + uint32_t total_image_size = p_packet->params.init_packet.total_image_size; + dfu_update_status_t update_status; + + switch (m_dfu_state) + { + case DFU_STATE_IDLE: + case DFU_STATE_RDY: + case DFU_STATE_RX_DATA_PKT: + m_dfu_state = DFU_STATE_RX_INIT_PKT; + /* fall-through */ + + case DFU_STATE_RX_INIT_PKT: + // Valid peer activity detected. Hence restart the DFU timer. + err_code = dfu_timer_restart(); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + // Reset the number of data received and the original m_storage_handle_app's start address. + m_data_received = 0; + m_storage_handle_app.block_id = CODE_REGION_1_START; + + // Prepare the flash buffer for the upcoming image. + if (total_image_size > DFU_IMAGE_MAX_SIZE_BANKED) + { + update_status.status_code = DFU_UPDATE_AP_INVALIDATED; + bootloader_dfu_update_process(update_status); + err_code = pstorage_raw_clear(&m_storage_handle_app, DFU_IMAGE_MAX_SIZE_FULL); + m_active_bank = NEW_IMAGE_BANK_0; + } + else if ((total_image_size < DFU_IMAGE_MAX_SIZE_BANKED) && (total_image_size != 0)) + { + err_code = pstorage_raw_clear(&m_storage_handle_swap, DFU_IMAGE_MAX_SIZE_BANKED); + m_active_bank = NEW_IMAGE_BANK_1; + } + else + { + // do nothing + } + + break; + + default: + // Either the start packet was not received or dfu_init function was not called before. + err_code = NRF_ERROR_INVALID_STATE; + break; + } + + return err_code; +} + +uint32_t dfu_image_validate(uint16_t crc_seed) +{ + uint32_t err_code; + + switch (m_dfu_state) + { + case DFU_STATE_RX_DATA_PKT: + m_dfu_state = DFU_STATE_VALIDATE; + + // Check if the application image write has finished. + if (m_data_received != m_image_size) + { + // Image not yet fully transfered by the peer or the peer has attempted to write + // too much data. Hence the validation should fail. + err_code = NRF_ERROR_INVALID_STATE; + } + else + { + // Valid peer activity detected. Hence restart the DFU timer. + err_code = dfu_timer_restart(); + if (err_code == NRF_SUCCESS) + { + if (crc_crc16_update(crc_seed, (uint32_t*)dfu_storage_start_address_get(), m_image_size) == 0) + { + m_dfu_state = DFU_STATE_WAIT_4_ACTIVATE; + err_code = NRF_SUCCESS; + } + else + { + err_code = NRF_ERROR_INTERNAL; + } + } + } + break; + + default: + err_code = NRF_ERROR_INVALID_STATE; + break; + } + + return err_code; +} + +uint32_t dfu_image_activate (void) +{ + uint32_t err_code = NRF_SUCCESS; + dfu_update_status_t update_status; + + switch (m_dfu_state) + { + case DFU_STATE_WAIT_4_ACTIVATE: + + // Stop the DFU Timer because the peer activity need not be monitored any longer. + err_code = app_timer_stop(m_dfu_timer_id); + APP_ERROR_CHECK(err_code); + + if (IS_UPDATING_SD()) //lint !e655 suppress Lint Warning 655: Bit-wise operations + { + update_status.sd_image_size = m_start_packet.sd_image_size; + } + else + { + update_status.sd_image_size = NEW_IMAGE_SIZE_EMPTY; + } + + if (IS_UPDATING_BL()) //lint !e655 suppress Lint Warning 655: Bit-wise operations + { + update_status.bl_image_size = m_start_packet.bl_image_size; + } + else + { + update_status.bl_image_size = NEW_IMAGE_SIZE_EMPTY; + } + + if (IS_UPDATING_APP()) //lint !e655 suppress Lint Warning 655: Bit-wise operations + { + update_status.ap_image_size = m_start_packet.app_image_size; + } + else + { + update_status.ap_image_size = NEW_IMAGE_SIZE_EMPTY; + } + + update_status.status_code = DFU_UPDATE_NEW_IMAGES; + update_status.bank_used = m_active_bank; + update_status.src_image_address = dfu_storage_start_address_get(); + bootloader_dfu_update_process(update_status); + + break; + + default: + err_code = NRF_ERROR_INVALID_STATE; + break; + } + + return err_code; +} + + +void dfu_reset(void) +{ + dfu_update_status_t update_status; + + update_status.status_code = DFU_RESET; + + bootloader_dfu_update_process(update_status); +} + +uint32_t dfu_ap_image_swap(void) +{ + uint32_t err_code = NRF_SUCCESS; + const bootloader_settings_t * p_bootloader_settings; + + bootloader_util_settings_get(&p_bootloader_settings); + + uint32_t ap_image_start = p_bootloader_settings->src_image_address + p_bootloader_settings->sd_image.st.size + p_bootloader_settings->bl_image.st.size; + + if (ap_image_start == CODE_REGION_1_START) + { + return NRF_SUCCESS; // no need to do anything since the code is already in the correct place. + } + + if (p_bootloader_settings->ap_image.st.size != 0) + { + if (m_storage_handle_app.block_id == CODE_REGION_1_START) + { + // Erase BANK 0. + err_code = pstorage_raw_clear(&m_storage_handle_app, p_bootloader_settings->ap_image.st.size); + + if (err_code == NRF_SUCCESS) + { + err_code = pstorage_raw_store(&m_storage_handle_app, (uint8_t*) m_storage_handle_swap.block_id,p_bootloader_settings->ap_image.st.size, 0); + } + } + } + return err_code; +} + +#if !defined (S210_V3_STACK) +uint32_t dfu_sd_image_swap(void) +{ + const bootloader_settings_t * p_bootloader_settings; + sd_mbr_command_t sd_mbr_cmd; + + bootloader_util_settings_get(&p_bootloader_settings); + + if (p_bootloader_settings->sd_image.st.size != 0) + { + sd_mbr_cmd.command = SD_MBR_COMMAND_COPY_SD; + sd_mbr_cmd.params.copy_sd.src = (uint32_t *) p_bootloader_settings->src_image_address; + sd_mbr_cmd.params.copy_sd.dst = (uint32_t *) SOFTDEVICE_REGION_START; + sd_mbr_cmd.params.copy_sd.len = p_bootloader_settings->sd_image.st.size / sizeof(uint32_t); + + return sd_mbr_command(&sd_mbr_cmd); + } + return NRF_SUCCESS; +} +#endif //S210_V3_STACK + +#if !defined (S210_V3_STACK) +uint32_t dfu_bl_image_swap(void) +{ + const bootloader_settings_t * p_bootloader_settings; + sd_mbr_command_t sd_mbr_cmd; + + bootloader_util_settings_get(&p_bootloader_settings); + + if (p_bootloader_settings->bl_image.st.size != 0) + { + sd_mbr_cmd.command = SD_MBR_COMMAND_COPY_BL; + sd_mbr_cmd.params.copy_bl.bl_src = (uint32_t *)(p_bootloader_settings->src_image_address + p_bootloader_settings->sd_image.st.size); + sd_mbr_cmd.params.copy_bl.bl_len = p_bootloader_settings->bl_image.st.size / sizeof(uint32_t); + + return sd_mbr_command(&sd_mbr_cmd); + } + return NRF_SUCCESS; +} +#endif //S210_V3_STACK + +#if !defined (S210_V3_STACK) +uint32_t dfu_bl_image_validate(void) +{ + const bootloader_settings_t * p_bootloader_settings; + sd_mbr_command_t sd_mbr_cmd; + + bootloader_util_settings_get(&p_bootloader_settings); + + if (p_bootloader_settings->bl_image.st.size != 0) + { + sd_mbr_cmd.command = SD_MBR_COMMAND_COMPARE; + sd_mbr_cmd.params.compare.ptr1 = (uint32_t *) BOOTLOADER_REGION_START; + sd_mbr_cmd.params.compare.ptr2 = (uint32_t *)(p_bootloader_settings->src_image_address + p_bootloader_settings->sd_image.st.size); + sd_mbr_cmd.params.compare.len = p_bootloader_settings->bl_image.st.size / sizeof(uint32_t); + + return sd_mbr_command(&sd_mbr_cmd); + } + return NRF_SUCCESS; +} +#endif //S210_V3_STACK + +#if !defined (S210_V3_STACK) +uint32_t dfu_sd_image_validate(void) +{ + const bootloader_settings_t * p_bootloader_settings; + sd_mbr_command_t sd_mbr_cmd; + + bootloader_util_settings_get(&p_bootloader_settings); + + if (p_bootloader_settings->sd_image.st.size != 0) + { + sd_mbr_cmd.command = SD_MBR_COMMAND_COMPARE; + sd_mbr_cmd.params.compare.ptr1 = (uint32_t *) SOFTDEVICE_REGION_START; + sd_mbr_cmd.params.compare.ptr2 = (uint32_t *) p_bootloader_settings->src_image_address; + sd_mbr_cmd.params.compare.len = p_bootloader_settings->sd_image.st.size / sizeof(uint32_t); + + return sd_mbr_command(&sd_mbr_cmd); + } + return NRF_SUCCESS; +} +#endif //S210_V3_STACK + +uint32_t dfu_storage_start_address_get(void) +{ + if (m_active_bank == NEW_IMAGE_BANK_0) + { + return m_storage_handle_app.block_id; + } + else if (m_active_bank == NEW_IMAGE_BANK_1) + { + return m_storage_handle_swap.block_id; + } + else + { + return 0; + } +} diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/dfu_transport_ant.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/dfu_transport_ant.c new file mode 100644 index 0000000..3bdad69 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/dfu_transport_ant.c @@ -0,0 +1,1150 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#include "dfu_transport.h" +#include "dfu.h" +#include <dfu_types.h> +#include "nrf.h" +#include "nrf_sdm.h" +#include "nrf_gpio.h" +#include "nrf_delay.h" +#include "ant_error.h" +#include "ant_interface.h" +#include "ant_parameters.h" +#include "antfs.h" +#include "antfs_ota.h" +#include "ant_boot_settings.h" +#include "app_util.h" +#include "app_error.h" +#include "nrf_sdh.h" +#include "nrf_sdh_ant.h" +#include "nordic_common.h" +#include "app_timer.h" +#include "crc.h" +#include "pstorage.h" + +#include "boards.h" +#include <stdio.h> +#include <string.h> + +#include "debug_pin.h" +/* + * ANTFS Configuration + */ +#define ANTFS_FILE_INDEX_UPDATE_APPLICATION ((uint16_t)0xFB01) +#define ANTFS_FILE_INDEX_UPDATE_BOOTLOADER ((uint16_t)0xFB02) +#define ANTFS_FILE_INDEX_UPDATE_STACK ((uint16_t)0xFB03) +#define ANTFS_FILE_INDEX_UPDATE_STACK_BOOTLOADER ((uint16_t)0xFB06) +#define ANTFS_FILE_INDEX_OTA_UPDATE_INFO ((uint16_t)0x0001) + +#define ANTFS_FILE_SIZE_MAX_DFU_IMAGE ((uint32_t)DFU_IMAGE_MAX_SIZE_FULL) + +#define ANTFS_UPLOAD_DATA_BUFFER_MIN_SIZE 128 +#define ANTFS_UPLOAD_DATA_BUFFER_MAX_SIZE 160 // Maximum amount or it can cause trouble. + +// The following parameters can be customized, and should match the OTA Updater tool Connection & Authentication settings +#define ANTFS_CLIENT_DEV_TYPE 1u /**< Beacon device type . Set to Product ID*/ +#define ANTFS_CLIENT_MANUF_ID 255u /**< Beacon manufacturer ID. Set to your own Manufacturer ID (managed by ANT+) */ +#define ANTFS_CLIENT_NAME { "ANTFS OTA Update" } /**< Client's friendly name. This string can be displayed to identify the device. */ +#define ANTFS_CLIENT_PASSKEY {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08} /**< Client authentication passkey. */ + +static const uint8_t m_friendly_name[] = ANTFS_CLIENT_NAME; /**< Client's friendly name. */ +static const uint8_t m_pass_key[] = ANTFS_CLIENT_PASSKEY; /**< Authentication string (passkey). */ + +//static pstorage_handle_t m_storage_handle_ant; + +static bool m_download_request_in_progress = false; +static bool m_upload_request_in_progress = false; +/* + * Directory entry of OTA Update Information file. + */ +typedef struct +{ + antfs_dir_header_t header; /**< Directory header. */ + antfs_dir_struct_t directory_file[1]; /**< Array of directory entry structures. */ +} directory_file_t; + +// Directory +static const directory_file_t m_directory = +{ + { + ANTFS_DIR_STRUCT_VERSION, // Version 1, length of each subsequent entry = 16 bytes, system time not used. + sizeof(antfs_dir_struct_t), + 0, 0, 0, 0, 0, 0, 0, 0 + }, + { + { + ANTFS_FILE_INDEX_OTA_UPDATE_INFO, /* Index*/ + OTA_UPDATE_INFO_FILE_DATA_TYPE, /* File Data Type*/ + 1, /* File Sub Type*/ + 0, /* File Number*/ + 0, /* File Data Type Specific Flags*/ + 0x80, /* Read only, General File Flags*/ + OTA_UPDATE_INFO_FILE_SIZE, /* File Size*/ + 0xFFFFFFFF + } + } +}; + + +static antfs_event_return_t m_antfs_event; /**< ANTFS event queue element. */ +static antfs_request_info_t m_response_info; /**< Parameters for response to a download and upload request. */ +static uint32_t m_current_file_size; /**< File Size. */ +static uint32_t m_current_offset; /**< ANTFS current valid and processed offset, used to do upload retries. */ +static uint16_t m_current_crc; /**< ANTFS current valid and processed offset, used to do upload retries. */ +static uint16_t m_current_file_index; /**< ANTFS current File Index. */ + +static uint32_t m_pending_offset; + +static uint8_t * mp_rx_buffer; + +static bool m_image_data_complete; +static uint32_t m_image_data_offset; +static uint32_t m_image_data_max; + +static uint16_t m_header_crc_seed; + +static dfu_update_mode_t m_update_mode = DFU_UPDATE_NONE; + +static dfu_update_packet_t m_dfu_pkt; + +typedef struct{ + uint8_t a_mem_pool[ANTFS_UPLOAD_DATA_BUFFER_MAX_SIZE]; + uint32_t size; + uint16_t crc; +} mem_pool_t; +mem_pool_t m_mem_pool_1; +mem_pool_t m_mem_pool_2; +static mem_pool_t * mp_buffering_handle; + +typedef enum{ + ANTFS_DFU_STATE_RESET, // State after reset, uninitialized + ANTFS_DFU_STATE_INIT_DELAYED, + ANTFS_DFU_STATE_READY, // + ANTFS_DFU_STATE_VALIDATED, // Images successfully validated + ANTFS_DFU_STATE_COMPLETED, // Activation is done and ready for the reset. + ANTFS_DFU_STATE_FLASH_ERASE, // Long flash erase activity. + ANTFS_DFU_STATE_FLASH_PENDING, // Detected pending writes. + ANTFS_DFU_STATE_STALL, +}antfs_dfu_state_t; +static antfs_dfu_state_t m_antfs_dfu_state; + +static uint16_t m_data_buffered; /**< Accumulated data to be written to flash */ +static bool m_ota_image_header_parsed = false; +static bool m_upload_swap_space_prepared = false; + +static void services_init(void); +static bool flash_busy(void); +static void upload_data_response_fail_reset(void); + +static uint32_t serial_num_get(void) +{ + return NRF_FICR->DEVICEID[0]; /**< Serial number of client device. */ +} + +//static pstorage_handle_t m_storage_handle_ant = {0}; +//static void boot_return_set (uint32_t status) +//{ +// uint32_t return_value = *ANT_BOOT_PARAM_RETURN; +// +// return_value &= ~PARAM_RETURN_BOOT_STATUS_Msk; +// return_value |= status & PARAM_RETURN_BOOT_STATUS_Msk; +// +// if (m_storage_handle_ant.module_id != PSTORAGE_NUM_OF_PAGES + 1) +// { +// m_storage_handle_ant.module_id = PSTORAGE_NUM_OF_PAGES + 1; //Steal the raw mode module ID. +// m_storage_handle_ant.block_id = ANT_BOOT_PARAM_RETURN_BASE; +// } +// pstorage_raw_store(&m_storage_handle_ant, (uint8_t*)&return_value, sizeof(uint32_t), 0); +//} + +/**@brief Function for notifying a DFU Controller about error conditions in the DFU module. + * This function also ensures that an error is translated from nrf_errors to DFU Response + * Value. + * + * @param[in] p_dfu DFU Service Structure. + * @param[in] err_code Nrf error code that should be translated and send to the DFU Controller. + */ +static void dfu_error_notify(uint32_t err_code, uint32_t err_point) +{ + // Unexpected error occured, +#if defined (DBG_DFU_UART_OUT_PIN) + //Wait until all the uart successfully sent out. + nrf_delay_us(50); + + DEBUG_UART_OUT(0xEE); + DEBUG_UART_OUT(err_point); + + nrf_delay_us(50); + +#endif + // TODO: we need to come up of something to handle this + NVIC_SystemReset(); +} + +/**@brief Function for handling the callback events from the dfu module. + * Callbacks are expected when \ref dfu_data_pkt_handle has been executed. + * + * @param[in] result Operation result code. NRF_SUCCESS when a queued operation was successful. + * @param[in] p_data Pointer to the data to which the operation is related. + */ +/* + * NOTE: This callback is only called by the following + * - Storing done operation by dfu_data_pkt_handle + * - And all clearing done operation. + */ +static void dfu_cb_handler(uint32_t result, uint8_t * p_data) +{ + uint32_t err_code; + uint16_t rxd_buffer_len = 0; + uint16_t ram_crc = 0; + uint16_t flash_crc = 0; + +#if defined (DBG_DFU_UART_OUT_PIN) + DEBUG_UART_OUT(0xFF); + DEBUG_UART_OUT(m_antfs_dfu_state); +#endif + + switch (m_antfs_dfu_state) + { + case ANTFS_DFU_STATE_INIT_DELAYED: + // This is when upon initialization, a pre-erase operation have occured i.e. bank1 pre clearing. + services_init(); + break; + + case ANTFS_DFU_STATE_FLASH_ERASE: + // Handles upload and download request response delay when there is ongoing flash activities + // Generally we need to avoid flash activities and burst activities to happen at the same time. + // ANTFS request response are delayed and when flash is done response are handled here. + if (m_upload_request_in_progress) + { + m_upload_request_in_progress = false; + // Make sure we got all the latest values. + m_response_info.file_size.data = m_current_offset; + m_response_info.file_crc = m_current_crc; + if (result == NRF_SUCCESS) + { + m_upload_swap_space_prepared = true; + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_OK, &m_response_info)); + } + else + { + /* Not ready */ + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_UPLOAD_NOT_READY, &m_response_info)); + } + } + + if (m_download_request_in_progress) + { + m_download_request_in_progress = false; + + UNUSED_VARIABLE(antfs_download_req_resp_prepare(RESPONSE_MESSAGE_OK, &m_response_info)); + } + + m_antfs_dfu_state = ANTFS_DFU_STATE_READY; + break; + + + case ANTFS_DFU_STATE_FLASH_PENDING: + case ANTFS_DFU_STATE_READY: + // Handles Flash write call back queued by Upload Data. + if (result != NRF_SUCCESS) + { + upload_data_response_fail_reset(); + return; + } + + if ((m_mem_pool_1.a_mem_pool <= p_data) && (p_data <= (m_mem_pool_1.a_mem_pool + ANTFS_UPLOAD_DATA_BUFFER_MAX_SIZE))) + { + rxd_buffer_len = m_mem_pool_1.size; + ram_crc = m_mem_pool_1.crc; + m_mem_pool_1.size = 0; + } + else if ((m_mem_pool_2.a_mem_pool <= p_data) && (p_data <= (m_mem_pool_2.a_mem_pool + ANTFS_UPLOAD_DATA_BUFFER_MAX_SIZE))) + { + rxd_buffer_len = m_mem_pool_2.size; + ram_crc = m_mem_pool_2.crc; + m_mem_pool_2.size = 0; + } + else + { + upload_data_response_fail_reset(); + return; + } + + // Verify the data written to flash. + flash_crc = crc_crc16_update(0, (uint8_t*)(dfu_storage_start_address_get() + m_image_data_offset), rxd_buffer_len); + if (flash_crc != ram_crc) + { + upload_data_response_fail_reset(); + return; + } + + //update current offsets and crc + m_current_offset += rxd_buffer_len; + m_current_crc = crc_crc16_update(m_current_crc, (uint8_t*)(dfu_storage_start_address_get() + m_image_data_offset), rxd_buffer_len); + + m_image_data_offset += rxd_buffer_len; + + if (m_antfs_dfu_state == ANTFS_DFU_STATE_FLASH_PENDING) + { + m_antfs_dfu_state = ANTFS_DFU_STATE_READY; + // Update it with the latest values; + m_response_info.file_size.data = m_current_offset; + m_response_info.file_crc = m_current_crc; + if (m_upload_request_in_progress) + { + m_upload_request_in_progress = false; + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_OK, &m_response_info)); + } + else // data response + { + if (m_image_data_complete == true) + { + if (m_image_data_max == m_image_data_offset) + { + err_code = dfu_image_validate(m_header_crc_seed); + if (err_code == NRF_SUCCESS) + { + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(true)); + m_antfs_dfu_state = ANTFS_DFU_STATE_VALIDATED; + return; + } + else + { + upload_data_response_fail_reset(); + } + } + + if ((m_mem_pool_1.size != 0) || (m_mem_pool_2.size != 0)) + { + m_antfs_dfu_state = ANTFS_DFU_STATE_FLASH_PENDING; + } + } + else //m_image_data_complete == false + { + if ((m_mem_pool_1.size == 0) && (m_mem_pool_2.size == 0)) + { + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(true)); // Handles block transfers + } + else + { + m_antfs_dfu_state = ANTFS_DFU_STATE_FLASH_PENDING; + } + } + } + } + + break; + + default: + break; + } +} + +/**@brief Function for processing ANTFS upload request data event. + * + * @param[in] p_event The event extracted from the queue to be processed. + */ +static void antfs_event_upload_request_handle(const antfs_event_return_t * p_event) +{ + uint32_t err_code = RESPONSE_MESSAGE_OK; + uint8_t new_request = false; + + if ((m_antfs_dfu_state == ANTFS_DFU_STATE_FLASH_ERASE) || (m_antfs_dfu_state == ANTFS_DFU_STATE_FLASH_PENDING)) + { + return; + } + + /*reset*/ + m_response_info.file_index.data = p_event->file_index; + m_response_info.max_burst_block_size.data = 0; + m_response_info.max_file_size = 0; + m_response_info.file_size.data = 0; + m_response_info.file_crc = 0; + + // Evaluate File Index first + if (m_current_file_index != p_event->file_index ) + { + m_current_file_index = p_event->file_index; + m_current_offset = 0; + m_current_crc = 0; + } + + if (p_event->offset == MAX_ULONG) + { + // This is a request to continue upload. + } + else if (p_event->offset == 0x00) + { + new_request = true; + } + else if (p_event->offset != m_current_offset) + { + // Something is wrong. + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_INVALID_OPERATION, &m_response_info)); + m_antfs_dfu_state = ANTFS_DFU_STATE_STALL; + } + else + { + // no implementation. + } + + switch (m_current_file_index) + { +#if !defined (S210_V3_STACK) + case ANTFS_FILE_INDEX_UPDATE_STACK: + case ANTFS_FILE_INDEX_UPDATE_BOOTLOADER: + case ANTFS_FILE_INDEX_UPDATE_STACK_BOOTLOADER: +#endif // S210_V3_STACK + case ANTFS_FILE_INDEX_UPDATE_APPLICATION: + { + // Current valid file size is the last offset written to the file. + m_response_info.file_size.data = m_current_offset; + // Intentionally report maximum allowed upload file size as max writeable file size + header and crc. + // Writeable size check will be performed by dfu_start_pkt_handle() after parsing uploaded header + m_response_info.max_file_size = ANTFS_FILE_SIZE_MAX_DFU_IMAGE + OTA_IMAGE_HEADER_SIZE_MAX; + // Maximum burst block should be maximum allowable downloadable file size. + m_response_info.max_burst_block_size.data = ANTFS_FILE_SIZE_MAX_DFU_IMAGE + OTA_IMAGE_HEADER_SIZE_MAX; + // Last valid CRC. + m_response_info.file_crc = m_current_crc; + + // Will only handle upload request while at ANTFS_DFU_STATE_READY + if (m_antfs_dfu_state == ANTFS_DFU_STATE_VALIDATED) + { + if (new_request) + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_NOT_AVAILABLE, &m_response_info)); + } + else + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_OK, &m_response_info)); // To handle resume at end of data. + } + return; + } + else if (m_antfs_dfu_state != ANTFS_DFU_STATE_READY) + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_NOT_AVAILABLE, &m_response_info)); + return; + } + + // Check File Size if it can still fit. Uploaded file size may be larger than the total writeable space because it includes header + // and CRC that do not get written to flash. Writeable size check will be performed by dfu_start_pk_handle() after + // parsing uploaded header + if ((p_event->offset + p_event->bytes) > (ANTFS_FILE_SIZE_MAX_DFU_IMAGE + OTA_IMAGE_HEADER_SIZE_MAX + OTA_IMAGE_CRC_SIZE_MAX)) + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_NOT_ENOUGH_SPACE, &m_response_info)); + return; + } + + m_data_buffered = 0; + + if (new_request) + { + m_current_offset = 0; + m_current_crc = 0; + m_pending_offset = 0; + + antfs_ota_init(); + + // Only supports offset starting at 0; + if (p_event->offset != 0) + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_FAIL, &m_response_info)); + return; + } + +// boot_return_set(PARAM_RETURN_BOOT_STATUS_Entered); + + // Store file size, + m_current_file_size = p_event->bytes; + + if (m_current_file_index == ANTFS_FILE_INDEX_UPDATE_STACK) + { + m_update_mode = DFU_UPDATE_SD; + } + else if (m_current_file_index == ANTFS_FILE_INDEX_UPDATE_BOOTLOADER) + { + m_update_mode = DFU_UPDATE_BL; + } + else if (m_current_file_index == ANTFS_FILE_INDEX_UPDATE_APPLICATION) + { + m_update_mode = DFU_UPDATE_APP; + } + else if (m_current_file_index == ANTFS_FILE_INDEX_UPDATE_STACK_BOOTLOADER) + { + m_update_mode = DFU_UPDATE_SD; + m_update_mode |= DFU_UPDATE_BL;//lint !e655 suppress Lint Warning 655: Bit-wise operations + } + + m_dfu_pkt.packet_type = INIT_PACKET; + + if ((*ANT_BOOT_APP_SIZE > DFU_IMAGE_MAX_SIZE_BANKED) || + (*ANT_BOOT_APP_SIZE == 0xFFFFFFFF) || + (*ANT_BOOT_APP_SIZE == 0x00000000) || + (m_update_mode & DFU_UPDATE_SD))/*lint !e655 suppress Lint Warning 655: Bit-wise operations*/ + { + m_dfu_pkt.params.init_packet.total_image_size = DFU_IMAGE_MAX_SIZE_FULL; + } + else + { + m_dfu_pkt.params.init_packet.total_image_size = m_current_file_size; + } + + if (m_upload_swap_space_prepared == true) + { + // Prepare no flash, except the states + m_dfu_pkt.params.init_packet.total_image_size = 0; + } + + err_code = dfu_init_pkt_handle(&m_dfu_pkt); + if (err_code) + { + if (err_code == NRF_ERROR_INVALID_STATE) + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_INVALID_OPERATION, &m_response_info)); + } + else + { + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_FAIL, &m_response_info)); + } + return; + } + + m_ota_image_header_parsed = false; + m_image_data_complete = false; + m_image_data_offset = 0; + + m_data_buffered = 0; + + // A flash erase is expected at this time. postpone response if there is. + if (flash_busy()) + { + m_upload_request_in_progress = true; + m_antfs_dfu_state = ANTFS_DFU_STATE_FLASH_ERASE; + return; + } + } + else + { + // Check if there are still pending writes scheduled in Flash. + if (flash_busy()) + { + m_upload_request_in_progress = true; + m_antfs_dfu_state = ANTFS_DFU_STATE_FLASH_PENDING; + return; + } + } + + m_antfs_dfu_state = ANTFS_DFU_STATE_READY; + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_OK, &m_response_info)); + } + break; + default: + m_antfs_dfu_state = ANTFS_DFU_STATE_READY; + UNUSED_VARIABLE(antfs_upload_req_resp_transmit(RESPONSE_MESSAGE_NOT_EXIST, &m_response_info)); + } +} + + +static void antfs_event_upload_start_handle(const antfs_event_return_t * p_event) +{ + switch (m_current_file_index) + { + case ANTFS_FILE_INDEX_UPDATE_STACK: + case ANTFS_FILE_INDEX_UPDATE_BOOTLOADER: + case ANTFS_FILE_INDEX_UPDATE_APPLICATION: + case ANTFS_FILE_INDEX_UPDATE_STACK_BOOTLOADER: + break; + } + + // reset buffered data + m_data_buffered = 0; +} + + +/**@brief Function for processing ANTFS upload data event. + * + * @param[in] p_event The event extracted from the queue to be processed. + */ +static void antfs_event_upload_data_handle(const antfs_event_return_t * p_event) +{ + static uint8_t * p_rxd_data; + static uint32_t rxd_data_size; + uint32_t err_code = NRF_SUCCESS; + ota_image_header_t * p_ota_image_header; + + // Allocate a memory pool for upload buffering. + if (m_data_buffered == 0) + { + // Check which pool is empty. + if (m_mem_pool_1.size == 0) + { + mp_buffering_handle = &m_mem_pool_1; + } + else if (m_mem_pool_2.size == 0) + { + mp_buffering_handle = &m_mem_pool_2; + } + else + { + // something is wrong. + dfu_error_notify(err_code, 6); + } + mp_rx_buffer = &mp_buffering_handle->a_mem_pool[0]; + } + + if ((p_event->bytes + m_data_buffered) < ANTFS_UPLOAD_DATA_BUFFER_MAX_SIZE) + { + // Copy over the buffer the rx'd 8 byte data + memcpy(mp_rx_buffer + m_data_buffered, p_event->data, p_event->bytes); + // Advance buffered count + m_data_buffered += p_event->bytes; + // Advance current over all data count. + } + else + { + // something is wrong. + dfu_error_notify(err_code, 7); + } + + if ((m_data_buffered >= ANTFS_UPLOAD_DATA_BUFFER_MIN_SIZE) || + ((m_pending_offset + m_data_buffered) >= m_current_file_size)) + { + /* If any of the pool is still pending process and we are running out of space + * The ANTFS_UPLOAD_DATA_BUFFER_MIN_SIZE should be enough delay to get the previous buffer be processed, including flashing*/ + if (((m_mem_pool_1.size != 0) || (m_mem_pool_2.size != 0)) && ((m_pending_offset + m_data_buffered) < m_current_file_size)) + { + if (m_data_buffered < ANTFS_UPLOAD_DATA_BUFFER_MAX_SIZE) + { // We can wait for a bit. + return; + } + else + { + // Something is wrong. the device is not flashing. + upload_data_response_fail_reset(); + return; + } + } + + mp_buffering_handle->size = m_data_buffered; // Set the size and consider this pool closed and ready for processing. + m_data_buffered = 0; // Reset buffered data count + + // Decide what to do with the data in the buffer. + switch (m_current_file_index) + { + case ANTFS_FILE_INDEX_UPDATE_STACK: + case ANTFS_FILE_INDEX_UPDATE_BOOTLOADER: + case ANTFS_FILE_INDEX_UPDATE_APPLICATION: + case ANTFS_FILE_INDEX_UPDATE_STACK_BOOTLOADER: + + // Not in the right state + if (m_antfs_dfu_state != ANTFS_DFU_STATE_READY) + { + // Throw it away. + mp_buffering_handle->size = 0; + mp_buffering_handle = NULL; + + upload_data_response_fail_reset(); + return; + } + + p_rxd_data = mp_buffering_handle->a_mem_pool; + rxd_data_size = mp_buffering_handle->size; + + // pre calculate pending offset + m_pending_offset = m_pending_offset + rxd_data_size; + + /*********** + * Header Section + */ + if (!m_ota_image_header_parsed) + { + // Parse the Header + if (antfs_ota_image_header_parsing(&p_rxd_data, &rxd_data_size)) + { + m_ota_image_header_parsed = true; + p_ota_image_header = antfs_ota_image_header_get(); + } + else + { + return; // Get more + } + + if ((p_ota_image_header == NULL) || // Make sure it is a valid header + (p_ota_image_header->architecture_identifier != OTA_IMAGE_ARCH_IDENTIFIER_ST_BL_AP) || // Make sure it is SD BL and AP arch + (p_ota_image_header->image_format != OTA_IMAGE_IMAGE_FORMAT_BINARY)) // Make sure it is in Binary format + { + // Invalid header, fail now. + upload_data_response_fail_reset(); + return; + } + + // Fill in DFU parameters + m_dfu_pkt.params.start_packet.dfu_update_mode = m_update_mode; + m_dfu_pkt.params.start_packet.sd_image_size = p_ota_image_header->wireless_stack_size; + m_dfu_pkt.params.start_packet.bl_image_size = p_ota_image_header->bootloader_size; + m_dfu_pkt.params.start_packet.app_image_size = p_ota_image_header->application_size; + m_dfu_pkt.params.start_packet.info_bytes_size = OTA_IMAGE_CRC_SIZE_MAX; + + err_code = dfu_start_pkt_handle(&m_dfu_pkt); // reinitializing dfu pkt + if (err_code) + { + upload_data_response_fail_reset(); + return; + } + + m_image_data_max = p_ota_image_header->wireless_stack_size + + p_ota_image_header->bootloader_size + + p_ota_image_header->application_size + + OTA_IMAGE_CRC_SIZE_MAX; + m_header_crc_seed = antfs_ota_image_header_crc_get(); + m_current_crc = m_header_crc_seed; + m_current_offset = p_ota_image_header->header_size; + } + + /*********** + * Image Section + */ + if (!m_image_data_complete) + { + m_upload_swap_space_prepared = false; + + m_dfu_pkt.params.data_packet.p_data_packet = (uint32_t*) p_rxd_data; + m_dfu_pkt.params.data_packet.packet_length = rxd_data_size / sizeof(uint32_t); + + // store flushed information for flash write verification. + mp_buffering_handle->size = rxd_data_size; + mp_buffering_handle->crc = crc_crc16_update(0, p_rxd_data, rxd_data_size); + + // Pass the image to dfu. + m_dfu_pkt.packet_type = DATA_PACKET; + err_code = dfu_data_pkt_handle(&m_dfu_pkt); + if (err_code == NRF_SUCCESS) + { + // All the expected firmware image has been received and processed successfully. + m_image_data_complete = true; + } + else if (err_code == NRF_ERROR_INVALID_LENGTH) + { + // The image is still partially completed. We need more. + //do nothing; + } + // Unmanaged return code. Something is wrong need to abort. + else + { + //TODO Need to figure out what to do on unmanaged returns. Maybe reset + dfu_error_notify(err_code, 9); + } + } + + m_antfs_dfu_state = ANTFS_DFU_STATE_READY; + + break; + + default: + mp_buffering_handle->size = 0; + break; + } + } +} + +static void antfs_event_upload_complete_handle(const antfs_event_return_t * p_event) +{ + uint32_t err_code; + + if (m_antfs_dfu_state == ANTFS_DFU_STATE_VALIDATED) + { + // only send this response if we have validated the upload + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(true)); + } + else if (m_antfs_dfu_state == ANTFS_DFU_STATE_READY) + { + if (flash_busy()) + { + m_antfs_dfu_state = ANTFS_DFU_STATE_FLASH_PENDING; // Image completed but still busy writing, postpone it on flash call back. + return; + } + + if (m_image_data_complete == true) + { + err_code = dfu_image_validate(m_header_crc_seed); + if (err_code == NRF_SUCCESS) + { + m_antfs_dfu_state = ANTFS_DFU_STATE_VALIDATED; + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(true)); + } + else + { + upload_data_response_fail_reset(); + } + } + else + { + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(true)); // This is expected on block transfers. + } + } + else + { + // no implementation + } +} + +static void antfs_event_upload_fail_handle(const antfs_event_return_t * p_event) +{ + if (m_antfs_dfu_state == ANTFS_DFU_STATE_READY) // All other failure like RF transfers. + { + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(false)); + } +} + + +/**@brief Function for processing ANTFS download request event. + * + * @param[in] p_event The event extracted from the queue to be processed. + */ +static void antfs_event_download_request_handle(const antfs_event_return_t * p_event) +{ + uint8_t response = RESPONSE_MESSAGE_OK; + + // Grab request info. + m_current_file_index = p_event->file_index; + + // We only have one file in the directory. + if (m_current_file_index == 0) // directory download + { + // Set response parameters. + m_response_info.file_index.data = 0; + // File size (per directory). + m_response_info.file_size.data = sizeof(m_directory); + // File is being read, so maximum size is the file size. + m_response_info.max_file_size = sizeof(m_directory); + // Send the entire file in a single block if possible. + m_response_info.max_burst_block_size.data = sizeof(m_directory); + + } + else if (m_current_file_index == ANTFS_FILE_INDEX_OTA_UPDATE_INFO) + { + // Set response parameters. + m_response_info.file_index.data = ANTFS_FILE_INDEX_OTA_UPDATE_INFO; + // File size (per directory). + m_response_info.file_size.data = OTA_UPDATE_INFO_FILE_SIZE; + // File is being read, so maximum size is the file size. + m_response_info.max_file_size = OTA_UPDATE_INFO_FILE_SIZE; + // Send the entire file in a single block if possible. + m_response_info.max_burst_block_size.data = OTA_UPDATE_INFO_FILE_SIZE; + } + // Index not found. + else + { + response = RESPONSE_MESSAGE_NOT_EXIST; + m_response_info.file_index.data = 0; + m_response_info.file_size.data = 0; + m_response_info.max_file_size = 0; + m_response_info.max_burst_block_size.data = 0; + } + + if (response == RESPONSE_MESSAGE_OK) + { + // Check if there was scheduled in Flash. + // TODO need to track flash activity better + if (flash_busy()) + { + m_download_request_in_progress = 1; + m_antfs_dfu_state = ANTFS_DFU_STATE_FLASH_ERASE; + return; + } + antfs_download_req_resp_prepare(response, &m_response_info); + } + else + { + antfs_download_req_resp_prepare(response, &m_response_info); + } +} + + +/**@brief Function for processing ANTFS download data event. + * + * @param[in] p_event The event extracted from the queue to be processed. + */ + +static void antfs_event_download_data_handle(const antfs_event_return_t * p_event) +{ + if (m_current_file_index == p_event->file_index) + { + // Only send data for a file index matching the download request. + uint8_t * p_buffer; + // Burst data block size * 8 bytes per burst packet. + // Offset specified by client. + const uint32_t offset = 0; + // Size of requested block of data. + uint32_t data_bytes; + + if (m_current_file_index == 0) + { + UNUSED_VARIABLE(antfs_input_data_download(m_current_file_index, offset, sizeof(m_directory), (uint8_t*)&m_directory)); + } + else if (m_current_file_index == ANTFS_FILE_INDEX_OTA_UPDATE_INFO) + { + antfs_ota_update_information_file_get(&data_bytes, &p_buffer); + + // @note: Suppress return value as no use case for handling it exists. + UNUSED_VARIABLE(antfs_input_data_download(m_current_file_index, offset, data_bytes, p_buffer)); + } + } +} + +static void antfs_event_link_handle(const antfs_event_return_t * p_event) +{ + uint32_t err_code; + + if (m_antfs_dfu_state == ANTFS_DFU_STATE_VALIDATED) + { + // We can stop ANT right here. + err_code = sd_ant_stack_reset(); + APP_ERROR_CHECK(err_code); + + err_code = dfu_image_activate(); + if (err_code == NRF_SUCCESS) + { + m_antfs_dfu_state = ANTFS_DFU_STATE_COMPLETED; + } + else + { + dfu_error_notify(err_code, 10); + } + } + +} + +static void antfs_event_trans_handle(const antfs_event_return_t * p_event) +{ + if (m_antfs_dfu_state == ANTFS_DFU_STATE_STALL) // Needs restart + { + dfu_error_notify(NRF_ERROR_INTERNAL, 11); + } +} + +/**@brief Function for processing a single ANTFS event. + * + * @param[in] p_event The event extracted from the queue to be processed. + */ +static void antfs_event_process(const antfs_event_return_t * p_event) +{ +#if defined (DBG_DFU_UART_OUT_PIN) + DEBUG_UART_OUT(p_event->event); + DEBUG_UART_OUT(m_antfs_dfu_state); +#endif //DBG_DFU_UART_OUT_PIN + + switch (p_event->event) + { + case ANTFS_EVENT_LINK: + antfs_event_link_handle(p_event); + break; + + case ANTFS_EVENT_TRANS: + antfs_event_trans_handle(p_event); + break; + + case ANTFS_EVENT_DOWNLOAD_REQUEST: + antfs_event_download_request_handle(p_event); + break; + + case ANTFS_EVENT_DOWNLOAD_REQUEST_DATA: + antfs_event_download_data_handle(p_event); + break; + + case ANTFS_EVENT_UPLOAD_REQUEST: + antfs_event_upload_request_handle(p_event); + break; + + case ANTFS_EVENT_UPLOAD_START: + antfs_event_upload_start_handle(p_event); + break; + + case ANTFS_EVENT_UPLOAD_DATA: + antfs_event_upload_data_handle(p_event); + break; + + case ANTFS_EVENT_UPLOAD_FAIL: + // @note: Suppress return value as no use case for handling it exists. + antfs_event_upload_fail_handle(p_event); + break; + + case ANTFS_EVENT_UPLOAD_COMPLETE: + antfs_event_upload_complete_handle(p_event); + break; + + default: + break; + } +} + + + +/**@brief ANT event handler. */ +static void ant_evt_handler(ant_evt_t * p_ant_evt, void * p_context) +{ + antfs_message_process(p_ant_evt->message.aucMessage); // process regular ant event messages. + + while (antfs_event_extract(&m_antfs_event)) // check for antfs events. + { + antfs_event_process(&m_antfs_event); + } +} + +NRF_SDH_ANT_OBSERVER(m_ant_observer, 0, ant_evt_handler, NULL); + +static void upload_data_response_fail_reset(void) +{ + UNUSED_VARIABLE(antfs_upload_data_resp_transmit(false)); + m_antfs_dfu_state = ANTFS_DFU_STATE_STALL; +} + +static bool flash_busy(void) +{ + uint32_t q_count, err_code; + err_code = pstorage_access_status_get(&q_count); + APP_ERROR_CHECK(err_code); + if (q_count != 0) + { + return true; + } + else + { + return false; + } +} + +/**@brief Function for initializing services that will be used by the application. + */ +static void services_init(void) +{ + const uint32_t serial_num = serial_num_get(); + + // Initializing ANTFS service. + const antfs_params_t params = + { + serial_num, + ANTFS_CLIENT_DEV_TYPE, + ANTFS_CLIENT_MANUF_ID, + ANTFS_LINK_FREQ, + {ANTFS_DEFAULT_BEACON | UPLOAD_ENABLED_FLAG_MASK | DATA_AVAILABLE_FLAG_MASK}, + m_pass_key, + m_friendly_name + }; + + antfs_init(¶ms, NULL); + antfs_channel_setup(); + + /* adjust coex settings + * only enables ANT search and ANT synch keep alive priority behaviour. Transfer keep alive disabled to ensure flash erase doesn�t time out + * */ + uint32_t err_code; + static uint8_t aucCoexConfig[8] = {0x09, 0x00, 0x00, 0x04, 0x00, 0x3A, 0x00, 0x3A}; + ANT_BUFFER_PTR coexConfig = + { + .ucBufferSize = sizeof(aucCoexConfig), + .pucBuffer = aucCoexConfig + }; + err_code = sd_ant_coex_config_set(ANTFS_CONFIG_CHANNEL_NUMBER, &coexConfig, NULL); + APP_ERROR_CHECK(err_code); + + m_current_offset = 0; + m_current_crc = 0; + + m_pending_offset = 0; + m_data_buffered = 0; + mp_buffering_handle = NULL; + m_upload_swap_space_prepared = false; + + m_antfs_dfu_state = ANTFS_DFU_STATE_READY; +} + + +uint32_t dfu_transport_update_start(void) +{ + m_antfs_dfu_state = ANTFS_DFU_STATE_RESET; + + // DFU flash activity call back. + dfu_register_callback(dfu_cb_handler); + + // initialize mem_pools + m_mem_pool_1.size = 0; + m_mem_pool_2.size = 0; + + // It is expected that there was no ANTFS related activities before this point. + // Check if flash is busy pre-initializing. + // If Flash is still initializing wait until it is done. + if (flash_busy()) + { + // Postpone services init and ANTFS init until flash is done. + m_antfs_dfu_state = ANTFS_DFU_STATE_INIT_DELAYED; + return NRF_SUCCESS; + } + + // Start services right away if flash not busy + services_init(); + + return NRF_SUCCESS; +} + + +uint32_t dfu_transport_close() +{ + uint32_t err_code; + + // Close ANTFS Channel + err_code = sd_ant_stack_reset(); + APP_ERROR_CHECK(err_code); + + return NRF_SUCCESS; +} diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/antfs_ota.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/antfs_ota.h new file mode 100644 index 0000000..1f84df7 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/antfs_ota.h @@ -0,0 +1,155 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#ifndef ANTFS_OTA_H__ +#define ANTFS_OTA_H__ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * OTA Update Information File + */ +#define OTA_INFO_FILE_STRUCTURE_VERSION_BYTES 1 +#define OTA_INFO_HARDWARE_VERSION_BYTES 1 +#define OTA_INFO_REGION_PRODUCT_ID_BYTES 1 +#define OTA_INFO_MAXIMUM_SWAP_SPACE_BYTES 4 +#define OTA_INFO_WIRELESS_STACK_VERSION_ID_BYTES 4 +#define OTA_INFO_WIRELESS_STACK_VERSION_LENGTH_BYTES 1 +#define OTA_INFO_WIRELESS_STACK_VERSION_STRING_BYTES 16 +#define OTA_INFO_BOOTLOADER_VERSION_ID_BYTES 4 +#define OTA_INFO_BOOTLOADER_VERSION_LENGTH_BYTES 1 +#define OTA_INFO_BOOTLOADER_VERSION_STRING_BYTES 16 +#define OTA_INFO_APPLICATION_VERSION_ID_BYTES 4 +#define OTA_INFO_APPLICATION_VERSION_LENGTH_BYTES 1 +#define OTA_INFO_APPLICATION_VERSION_STRING_BYTES 16 + +#define OTA_INFO_FILE_STRUCTURE_VERSION_OFFSET 0 +#define OTA_INFO_HARDWARE_VERSION_OFFSET OTA_INFO_FILE_STRUCTURE_VERSION_OFFSET + OTA_INFO_FILE_STRUCTURE_VERSION_BYTES +#define OTA_INFO_REGION_PRODUCT_ID_OFFSET OTA_INFO_HARDWARE_VERSION_OFFSET + OTA_INFO_HARDWARE_VERSION_BYTES +#define OTA_INFO_MAXIMUM_SWAP_SPACE_OFFSET OTA_INFO_REGION_PRODUCT_ID_OFFSET + OTA_INFO_REGION_PRODUCT_ID_BYTES +#define OTA_INFO_WIRELESS_STACK_VERSION_ID_OFFSET OTA_INFO_MAXIMUM_SWAP_SPACE_OFFSET + OTA_INFO_MAXIMUM_SWAP_SPACE_BYTES +#define OTA_INFO_WIRELESS_STACK_VERSION_LENGTH_OFFSET OTA_INFO_WIRELESS_STACK_VERSION_ID_OFFSET + OTA_INFO_WIRELESS_STACK_VERSION_ID_BYTES +#define OTA_INFO_WIRELESS_STACK_VERSION_STRING_OFFSET OTA_INFO_WIRELESS_STACK_VERSION_LENGTH_OFFSET + OTA_INFO_WIRELESS_STACK_VERSION_LENGTH_BYTES +#define OTA_INFO_BOOTLOADER_VERSION_ID_OFFSET OTA_INFO_WIRELESS_STACK_VERSION_STRING_OFFSET + OTA_INFO_WIRELESS_STACK_VERSION_STRING_BYTES +#define OTA_INFO_BOOTLOADER_VERSION_LENGTH_OFFSET OTA_INFO_BOOTLOADER_VERSION_ID_OFFSET + OTA_INFO_BOOTLOADER_VERSION_ID_BYTES +#define OTA_INFO_BOOTLOADER_VERSION_STRING_OFFSET OTA_INFO_BOOTLOADER_VERSION_LENGTH_OFFSET + OTA_INFO_BOOTLOADER_VERSION_LENGTH_BYTES +#define OTA_INFO_APPLICATION_VERSION_ID_OFFSET OTA_INFO_BOOTLOADER_VERSION_STRING_OFFSET + OTA_INFO_BOOTLOADER_VERSION_STRING_BYTES +#define OTA_INFO_APPLICATION_VERSION_LENGTH_OFFSET OTA_INFO_APPLICATION_VERSION_ID_OFFSET + OTA_INFO_APPLICATION_VERSION_ID_BYTES +#define OTA_INFO_APPLICATION_VERSION_STRING_OFFSET OTA_INFO_APPLICATION_VERSION_LENGTH_OFFSET + OTA_INFO_APPLICATION_VERSION_LENGTH_BYTES +#define OTA_INFO_FILE_END_OFFSET OTA_INFO_APPLICATION_VERSION_STRING_OFFSET + OTA_INFO_APPLICATION_VERSION_STRING_BYTES + +#define OTA_UPDATE_INFO_FILE_DATA_TYPE ((uint8_t)0x0E) +#define OTA_UPDATE_INFO_FILE_SIZE ((uint32_t)OTA_INFO_FILE_END_OFFSET) + +#define OTA_INFO_FILE_STRUCTURE_VERSION ((uint8_t)0x10) //The most significant 4 bits indicate major revision, while the least significant 4 bits indicate a minor revision. +#define OTA_INFO_HARDWARE_VERSION ((uint8_t)0x00) //TODO TBD +#define OTA_INFO_REGION_PRODUCT_ID ((uint8_t)0x00) //TODO TBD + +#define OTA_INFO_WIRELESS_STACK_VERSION_ID ((uint32_t)0x00000000) +#define OTA_INFO_BOOTLOADER_VERSION_ID ((uint32_t)0x00000000) +#define OTA_INFO_APPLICATION_VERSION_ID ((uint32_t)0x00000000) + +/* + * OTA Update Image File + */ +#define OTA_IMAGE_HEADER_SIZE_OFFSET 0 +#define OTA_IMAGE_HEADER_FILE_STRUCT_VER_OFFSET 1 +#define OTA_IMAGE_HEADER_ARCH_ID_OFFSET 2 +#define OTA_IMAGE_HEADER_ID_STRING_OFFSET 4 +#define OTA_IMAGE_HEADER_IMAGE_FORMAT_OFFSET 8 +#define OTA_IMAGE_HEADER_RESERVED_OFFSET 9 +#define OTA_IMAGE_HEADER_IMAGE_STACK_SIZE_OFFSET 18 +#define OTA_IMAGE_HEADER_IMAGE_BOOTLOADER_SIZE_OFFSET 22 +#define OTA_IMAGE_HEADER_IMAGE_APPLICATION_SIZE_OFFSET 26 +#define OTA_IMAGE_HEADER_VERSION_INFO_SIZE_OFFSET 30 + +#define OTA_IMAGE_HEADER_SIZE_MAX 256 +#define OTA_IMAGE_FILE_STRUCT_VERSION_RANGE_START 0x11 +#define OTA_IMAGE_FILE_STRUCT_VERSION_RANGE_END 0x1F +#define OTA_IMAGE_ARCH_IDENTIFIER_ST_BL_AP 1 +#define OTA_IMAGE_ID_STRING_SIZE_MAX 4 +#define OTA_IMAGE_RESERVED_SIZE_MAX 9 +#define OTA_IMAGE_IMAGE_FORMAT_BINARY 0 +#define OTA_IMAGE_IMAGE_FORMAT_ENCRYPTED_BINARIES 1 + +#define OTA_IMAGE_CRC_SIZE_MAX 4 + +typedef struct +{ + uint8_t header_size; + uint8_t file_struct_version; + uint16_t architecture_identifier; + uint8_t identifier_string[OTA_IMAGE_ID_STRING_SIZE_MAX]; + uint8_t image_format; + uint8_t reserved[OTA_IMAGE_RESERVED_SIZE_MAX]; + uint32_t wireless_stack_size; + uint32_t bootloader_size; + uint32_t application_size; + uint16_t version_info_size; +} __attribute__((packed)) ota_image_header_t; + +void antfs_ota_init (void); + +void antfs_ota_update_information_file_get (uint32_t * p_length, uint8_t ** pp_data); + +bool antfs_ota_image_header_parsing (uint8_t ** pp_data, uint32_t * p_length); +ota_image_header_t * antfs_ota_image_header_get (void); +uint16_t antfs_ota_image_header_crc_get (void); + +#ifdef __cplusplus +} +#endif + +#endif // ANTFS_OTA_H__ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_boot_settings.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_boot_settings.h new file mode 100644 index 0000000..76ffa37 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_boot_settings.h @@ -0,0 +1,134 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#ifndef ANT_BOOT_SETTINGS_H__ +#define ANT_BOOT_SETTINGS_H__ + +#include <stdint.h> +#include "ant_dfu_constrains.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +#define FLASH_LAST_PAGE (NRF5x_FLASH_END / CODE_PAGE_SIZE - 1) + +#define ANT_BOOT_SETTINGS_SIZE 128UL +#define ANT_BOOT_SETTINGS_LOCATION (NRF5x_FLASH_END - ANT_BOOT_SETTINGS_SIZE) + +#define ANT_BOOT_SETTINGS_BASE ANT_BOOT_SETTINGS_LOCATION + +#define ANT_BOOT_PARAM_FLAGS_BASE (NRF5x_FLASH_END - 4) +#define ANT_BOOT_PARAM_RETURN_BASE (NRF5x_FLASH_END - 8) +#define ANT_BOOT_APP_VERSION_BASE (NRF5x_FLASH_END - 0x18) +#define ANT_BOOT_APP_SIZE_BASE (NRF5x_FLASH_END - 0x1C) + +#define ANT_BOOT_PARAM_FLAGS ((uint32_t *) ANT_BOOT_PARAM_FLAGS_BASE) +#define ANT_BOOT_PARAM_RETURN ((uint32_t *) ANT_BOOT_PARAM_RETURN_BASE) +#define ANT_BOOT_APP_VERSION ((uint8_t *) ANT_BOOT_APP_VERSION_BASE) +#define ANT_BOOT_APP_SIZE ((uint32_t *) ANT_BOOT_APP_SIZE_BASE) + +#define PARAM_FLAGS_PARAM_VALID_Pos (0UL) +#define PARAM_FLAGS_PARAM_VALID_Msk (0x1UL << PARAM_FLAGS_PARAM_VALID_Pos) +#define PARAM_FLAGS_PARAM_VALID_True (0UL) +#define PARAM_FLAGS_PARAM_VALID_False (1UL) + +#define PARAM_FLAGS_ENTER_BOOT_Pos (1UL) +#define PARAM_FLAGS_ENTER_BOOT_Msk (0x3UL << PARAM_FLAGS_ENTER_BOOT_Pos) +#define PARAM_FLAGS_ENTER_BOOT_BypassInit (0x3UL) +#define PARAM_FLAGS_ENTER_BOOT_EnterBoot (0x2UL) +#define PARAM_FLAGS_ENTER_BOOT_BypassDone (0x0UL) + +#define PARAM_FLAGS_PRE_ERASE_Pos (3UL) +#define PARAM_FLAGS_PRE_ERASE_Msk (0x1UL << PARAM_FLAGS_PRE_ERASE_Pos) +#define PARAM_FLAGS_PRE_ERASE_Ignore (1UL) +#define PARAM_FLAGS_PRE_ERASE_Erase (0UL) + +#define PARAM_RETURN_BOOT_STATUS_Pos (0UL) +#define PARAM_RETURN_BOOT_STATUS_Msk (0xFFUL << PARAM_FLAGS_ENTER_BOOT_Pos) + +#define APP_SIZE_Clear (0x00000000UL) +#define APP_SIZE_Empty (0xFFFFFFFFUL) + + +/* +* +* A soft-reset(NVIC_SystemReset()) must be executed after the information for the bootloader has been filled in. +* i.e. +* { +* ant_boot_settings_t ant_boot_settings; +* +* ant_boot_settings_clear(&ant_boot_settings); // Clears and set FFs to the memory block +* ant_boot_settings.app_version[0] = version[0]; // Start filling parameters +* ant_boot_settings.app_version[1] = version[1]; +* ant_boot_settings.app_version[2] = version[2]; +* ant_boot_settings_save(&ant_boot_settings); +* ant_boot_settings_validate(1); // Sets in the magic number. Must be done last before the reset!!! +* NVIC_SystemReset(); // Do the soft reset +* } +*/ +typedef struct +{ + uint8_t reserved[100]; + + uint32_t app_size; // Application size + uint8_t app_version[16]; // Application version + uint32_t param_return; + uint32_t param_flags; +} __attribute__((packed)) ant_boot_settings_t; + + +#ifdef __cplusplus +} +#endif + +#endif //ANT_BOOT_SETTINGS_H__ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_boot_settings_api.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_boot_settings_api.h new file mode 100644 index 0000000..428e152 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_boot_settings_api.h @@ -0,0 +1,88 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#ifndef ANT_BOOT_SETTINGS_API_H__ +#define ANT_BOOT_SETTINGS_API_H__ + +#include <stdint.h> +#include "ant_boot_settings.h" + +#ifdef __cplusplus +extern "C" { +#endif +/* +* +* A soft-reset(NVIC_SystemReset()) must be executed after the information for the bootloader has been filled in. +* i.e. +* { +* ant_boot_settings_t ant_boot_settings; +* +* ant_boot_settings_clear(&ant_boot_settings); // Clears and set FFs to the memory block +* ant_boot_settings.app_version[0] = version[0]; // Start filling parameters +* ant_boot_settings.app_version[1] = version[1]; +* ant_boot_settings.app_version[2] = version[2]; +* ant_boot_settings_save(&ant_boot_settings); +* ant_boot_settings_validate(1); // Sets in the magic number. Must be done last before the reset!!! +* NVIC_SystemReset(); // Do the soft reset +* } +*/ +void ant_boot_settings_sys_event_handler(uint32_t sys_evt, void * p_context); +void ant_boot_settings_get(const ant_boot_settings_t ** pp_boot_settings); +uint32_t ant_boot_settings_clear(ant_boot_settings_t * boot_settings); +uint32_t ant_boot_settings_save(ant_boot_settings_t * boot_settings); +void ant_boot_settings_validate(bool enter_boot_mode); + + +#ifdef __cplusplus +} +#endif + +#endif //ANT_BOOT_SETTINGS_API_H__ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_dfu_constrains.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_dfu_constrains.h new file mode 100644 index 0000000..4547363 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/boot_common/ant_dfu_constrains.h @@ -0,0 +1,119 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2015 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#ifndef ANT_DFU_CONSTRAINS_H__ +#define ANT_DFU_CONSTRAINS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/**@file + * + * @defgroup ant_dfu_constrains Memory constraints for ANT DFU + * @{ + * + * @ingroup nrf_dfu + * + */ + +#ifdef NRF51 // nrf51 @ S210 + /** End of nRF51 flash */ + #define NRF5x_FLASH_END 0x00040000UL + + /** This field should correspond to the start address of the bootloader, found in the + UICR.BOOTLOADERADDR, 0x10001014, register. This value is used for a sanity check, + so the bootloader will fail immediately if this value differs from the runtime value. + The value is used to determine the maximum DFU region size. */ + #define BOOTLOADER_REGION_START 0x0003B800 + + /** Page location of the bootloader settings address. */ + #define BOOTLOADER_SETTINGS_ADDRESS 0x0003FC00 + + /** Size of a flash codepage. Used for size of the reserved flash space in the bootloader + region. Will be runtime checked against NRF_UICR->CODEPAGESIZE to ensure the region is + correct. */ + #define CODE_PAGE_SIZE 1024 + +#elif defined(NRF52) // nrf52 @ S212 and S332 + /** End of nRF52 flash */ + #define NRF5x_FLASH_END 0x00080000UL + + /** This field should correspond to the start address of the bootloader, found in the + UICR.BOOTLOADERADDR, 0x10001014, register. This value is used for a sanity check, + so the bootloader will fail immediately if this value differs from the runtime value. + The value is used to determine the maximum DFU region size. */ + #define BOOTLOADER_REGION_START 0x00079000 + + /** Page location of the bootloader settings address. */ + #define BOOTLOADER_SETTINGS_ADDRESS (NRF5x_FLASH_END - CODE_PAGE_SIZE) + + /** The sd_mbr_command call may require parameters to be retained in a separate flash page provided by the application. + The uicr register UICR.NRFFW[1] must be set to an address corresponding to this page in the application flash space. */ + #define BOOTLOADER_MBR_RETAINING_PAGE_ADDRESS (BOOTLOADER_SETTINGS_ADDRESS - CODE_PAGE_SIZE) + + /** Size of a flash codepage. Used for size of the reserved flash space in the bootloader + region. Will be runtime checked against NRF_UICR->CODEPAGESIZE to ensure the region is + correct. */ + #define CODE_PAGE_SIZE 4096 + +#else + #error Unknown platform for ANT DFU +#endif + +/**@} */ + + +#ifdef __cplusplus +} +#endif + +#endif //ANT_DFU_CONSTRAINS_H__ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader.h new file mode 100644 index 0000000..a960ef6 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader.h @@ -0,0 +1,127 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_bootloader Bootloader API. + * @{ + * + * @brief Bootloader module interface. + */ + +#ifndef BOOTLOADER_H__ +#define BOOTLOADER_H__ + +#include <stdbool.h> +#include <stdint.h> +#include "bootloader_types.h" +#include <dfu_types.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Function for initializing the Bootloader. + * + * @retval NRF_SUCCESS If bootloader was succesfully initialized. + */ +uint32_t bootloader_init(void); + +/**@brief Function for validating application region. + * + * @param[in] app_addr Address to the region where the application is stored. + * + * @retval true If Application region is valid. + * @retval false If Application region is not valid. + */ +bool bootloader_app_is_valid(uint32_t app_addr); + +/**@brief Function for starting the Device Firmware Update. + * + * @retval NRF_SUCCESS If new appliction image was successfully transfered. + */ +uint32_t bootloader_dfu_start(void); + +/**@brief Function for + * + * @param[in] app_addr Address to the region where the application is stored. + */ +void bootloader_app_start(uint32_t app_addr); + +/**@brief Function for processing DFU status update. + * + * @param[in] update_status DFU update status. + */ +void bootloader_dfu_update_process(dfu_update_status_t update_status); + +/**@brief Function for continuing the Device Firmware Update of a SoftDevice. + * + * @retval NRF_SUCCESS If the final stage of SoftDevice update was successful. + */ +uint32_t bootloader_dfu_sd_update_continue (void); + +uint32_t bootloader_dfu_sd_update_validate(void); + +uint32_t bootloader_dfu_bl_update_continue(void); + +uint32_t bootloader_dfu_ap_update_continue(void); +/**@brief Function for finalizing the Device Firmware Update of a SoftDevice. + * + * @retval NRF_SUCCESS If the final stage of SoftDevice update was successful. + */ +uint32_t bootloader_dfu_sd_update_finalize(void); + +/**@brief Function for writing word into flash. + * + * @param[in] p_dst Address to write. + * @param[in] data Data to write. + * @retval NRF_SUCCESS If the write operation was successful. + */ +uint32_t blocking_flash_word_write(uint32_t * const p_dst, uint32_t data); + + + +#ifdef __cplusplus +} +#endif + +#endif // BOOTLOADER_H__ + +/**@} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader_types.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader_types.h new file mode 100644 index 0000000..cb2834f --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader_types.h @@ -0,0 +1,118 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_bootloader_types Types and definitions. + * @{ + * + * @ingroup nrf_bootloader + * + * @brief Bootloader module type and definitions. + */ + +#ifndef BOOTLOADER_TYPES_H__ +#define BOOTLOADER_TYPES_H__ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +#define BOOTLOADER_SETTINGS_INVALID_APPLICATION 0xDEADBEEF +#define BOOTLOADER_SETTINGS_VALID_APPLICATION 0x00000000 + +#define BOOTLOADER_SETTINGS_SD_IMAGE_SIZE_ADR_OFFSET (0UL) +#define BOOTLOADER_SETTINGS_BL_IMAGE_SIZE_ADR_OFFSET (4UL) +#define BOOTLOADER_SETTINGS_AP_IMAGE_SIZE_ADR_OFFSET (8UL) +#define BOOTLOADER_SETTINGS_SRC_IMAGE_ADR_ADR__OFFSET (12UL) +#define BOOTLOADER_SETTINGS_AP_VALIDITY_ADR_OFFSET (16UL) +#define BOOTLOADER_SETTINGS_RESERVED_1_ADR__OFFSET (20UL) +#define BOOTLOADER_SETTINGS_RESERVED_3_ADR_OFFSET (24UL) +#define BOOTLOADER_SETTINGS_VALID_SLOT_ADR_OFFSET (28UL) + +#define NEW_IMAGE_BANK_DONE (0UL) +#define NEW_IMAGE_BANK_0 (1UL) +#define NEW_IMAGE_BANK_1 (2UL) +#define NEW_IMAGE_BANK_INVALID (3UL) + +#define NEW_IMAGE_SIZE_UNUSED (0x3FFFFFFF) +#define NEW_IMAGE_SIZE_EMPTY (0x00000000) + +#define NEW_IMAGE_INVALID (0xFFFFFFFF) +#define NEW_IMAGE_USED (0x00000000) + +#define SRC_IMAGE_ADDRESS_EMPTY (0xFFFFFFFF) +#define SRC_IMAGE_ADDRESS_INVALID (0x00000000) + +typedef union +{ + uint32_t all; + struct + { + uint32_t size : 30; /**< Size of the new image*/ + uint32_t bank : 2; /**< Which bank it is stored*/ + }st; +}new_image_t; + +/**@brief Structure holding bootloader settings for application and bank data. + * NOTE: If there is a need to update the structure make sure offsets above are still true. + */ +typedef struct +{ + new_image_t sd_image; /**< New Softdevice image size */ + new_image_t bl_image; /**< New Bootloader image size */ + new_image_t ap_image; /**< New Application image size */ + uint32_t src_image_address; /**< New Images storage starting address */ + uint32_t valid_app; /**< Valid application is present if value is 0xFFFFFFFF or 0x00000000 */ + uint32_t reserved_1; + uint32_t reserved_2; + uint32_t valid_slot; /**< Valid bootloader_settings slot. Must be written last*/ +} bootloader_settings_t; + + +#ifdef __cplusplus +} +#endif + +#endif // BOOTLOADER_TYPES_H__ + +/**@} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader_util.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader_util.h new file mode 100644 index 0000000..b1699bd --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/bootloader_util.h @@ -0,0 +1,79 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + /**@file + * + * @defgroup nrf_bootloader_util Bootloader util API. + * @{ + * + * @brief Bootloader util module interface. + */ + +#ifndef BOOTLOADER_UTIL_H__ +#define BOOTLOADER_UTIL_H__ + +#include <stdint.h> +#include "bootloader_types.h" +#include <dfu_types.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Function for starting the application. + * + * @param[in] start_addr Start address. + */ +void bootloader_util_app_start(uint32_t start_addr); + +/**@brief Function for getting the bootloader settings. + * + * @param[out] pp_bootloader_settings Bootloader settings. + */ +void bootloader_util_settings_get(const bootloader_settings_t ** pp_bootloader_settings); + + +#ifdef __cplusplus +} +#endif + +#endif // BOOTLOADER_UTIL_H__ + +/**@} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/debug_pin.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/debug_pin.h new file mode 100644 index 0000000..2310b1b --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/debug_pin.h @@ -0,0 +1,146 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#ifndef DEBUG_PIN_H__ +#define DEBUG_PIN_H__ + +#include "nrf.h" +//#include "nrf51_bitfields.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**********************************************************************************/ +/* Comment this out to DISABLE all Debugging pins especially on official releases.*/ +//#define DEBUGGING_PINS_ENABLE + +#if defined (DEBUGGING_PINS_ENABLE) + #define DEBUG_DFU_BOOTLOADER +// #define DEBUG_UART_STACKCHECK + +#define DEBUG_USE_UART_OUT +#endif // STACK_DEBUGGING_PINS_ENABLE + +/**********************************************************************************/ + +#define DEBUG_PIN_ON(pin) { NRF_GPIO->OUTSET = (1UL << (pin)); } +#define DEBUG_PIN_OFF(pin) { NRF_GPIO->OUTCLR = (1UL << (pin)); } +#define DEBUG_PIN_RISE(pin) { NRF_GPIO->OUTCLR = (1UL << (pin)); NRF_GPIO->OUTSET = (1UL << (pin));} +#define DEBUG_PIN_FALL(pin) { NRF_GPIO->OUTSET = (1UL << (pin)); NRF_GPIO->OUTCLR = (1UL << (pin));} + +/*DEBUG OUT, !!!!WARNING THIS USES UART0!!!! */ + +#if defined (DEBUG_USE_UART_OUT) + +#define DEBUG_UART_INIT(pin) NRF_UART0->PSELRXD = 0xFFFFFFFF;\ + NRF_UART0->PSELTXD = pin;\ + NRF_UART0->CONFIG = 0x00;\ + NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M;\ + NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos;\ + NRF_UART0->TASKS_STARTTX = 1; +#define DEBUG_UART_OUT(val) NRF_UART0->TXD = val + +#else + +#define DEBUG_UART_INIT(pin) +#define DEBUG_UART_OUT(val) + +#endif + +////////////////////////////////////////////////////////////////// +// CONFIGURE DEBUG PINS HERE +////////////////////////////////////////////////////////////////// + +/***************************************** + * APP_DFU + */ +#if defined (DEBUG_DFU_BOOTLOADER) + +/*starts at 24 ends at 32*/ +#define DBG_DFU_BOOTLOADER_PATH 24 +#define DBG_DFU_FLASH_IMAGE_STATUS 25 +#define DBG_DFU_CKPT_PINC 25 +#define DBG_DFU_CKPT_PINA 28 +#define DBG_DFU_CKPT_PINB 29 +//#define DBG_DFU_FLASH_PIN 29 +// #define DBG_DFU_FLASH_ERASE 8 +// #define DBG_DFU_FLASH_WRITE 9 +// #define DBG_DFU_FLASH_RESP 10 +// #define DBG_DFU_FLASH_PSTORAGE_CB 11 +// #define DBG_DFU_FLASH_CB_HANDLER 12 + +#define DBG_DFU_UART_OUT_PIN 30 //antfs_event_process +#define DBG_UART_DFU_ANTFS_EVENT_PIN 30 +#define DBG_UART_ANTFS_DFU_STATE_PIN 30 +#define DBG_UART_DFU_DATA_OFFSET_PIN 30 + + + #define DBG_PIN_DIR_INIT { NRF_GPIO->DIRSET = 0xFFFF0000;\ + DEBUG_UART_INIT(DBG_DFU_UART_OUT_PIN);} +#endif //DEBUG_DFU_BOOTLOADER +/* + * APP_DFU END + *****************************************/ + +#ifndef DBG_PIN_DIR_INIT + #define DBG_PIN_DIR_INIT +#endif + +void stack_debug_Manchester_Start(uint8_t ucPin, uint8_t ucCode); +void stack_debug_Manchester_Stop(uint8_t ucPin); + + +#ifdef __cplusplus +} +#endif + +#endif /* DEBUG_PIN_H_ */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu.h new file mode 100644 index 0000000..6dfb06b --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu.h @@ -0,0 +1,149 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_dfu Device Firmware Update API. + * @{ + * + * @brief Device Firmware Update module interface. + */ + +#ifndef DFU_H__ +#define DFU_H__ + +#include <dfu_types.h> +#include <stdbool.h> +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief DFU event callback for asynchronous calls. + * + * @param[in] result Operation result code. NRF_SUCCESS when a queued operation was successful. + * @param[in] p_data Pointer to the data to which the operation is related. + */ +typedef void (*dfu_callback_t)(uint32_t result, uint8_t * p_data); + +/**@brief Function for initializing the Device Firmware Update module. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t dfu_init(void); + +/**@brief Function for registering a callback listener for \ref dfu_data_pkt_handle callbacks. + */ +void dfu_register_callback(dfu_callback_t callback_handler); + +/**@brief Function for setting the DFU image size. + * + * @details Function sets the DFU image size. This function must be called when an update is started + * in order to notify the DFU of the new image size. If multiple images are to be + * transferred within the same update context then this function must be called with size + * information for each image being transfered. + * If an image type is not being transfered, e.g. SoftDevice but no Application , then the + * image size for application must be zero. + * + * @param[in] p_packet Pointer to the DFU packet containing information on DFU update process to be started. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t dfu_start_pkt_handle(dfu_update_packet_t * p_packet); + +/**@brief Function for handling DFU data packets. + * + * @param[in] p_packet Pointer to the DFU packet. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t dfu_data_pkt_handle(dfu_update_packet_t * p_packet); + +/**@brief Function for handling DFU init packets. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t dfu_init_pkt_handle(dfu_update_packet_t * p_packet); + +/**@brief Function for validating a transferred image after the transfer has completed. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t dfu_image_validate(uint16_t crc_seed); + +/**@brief Function for activating the transfered image after validation has successfully completed. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t dfu_image_activate(void); + +/**@brief Function for reseting the current update procedure and return to initial state. + * + * @details This function call will result in a system reset to ensure correct system behavior. + * The reset will might be scheduled to execute at a later point in time to ensure pending + * flash operations has completed. + * + */ +void dfu_reset(void); + + +uint32_t dfu_bl_image_validate(void); + +uint32_t dfu_sd_image_validate(void); + + +uint32_t dfu_bl_image_swap(void); + +uint32_t dfu_sd_image_swap(void); + +uint32_t dfu_ap_image_swap(void); + +uint32_t dfu_storage_start_address_get(void); + + +#ifdef __cplusplus +} +#endif + +#endif // DFU_H__ + +/** @} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu_transport.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu_transport.h new file mode 100644 index 0000000..e9b140e --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu_transport.h @@ -0,0 +1,77 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_dfu_transport DFU transport API. + * @{ + * + * @brief DFU transport module interface. + */ + +#ifndef DFU_TRANSPORT_H__ +#define DFU_TRANSPORT_H__ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Function for starting the update of Device Firmware. + * + * @retval NRF_SUCCESS Operation success. + */ +uint32_t dfu_transport_update_start(void); + +/**@brief Function for closing the transport layer. + * + * @retval NRF_SUCCESS Operation success. + */ +uint32_t dfu_transport_close(void); + + +#ifdef __cplusplus +} +#endif + +#endif // DFU_TRANSPORT_H__ + +/**@} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu_types.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu_types.h new file mode 100644 index 0000000..e62bb73 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/dfu_types.h @@ -0,0 +1,180 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_dfu_types Types and definitions. + * @{ + * + * @ingroup nrf_dfu + * + * @brief Device Firmware Update module type and definitions. + */ + +#ifndef DFU_TYPES_H__ +#define DFU_TYPES_H__ + +#include <stdint.h> +#include "nrf.h" +#include "app_util.h" +#include "nrf_sdm.h" +#include "ant_dfu_constrains.h" +#include "nrf_mbr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_UICR_BOOT_START_ADDRESS (NRF_UICR_BASE + 0x14) /**< Register where the bootloader start address is stored in the UICR register. */ +#define NRF_UICR_NRFFW_1 (NRF_UICR_BASE + 0x18) /**< Register where the MBR retaining address is stored in the UICR register. */ + +#define CODE_REGION_1_START SD_SIZE_GET(MBR_SIZE) /**< This field should correspond to the size of Code Region 0, (which is identical to Start of Code Region 1), found in UICR.CLEN0 register. This value is used for compile safety, as the linker will fail if application expands into bootloader. Runtime, the bootloader will use the value found in UICR.CLEN0. */ + +#define SOFTDEVICE_REGION_START MBR_SIZE /**< This field should correspond to start address of the bootloader, found in UICR.RESERVED, 0x10001014, register. This value is used for sanity check, so the bootloader will fail immediately if this value differs from runtime value. The value is used to determine max application size for updating. */ + +#define DFU_REGION_TOTAL_SIZE (BOOTLOADER_REGION_START - CODE_REGION_1_START) /**< Total size of the region between SD and Bootloader. */ + +#define DFU_APP_DATA_RESERVED 0x0000 /**< Size of Application Data that must be preserved between application updates. This value must be a multiple of page size. Page size is 0x400 (1024d) bytes, thus this value must be 0x0000, 0x0400, 0x0800, 0x0C00, 0x1000, etc. */ +#define DFU_IMAGE_MAX_SIZE_FULL (DFU_REGION_TOTAL_SIZE - DFU_APP_DATA_RESERVED) /**< Maximum size of a application, excluding save data from the application. */ + +#define DFU_IMAGE_MAX_SIZE_BANKED (((((DFU_REGION_TOTAL_SIZE)/2) - DFU_APP_DATA_RESERVED) / CODE_PAGE_SIZE) * CODE_PAGE_SIZE) /**< Maximum size of a application in dual bank mode, excluding save data from the application. */ + +#define DFU_BL_IMAGE_MAX_SIZE (BOOTLOADER_SETTINGS_ADDRESS - BOOTLOADER_REGION_START) /**< Maximum size of a bootloader, excluding save data from the current bootloader. */ + +#define DFU_BANK_0_REGION_START CODE_REGION_1_START /**< Bank 0 region start. */ +#define DFU_BANK_1_REGION_START (DFU_BANK_0_REGION_START + DFU_IMAGE_MAX_SIZE_BANKED) /**< Bank 1 region start. */ + +#define PACKET_SIZE 512 /**< Size of each data packet. Also used for initial receiving of packets from transport layer. */ +#define PACKET_HEADER_SIZE sizeof(uint32_t) /**< Size of the data packet header. */ + +#define EMPTY_FLASH_MASK 0xFFFFFFFF /**< Bit mask that defines an empty address in flash. */ + +#define INVALID_PACKET 0x00 /**< Invalid packet identifies. */ +#define INIT_PACKET 0x01 /**< Packet identifies for initialization packet. */ +#define START_PACKET 0x02 /**< Packet identifies for the Data Start Packet. */ +#define DATA_PACKET 0x03 /**< Packet identifies for a Data Packet. */ +#define STOP_DATA_PACKET 0x04 /**< Packet identifies for the Data Stop Packet. */ + + +// Safe guard to ensure during compile time that the DFU_APP_DATA_RESERVED is a multiple of page size. +STATIC_ASSERT((((DFU_APP_DATA_RESERVED) & (CODE_PAGE_SIZE - 1)) == 0x00)); + +typedef enum +{ + DFU_UPDATE_NONE = 0x00, /**< Bit field indicating no update is ongoing. */ + DFU_UPDATE_SD = 0x01, /**< Bit field indicating update of SoftDevice is ongoing. */ + DFU_UPDATE_BL = 0x02, /**< Bit field indicating update of bootloader is ongoing. */ + DFU_UPDATE_APP = 0x04 /**< Bit field indicating update of application is ongoing. */ +} dfu_update_mode_t; + + +/**@brief Structure holding a bootloader packet received on the UART. + */ +typedef struct +{ + uint32_t total_image_size; +} dfu_init_packet_t; + +typedef struct +{ + dfu_update_mode_t dfu_update_mode; /**< Packet type, used to identify the content of the received packet referenced by data packet. */ + uint32_t sd_image_size; /** Size of the SoftDevice image to be transferred. Zero if no SoftDevice image will be transfered. */ + uint32_t bl_image_size; /** Size of the Bootloader image to be transferred. Zero if no Bootloader image will be transfered. */ + uint32_t app_image_size; /** Size of the application image to be transmitted. Zero if no Bootloader image will be transfered. */ + uint32_t info_bytes_size; +} dfu_start_packet_t; + +typedef struct +{ + uint32_t packet_length; /**< Packet length of the data packet. Each data is word size, meaning length of 4 is 4 words, not bytes. */ + uint32_t * p_data_packet; /**< Data Packet received. Each data is a word size entry. */ +} dfu_data_packet_t; + +typedef struct +{ + uint32_t packet_type; /**< Packet type, used to identify the content of the received packet referenced by data packet. */ + union { + dfu_init_packet_t init_packet; + dfu_data_packet_t data_packet; /**< Used when packet type is INIT_PACKET or DATA_PACKET. Packet contains data received for init or data. */ + dfu_start_packet_t start_packet; /**< Used when packet type is START_DATA_PACKET. Will contain information on software to be updtaed, i.e. SoftDevice, Bootloader and/or Application along with image sizes. */ + } params; +} dfu_update_packet_t; + +/**@brief DFU status error codes. +*/ +typedef enum +{ + DFU_UPDATE_NEW_IMAGES, + DFU_UPDATE_SD_SWAPPED, + DFU_UPDATE_BL_SWAPPED, + DFU_UPDATE_AP_SWAPPED, + DFU_UPDATE_AP_INVALIDATED, + + DFU_BANK_0_ERASED, /**< Status bank 0 erased.*/ + DFU_BANK_1_ERASED, /**< Status bank 1 erased.*/ + DFU_TIMEOUT, /**< Status timeout.*/ + DFU_RESET /**< Status Reset to indicate current update procedure has been aborted and system should reset. */ +} dfu_update_status_code_t; + + + +/**@brief Structure holding DFU complete event. +*/ +typedef struct +{ + dfu_update_status_code_t status_code; /**< Device Firmware Update status. */ + uint32_t sd_image_size; /**< Size of the recieved SoftDevice. */ + uint32_t bl_image_size; /**< Size of the recieved BootLoader. */ + uint32_t ap_image_size; /**< Size of the recieved Application. */ + uint32_t src_image_address; + uint8_t bank_used; /**< Bank location */ +} dfu_update_status_t; + +/**@brief Update complete handler type. */ +typedef void (*dfu_complete_handler_t)(dfu_update_status_t dfu_update_status); + + +#ifdef __cplusplus +} +#endif + +#endif // DFU_TYPES_H__ + +/**@} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/error_handler.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/error_handler.h new file mode 100644 index 0000000..d3e32d3 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/include/error_handler.h @@ -0,0 +1,102 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** @file + * + * @defgroup app_error Common application error handler + * @{ + * @ingroup app_common + * + * @brief Common application error handler and macros for utilizing a common error handler. + */ + +#ifndef APP_ERROR_H__ +#define APP_ERROR_H__ + +#include <stdint.h> +#include <stdbool.h> +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Function for error handling, which is called when an error has occurred. + * + * @param[in] error_code Error code supplied to the handler. + * @param[in] line_num Line number where the handler is called. + * @param[in] p_file_name Pointer to the file name. + */ +void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name); + +/**@brief Macro for calling error handler function. + * + * @param[in] ERR_CODE Error code supplied to the error handler. + */ +#define APP_ERROR_HANDLER(ERR_CODE) app_error_handler((ERR_CODE), 0, NULL); + +/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS. + * + * @param[in] ERR_CODE Error code supplied to the error handler. + */ +#define APP_ERROR_CHECK(ERR_CODE) app_error_handler((ERR_CODE), 0, NULL); + +/**@brief Macro for calling error handler function if supplied boolean value is false. + * + * @param[in] BOOLEAN_VALUE Boolean value to be evaluated. + */ +#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \ + do \ + { \ + const bool LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \ + if (!LOCAL_BOOLEAN_VALUE) \ + { \ + APP_ERROR_HANDLER(0); \ + } \ + } while (0) + + +#ifdef __cplusplus +} +#endif + +#endif // APP_ERROR_H__ + +/** @} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/main.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/main.c new file mode 100644 index 0000000..31463c9 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/main.c @@ -0,0 +1,395 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/* + * Before compiling this example for NRF52, complete the following steps: + * - Download the S212 SoftDevice from <a href="https://www.thisisant.com/developer/components/nrf52832" target="_blank">thisisant.com</a>. + * - Extract the downloaded zip file and copy the S212 SoftDevice headers to <tt>\<InstallFolder\>/components/softdevice/s212/headers</tt>. + * If you are using Keil packs, copy the files into a @c headers folder in your example folder. + * - Make sure that @ref ANT_LICENSE_KEY in @c nrf_sdm.h is uncommented. + */ + +#include "dfu.h" +#include "dfu_transport.h" +#include "bootloader.h" +#include "bootloader_util.h" +#include <stdint.h> +#include <string.h> +#include <stddef.h> +#include "nordic_common.h" +#include "nrf.h" +#include "app_error.h" +#include "nrf_gpio.h" +#include "nrf_soc.h" +#include "nrf_delay.h" +#include "ant_interface.h" +#include "ant_parameters.h" +#include "ant_error.h" +#include "nrf.h" +#include "app_scheduler.h" +#include "app_timer.h" +#include "nrf_error.h" +#include "boards.h" +#include "nrf_sdh.h" +#include "nrf_sdh_ant.h" +#include "ant_boot_settings_api.h" +#include "antfs_ota.h" +#if !defined (S210_V3_STACK) +#include "nrf_mbr.h" +#endif // !S210_V3_STACK +#include "debug_pin.h" + +#define ENABLE_BUTTON // include button detection +//#define ENABLE_IO_LED // include LED status on N5DK1 i/o board + +#if defined (ENABLE_BUTTON) + #if defined (BOARD_N5DK1) + #define BOOTLOADER_BUTTON_PIN BUTTON_D /**< Button used to enter SW update mode. */ + #else + #define BOOTLOADER_BUTTON_PIN BUTTON_1 /**< Button used to enter SW update mode. */ + #endif +#endif + +#if defined (ENABLE_IO_LED) + #define BOOTLOADER_ERROR_LED LED_C /**< N5DK Leds, set=led off, clr=led on */ + #define BOOTLOADER_ACTIVE_LED LED_D +#endif // ENABLE_IO_LED + +#define SCHED_MAX_EVENT_DATA_SIZE NRF_SDH_ANT_EVT_BUF_SIZE /**< Maximum size of scheduler events. */ + +#define SCHED_QUEUE_SIZE 20 /**< Maximum number of events in the scheduler queue. */ + + +/**@brief Function for error handling, which is called when an error has occurred. + * + * @warning This handler is an example only and does not fit a final product. You need to analyze + * how your product is supposed to react in case of error. + * + * @param[in] error_code Error code supplied to the handler. + * @param[in] line_num Line number where the handler is called. + * @param[in] p_file_name Pointer to the file name. + */ +#if defined (DEBUG_DFU_BOOTLOADER) +uint32_t error_code_; +uint32_t line_num_; +const uint8_t * p_file_name_; +#endif // DEBUG_DFU_BOOTLOADER + +void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info) +{ +#if defined (DEBUG_DFU_BOOTLOADER) + app_error_save_and_stop(id, pc, info); +#endif // DEBUG_DFU_BOOTLOADER + +#if defined (ENABLE_IO_LED) +// nrf_gpio_pin_set(BOOTLOADER_ERROR_LED); +#endif // ENABLE_IO_LED + + // This call can be used for debug purposes during application development. + // On assert, the system can only recover on reset. + NVIC_SystemReset(); +} + +void HardFault_Handler(uint32_t ulProgramCounter, uint32_t ulLinkRegister) +{ + (void)ulProgramCounter; + (void)ulLinkRegister; + + NVIC_SystemReset(); +} + +/**@brief Callback function for asserts in the SoftDevice. + * + * @details This function will be called in case of an assert in the SoftDevice. + * + * @warning This handler is an example only and does not fit a final product. You need to analyze + * how your product is supposed to react in case of Assert. + * @warning On assert from the SoftDevice, the system can only recover on reset. + * + * @param[in] line_num Line number of the failing ASSERT call. + * @param[in] file_name File name of the failing ASSERT call. + */ +void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name) +{ + app_error_handler(0xDEADBEEF, line_num, p_file_name); +} + + +#if defined (ENABLE_IO_LED) +/**@brief Function for initialization of LEDs. + * + * @details Initializes all LEDs used by the application. + */ +static void leds_init(void) +{ + nrf_gpio_cfg_output(LED_A); + nrf_gpio_cfg_output(LED_B); + nrf_gpio_cfg_output(LED_C); + nrf_gpio_cfg_output(LED_D); + + // turn on all leds + nrf_gpio_pin_clear(LED_A); + nrf_gpio_pin_clear(LED_B); + nrf_gpio_pin_clear(LED_C); + nrf_gpio_pin_clear(LED_D); +} +#endif // ENABLE_IO_LED + + +#if defined (ENABLE_IO_LED) +/**@brief Function for clearing the LEDs. + * + * @details Clears all LEDs used by the application. + */ +static void leds_off(void) +{ + nrf_gpio_pin_set(LED_A); // unused + nrf_gpio_pin_set(LED_B); // unused + nrf_gpio_pin_set(LED_C); + nrf_gpio_pin_set(LED_D); +} +#endif // ENABLE_IO_LED + + +/**@brief Function for the Timer initialization. + * + * @details Initializes the timer module. + */ +static void timers_init(void) +{ + ret_code_t err_code = app_timer_init(); + APP_ERROR_CHECK(err_code); +} + + +#if defined (ENABLE_BUTTON) +/**@brief Function for initializing the button module. + */ +static void buttons_init(void) +{ + nrf_gpio_cfg_sense_input(BOOTLOADER_BUTTON_PIN, + BUTTON_PULL, + NRF_GPIO_PIN_SENSE_LOW); +} +#endif // ENABLE_BUTTON + + +/**@brief Function for initializing the ANT stack. */ +static void ant_stack_init(void) +{ + ret_code_t err_code; + + err_code = nrf_sdh_enable_request(); + APP_ERROR_CHECK(err_code); + + // Enable ANT stack. + err_code = nrf_sdh_ant_enable(); + APP_ERROR_CHECK(err_code); +} + + +/**@brief Function for event scheduler initialization. + */ +static void scheduler_init(void) +{ + APP_SCHED_INIT(SCHED_MAX_EVENT_DATA_SIZE, SCHED_QUEUE_SIZE); +} + +static uint32_t enter_boot_get (void ) +{ + uint32_t val = PARAM_FLAGS_ENTER_BOOT_BypassInit; + + if (((*ANT_BOOT_PARAM_FLAGS & PARAM_FLAGS_PARAM_VALID_Msk) >> PARAM_FLAGS_PARAM_VALID_Pos) == PARAM_FLAGS_PARAM_VALID_True ) + { + val = (*ANT_BOOT_PARAM_FLAGS & PARAM_FLAGS_ENTER_BOOT_Msk) >> PARAM_FLAGS_ENTER_BOOT_Pos; + } + + return val; +} + +static void enter_boot_set (uint32_t value) +{ + uint32_t ant_boot_param_flags = *ANT_BOOT_PARAM_FLAGS; + + uint32_t enter_boot = (ant_boot_param_flags >> PARAM_FLAGS_ENTER_BOOT_Pos) & PARAM_FLAGS_ENTER_BOOT_Msk; + if (enter_boot == value) + { + return; // no need to rewrite the same value. + } + + ant_boot_param_flags &= ~PARAM_FLAGS_ENTER_BOOT_Msk; + ant_boot_param_flags |= value << PARAM_FLAGS_ENTER_BOOT_Pos; + + uint32_t err_code = blocking_flash_word_write(ANT_BOOT_PARAM_FLAGS, ant_boot_param_flags); + APP_ERROR_CHECK(err_code); +} + +static void enter_boot_update (void) +{ + const bootloader_settings_t * p_bootloader_settings; + + bootloader_util_settings_get(&p_bootloader_settings); + + if (p_bootloader_settings->ap_image.st.bank == NEW_IMAGE_BANK_0 || p_bootloader_settings->ap_image.st.bank == NEW_IMAGE_BANK_1) + { + enter_boot_set(PARAM_FLAGS_ENTER_BOOT_BypassDone); + } + else + { + if (p_bootloader_settings->valid_app != BOOTLOADER_SETTINGS_INVALID_APPLICATION) + { + enter_boot_set(PARAM_FLAGS_ENTER_BOOT_BypassDone); + return; + } + enter_boot_set(PARAM_FLAGS_ENTER_BOOT_EnterBoot); + } + + // If the current application has been invalidated, then application's self protection is of no use now. + // Lets clear it. + if (p_bootloader_settings->valid_app == BOOTLOADER_SETTINGS_INVALID_APPLICATION) + { + if (*ANT_BOOT_APP_SIZE != APP_SIZE_Empty) + { + uint32_t err_code = blocking_flash_word_write(ANT_BOOT_APP_SIZE, APP_SIZE_Clear); + APP_ERROR_CHECK(err_code); + } + } +} + +/**@brief Function for application main entry. + */ +int main(void) +{ + uint32_t err_code; + bool bootloader_is_pushed = false; + +#if defined (ENABLE_IO_LED) + leds_init(); +#endif // ENABLE_IO_LED +#if defined (ENABLE_BUTTON) + buttons_init(); +#endif + +#if defined (DEBUG_DFU_BOOTLOADER) + NRF_GPIO->DIRSET = 0x40000908; //stack debugging + DBG_PIN_DIR_INIT; +#endif //DEBUG_DFU_BOOTLOADER +#if defined (DBG_DFU_BOOTLOADER_PATH) + DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH); +#endif //DBG_DFU_BOOTLOADER_PATH + + // This check ensures that the defined fields in the bootloader corresponds with actual + // setting in the chip. + APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START); + APP_ERROR_CHECK_BOOL(NRF_FICR->CODEPAGESIZE == CODE_PAGE_SIZE); + +#if !defined (S210_V3_STACK) + sd_mbr_command_t com = {SD_MBR_COMMAND_INIT_SD, }; + + err_code = sd_mbr_command(&com); + APP_ERROR_CHECK(err_code); + + err_code = sd_softdevice_vector_table_base_set(BOOTLOADER_REGION_START); + APP_ERROR_CHECK(err_code); + + err_code = bootloader_dfu_sd_update_continue(); + APP_ERROR_CHECK(err_code); + + err_code = bootloader_dfu_bl_update_continue(); + APP_ERROR_CHECK(err_code); +#endif // !S210_V3_STACK + + // Initialize. + timers_init(); + (void)bootloader_init(); + ant_stack_init(); + scheduler_init(); + +#if defined (ENABLE_BUTTON) + // Push button switch + bootloader_is_pushed = ((nrf_gpio_pin_read(BOOTLOADER_BUTTON_PIN) == 0) ? true: false); + if (bootloader_is_pushed) + { + enter_boot_set(PARAM_FLAGS_ENTER_BOOT_EnterBoot); + } +#endif // ENABLE_BUTTON + + if ((enter_boot_get() == PARAM_FLAGS_ENTER_BOOT_EnterBoot) || + (bootloader_is_pushed) || + (!bootloader_app_is_valid(DFU_BANK_0_REGION_START))) + { + #if defined (DBG_DFU_BOOTLOADER_PATH) + DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH);DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH); + #endif //DBG_DFU_BOOTLOADER_PATH + +#if defined (ENABLE_IO_LED) + leds_off(); + nrf_gpio_pin_clear(BOOTLOADER_ACTIVE_LED); +#endif // ENABLE_IO_LED + + // Initiate an update of the firmware. + err_code = bootloader_dfu_start(); + APP_ERROR_CHECK(err_code); + + enter_boot_update(); + } + +#if defined (ENABLE_IO_LED) + leds_off(); +#endif // ENABLE_IO_LED + + err_code = bootloader_dfu_ap_update_continue(); + APP_ERROR_CHECK(err_code); + + if (bootloader_app_is_valid(DFU_BANK_0_REGION_START)) + { + #if defined (DBG_DFU_BOOTLOADER_PATH) + DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH);DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH);DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH); + #endif //DBG_DFU_BOOTLOADER_PATH + // Select a bank region to use as application region. + // @note: Only applications running from DFU_BANK_0_REGION_START is supported. + bootloader_app_start(DFU_BANK_0_REGION_START); + } + +#if defined (DBG_DFU_BOOTLOADER_PATH) +DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH);DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH);DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH);DEBUG_PIN_FALL(DBG_DFU_BOOTLOADER_PATH); +#endif //DBG_DFU_BOOTLOADER_PATH + NVIC_SystemReset(); +} diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/include/bootloader_types.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/include/bootloader_types.h new file mode 100644 index 0000000..d29ae91 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/include/bootloader_types.h @@ -0,0 +1,114 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_bootloader_types Types and definitions. + * @{ + * + * @ingroup nrf_bootloader + * + * @brief Bootloader module type and definitions. + */ + +#ifndef BOOTLOADER_TYPES_H__ +#define BOOTLOADER_TYPES_H__ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +#define BOOTLOADER_SETTINGS_INVALID_APPLICATION 0xDEADBEEF +#define BOOTLOADER_SETTINGS_VALID_APPLICATION 0x00000000 + +#define BOOTLOADER_SETTINGS_VALID_SLOT_ADR_OFFSET (0UL) +#define BOOTLOADER_SETTINGS_AP_VALIDITY_ADR_OFFSET (4UL) +#define BOOTLOADER_SETTINGS_SD_IMAGE_SIZE_ADR_OFFSET (8UL) +#define BOOTLOADER_SETTINGS_BL_IMAGE_SIZE_ADR_OFFSET (12UL) +#define BOOTLOADER_SETTINGS_AP_IMAGE_SIZE_ADR_OFFSET (16UL) +#define BOOTLOADER_SETTINGS_RESERVED_1_ADR__OFFSET (20UL) +#define BOOTLOADER_SETTINGS_RESERVED_2_ADR_OFFSET (24UL) +#define BOOTLOADER_SETTINGS_RESERVED_3_ADR_OFFSET (28UL) + +#define NEW_IMAGE_BANK_DONE (0UL) +#define NEW_IMAGE_BANK_0 (1UL) +#define NEW_IMAGE_BANK_1 (2UL) +#define NEW_IMAGE_BANK_INVALID (3UL) + +#define NEW_IMAGE_SIZE_UNUSED (0x3FFFFFFF) +#define NEW_IMAGE_SIZE_EMPTY (0x00000000) + +#define NEW_IMAGE_INVALID (0xFFFFFFFF) +#define NEW_IMAGE_USED (0x00000000) +typedef union +{ + uint32_t all; + struct + { + uint32_t size : 30; /**< Size of the new image*/ + uint32_t bank : 2; /**< Which bank it is stored*/ + }st; +}new_image_t; + +/**@brief Structure holding bootloader settings for application and bank data. + * NOTE: If there is a need to update the structure make sure offsets above are still true. + */ +typedef struct +{ + uint32_t valid_slot; /**< Valid bootloader_settings slot. */ + uint32_t valid_app; /**< Valid application is present if value is 0xFFFFFFFF or 0x00000000 */ + new_image_t sd_image; /**< New Softdevice image size */ + new_image_t bl_image; /**< New Bootloader image size */ + new_image_t ap_image; /**< New Application image size */ + uint32_t src_image_address; /**< New Images storage starting address */ + uint32_t reserved_2; + uint32_t reserved_3; +} bootloader_settings_t; + + +#ifdef __cplusplus +} +#endif + +#endif // BOOTLOADER_TYPES_H__ + +/**@} */ diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/main.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/main.c new file mode 100644 index 0000000..2405496 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/main.c @@ -0,0 +1,252 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2014 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +#include <stdbool.h> +#include <stdint.h> +#include <string.h> +#include "app_error.h" +#include "ant_interface.h" +#include "ant_boot_settings_api.h" +#include "ant_channel_config.h" +#include "app_util_platform.h" +#include "nrf_sdh.h" +#include "nrf_sdh_ant.h" + +#include "nrf_log.h" +#include "nrf_log_ctrl.h" +#include "nrf_log_default_backends.h" + + +// Application's ANT observer priority. +#define APP_ANT_OBSERVER_PRIO 1 + +// Channel configuration. +#define ANT_CHANNEL_NUMBER 0x00 /**< ANT Channel Number*/ +#define ANT_RF_FREQUENCY 0x32u /**< Channel RF Frequency = (2400 + 50)MHz */ +#define ANT_CHANNEL_PERIOD 8192u /**< Channel period 4 Hz. */ +#define ANT_EXT_ASSIGN 0x00 /**< ANT Ext Assign. */ +#define ANT_NETWORK_NUMBER 0x00 /**< Network Number */ +#define ANT_TRANSMIT_POWER 0u /**< ANT Custom Transmit Power (Invalid/Not Used). */ + +// Channel ID configuration. +#define ANT_DEV_TYPE 0x20u /**< Device type = 32. */ +#define ANT_TRANS_TYPE 0x05u /**< Transmission type. */ +#define ANT_DEV_NUM (NRF_FICR->DEVICEID[0]) /**< Device number. */ + +// Test broadcast data +#define BROADCAST_PAYLOAD {0x01, 0x00, 0x00, 0x00, 0x00, 0xC0, 0xFF, 0xEE} +#define BROADCAST_DATA_BUFFER_SIZE 8 + +// Version string +#define VERSION_STRING "BFM1.00B01" + +// Message definitions +#define COMMAND_ID 0x02u +#define COMMAND_RESTART_BOOTLOADER 0x01u + +static const uint8_t m_version_string[] = VERSION_STRING; // Version string +static volatile bool m_restart_in_bootloader = false; // Flag indicating to start bootloader + + +/**@brief Reset the device, and start bootloader +*/ +static void restart_in_bootloader(void) +{ + ret_code_t err_code; + bool enter_boot_mode = true; + __ALIGN(4) static ant_boot_settings_t ant_boot_settings; + + // Clear and set FFs to the memory block. + err_code = ant_boot_settings_clear(&ant_boot_settings); + APP_ERROR_CHECK(err_code); + + // Fill ant_boot_settings structure. + memcpy((void *) ant_boot_settings.app_version, m_version_string, sizeof(m_version_string)); + ant_boot_settings.app_size = 2000; // Estimated current application size used to try to preserve itself + + // Save ant_boot_settings structure. + err_code = ant_boot_settings_save(&ant_boot_settings); + APP_ERROR_CHECK(err_code); + + // Sets flag to indicate restarting in bootloader mode. Must be done last before the reset!!! + ant_boot_settings_validate(enter_boot_mode); + + NRF_LOG_FINAL_FLUSH(); + NVIC_SystemReset(); +} + + +/**@brief Function for setting up the ANT module to be ready for TX broadcast. + */ +static void ant_channel_tx_broadcast_setup(void) +{ + ret_code_t err_code; + uint8_t broadcast_data[] = BROADCAST_PAYLOAD; + + ant_channel_config_t broadcast_channel_config = + { + .channel_number = ANT_CHANNEL_NUMBER, + .channel_type = CHANNEL_TYPE_MASTER, + .ext_assign = ANT_EXT_ASSIGN, + .rf_freq = ANT_RF_FREQUENCY, + .transmission_type = ANT_TRANS_TYPE, + .device_type = ANT_DEV_TYPE, + .device_number = ANT_DEV_NUM, + .channel_period = ANT_CHANNEL_PERIOD, + .network_number = ANT_NETWORK_NUMBER, + }; + + err_code = ant_channel_init(&broadcast_channel_config); + APP_ERROR_CHECK(err_code); + + // Setup broadcast payload + err_code = sd_ant_broadcast_message_tx(ANT_CHANNEL_NUMBER, + BROADCAST_DATA_BUFFER_SIZE, + broadcast_data); + if (err_code != NRF_ANT_ERROR_CHANNEL_IN_WRONG_STATE) + { + APP_ERROR_CHECK(err_code); + } + + // Open channel. + err_code = sd_ant_channel_open(ANT_CHANNEL_NUMBER); + APP_ERROR_CHECK(err_code); +} + + +/**@brief Function for handling ANT TX channel events. + * + * @param[in] p_ant_evt ANT stack event. + * @param[in] p_context Context. + */ +static void ant_evt_handler(ant_evt_t * p_ant_evt, void * p_context) +{ + uint8_t page_num; + uint8_t command; + + switch (p_ant_evt->event) + { + case EVENT_RX: + switch (p_ant_evt->message.ANT_MESSAGE_ucMesgID) + { + case MESG_BROADCAST_DATA_ID: + case MESG_ACKNOWLEDGED_DATA_ID: + page_num = p_ant_evt->message.ANT_MESSAGE_aucPayload[0]; + command = p_ant_evt->message.ANT_MESSAGE_aucPayload[7]; + if (page_num == COMMAND_ID && command == COMMAND_RESTART_BOOTLOADER) + { + NRF_LOG_INFO("Received ANT command to start bootloader"); + m_restart_in_bootloader = true; + } + break; + } + break; + default: + break; + } +} + +NRF_SDH_ANT_OBSERVER(m_ant_observer, APP_ANT_OBSERVER_PRIO, ant_evt_handler, NULL); + +/**@brief Function for ANT stack initialization. + */ +static void softdevice_setup(void) +{ + ret_code_t err_code = nrf_sdh_enable_request(); + APP_ERROR_CHECK(err_code); + + ASSERT(nrf_sdh_is_enabled()); + + err_code = nrf_sdh_ant_enable(); + APP_ERROR_CHECK(err_code); +} + + +/**@brief Function for initializing the nrf log module. + */ +static void log_init(void) +{ + ret_code_t err_code = NRF_LOG_INIT(NULL); + APP_ERROR_CHECK(err_code); + + NRF_LOG_DEFAULT_BACKENDS_INIT(); +} + + +/**@brief Function for application main entry. Does not return. + */ +int main(void) +{ + // Initialize. + log_init(); + softdevice_setup(); + ant_channel_tx_broadcast_setup(); + + // Start execution. + NRF_LOG_INFO("ANT OTA tester example started."); + + // Main loop. + for (;;) + { + if (NRF_LOG_PROCESS() == false) + { + // Put CPU in sleep if possible. + ret_code_t err_code = sd_app_evt_wait(); + APP_ERROR_CHECK(err_code); + + if (m_restart_in_bootloader) + { + restart_in_bootloader(); + } + } + } +} + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/ota_tester.xml b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/ota_tester.xml new file mode 100644 index 0000000..c10d1f2 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/ota_tester.xml @@ -0,0 +1,122 @@ +<?xml version="1.0" encoding="utf-8"?> +<SingleDeviceProfile> + <!--ANTWare_II Single Device Profile - Created:2017-09-12 09:34:57--> + <DeviceProfile> + <DeviceInfo> + <NumChannels>8</NumChannels> + </DeviceInfo> + <DeviceSetup /> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Slave_Receive_0x00</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">0</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">32</deviceType> + <transmissionType type="System.Byte">0</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">50</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">34</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">35</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">36</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">37</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">38</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">39</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + <ChannelProfile> + <channelType type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelType">BASE_Master_Transmit_0x10</channelType> + <channelTypeExt type="ANT_Managed_Library.ANT_ReferenceLibrary+ChannelTypeExtended">0</channelTypeExt> + <networkNum type="System.Byte">0</networkNum> + <deviceNumber type="System.UInt16">40</deviceNumber> + <pairingOn type="System.Boolean">false</pairingOn> + <deviceType type="System.Byte">1</deviceType> + <transmissionType type="System.Byte">1</transmissionType> + <msgPeriod type="System.UInt16">8192</msgPeriod> + <radioFreq type="System.Byte">66</radioFreq> + <chTxPower type="ANT_Managed_Library.ANT_ReferenceLibrary+TransmitPower">RADIO_TX_POWER_0DB_0x03</chTxPower> + <searchTimeout type="System.Byte">10</searchTimeout> + <lowPriSearchTimeout type="System.Byte">2</lowPriSearchTimeout> + </ChannelProfile> + </DeviceProfile> +</SingleDeviceProfile>
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</OPTFL> <DebugOpt> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN1 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf52xxx -FS00 -FL0200000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + </TargetOption> + </Target></ProjectOpt> + + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm4/ota_tester_pca10040_s212.uvproj b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm4/ota_tester_pca10040_s212.uvproj new file mode 100644 index 0000000..9088a74 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm4/ota_tester_pca10040_s212.uvproj @@ -0,0 +1,533 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> <Target> + <TargetName>nrf52832_xxaa</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>nRF52832_xxAA</Device> + <Vendor>Nordic Semiconductor</Vendor> + <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(64000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-UM0364FCE -O78 -S0 -C0 -TO18 -TC16000000 -TP21 -TDS800D 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<CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\_build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName></SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll></SimDlgDll> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>0</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>-1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>Segger\JL2CM3.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4099</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>Segger\JL2CM3.dll</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>5</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x12000</StartAddress> + <Size>0x6e000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000b80</StartAddress> + <Size>0xf480</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <VariousControls> + <MiscControls>--c99 --reduce_paths</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT __HEAP_SIZE=8192 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\..\components\ant\ant_channel_config;..\..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\..\components\libraries\hardfault;..\..\..\..\..\..\..\..\components\libraries\hardfault\nrf52;..\..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\include\boot_common;..\..\..\include;..\..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\..\external\segger_rtt;..\..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <VariousControls> + <MiscControls> --cpreproc_opts=-DANT_STACK_SUPPORT_REQD,-DBOARD_PCA10040,-DCONFIG_GPIO_AS_PINRESET,-DFLOAT_ABI_HARD,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_74,-DS212,-DSOFTDEVICE_PRESENT,-D__HEAP_SIZE=8192,-D__STACK_SIZE=8192</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT __HEAP_SIZE=8192 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\..\components\ant\ant_channel_config;..\..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\..\components\libraries\hardfault;..\..\..\..\..\..\..\..\components\libraries\hardfault\nrf52;..\..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\include\boot_common;..\..\..\include;..\..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\..\external\segger_rtt;..\..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x00000000</TextAddressRange> + <DataAddressRange>0x00000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc>--diag_suppress 6330</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> <Group> + <GroupName>None</GroupName> + <Files> <File> + <FileName>arm_startup_nrf52.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\mdk\arm_startup_nrf52.s</FilePath> </File> <File> + <FileName>system_nrf52.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\mdk\system_nrf52.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Application</GroupName> + <Files> <File> + <FileName>ant_boot_settings_api.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\ant_boot_settings_api.c</FilePath> </File> <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\main.c</FilePath> </File> <File> + <FileName>sdk_config.h</FileName> + <FileType>5</FileType> + <FilePath>..\config\sdk_config.h</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Board Definition</GroupName> + <Files> <File> + <FileName>boards.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\boards\boards.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_ANT</GroupName> + <Files> <File> + <FileName>ant_channel_config.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\ant\ant_channel_config\ant_channel_config.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Drivers</GroupName> + <Files> <File> + <FileName>nrf_drv_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_uart.c</FilePath> </File> <File> + <FileName>nrfx_prs.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\drivers\src\prs\nrfx_prs.c</FilePath> </File> <File> + <FileName>nrfx_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_uart.c</FilePath> </File> <File> + <FileName>nrfx_uarte.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_uarte.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Libraries</GroupName> + <Files> <File> + <FileName>app_error.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_error.c</FilePath> </File> <File> + <FileName>app_error_handler_keil.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_error_handler_keil.c</FilePath> </File> <File> + <FileName>app_error_weak.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_error_weak.c</FilePath> </File> <File> + <FileName>app_util_platform.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_util_platform.c</FilePath> </File> <File> + <FileName>hardfault_handler_keil.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\hardfault\nrf52\handler\hardfault_handler_keil.c</FilePath> </File> <File> + <FileName>hardfault_implementation.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\hardfault\hardfault_implementation.c</FilePath> </File> <File> + <FileName>nrf_assert.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\nrf_assert.c</FilePath> </File> <File> + <FileName>nrf_atomic.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.c</FilePath> </File> <File> + <FileName>nrf_balloc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.c</FilePath> </File> <File> + <FileName>nrf_fprintf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\fprintf\nrf_fprintf.c</FilePath> </File> <File> + <FileName>nrf_fprintf_format.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\fprintf\nrf_fprintf_format.c</FilePath> </File> <File> + <FileName>nrf_memobj.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_memobj\nrf_memobj.c</FilePath> </File> <File> + <FileName>nrf_section_iter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.c</FilePath> </File> <File> + <FileName>nrf_strerror.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Log</GroupName> + <Files> <File> + <FileName>nrf_log_backend_rtt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_backend_rtt.c</FilePath> </File> <File> + <FileName>nrf_log_backend_serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_backend_serial.c</FilePath> </File> <File> + <FileName>nrf_log_backend_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_backend_uart.c</FilePath> </File> <File> + <FileName>nrf_log_default_backends.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_default_backends.c</FilePath> </File> <File> + <FileName>nrf_log_frontend.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_frontend.c</FilePath> </File> <File> + <FileName>nrf_log_str_formatter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_str_formatter.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Segger_RTT</GroupName> + <Files> <File> + <FileName>SEGGER_RTT.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT.c</FilePath> </File> <File> + <FileName>SEGGER_RTT_Syscalls_KEIL.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_Syscalls_KEIL.c</FilePath> </File> <File> + <FileName>SEGGER_RTT_printf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_printf.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_SoftDevice</GroupName> + <Files> <File> + <FileName>nrf_sdh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh.c</FilePath> </File> <File> + <FileName>nrf_sdh_ant.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ant.c</FilePath> </File> <File> + <FileName>nrf_sdh_soc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_soc.c</FilePath> </File> </Files> + </Group> </Groups> + </Target> </Targets> + +</Project> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm5_no_packs/ota_tester_pca10040_s212.uvoptx b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm5_no_packs/ota_tester_pca10040_s212.uvoptx new file mode 100644 index 0000000..7ccb08c --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm5_no_packs/ota_tester_pca10040_s212.uvoptx @@ -0,0 +1,115 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + <Target> + <TargetName>nrf52832_xxaa</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\_build\</ListingPath> + </OPTLEX> + <CpuCode>0</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>1</tPdscDbg> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>7</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U408001579 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf52xxx -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx))</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target></ProjectOpt> + + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm5_no_packs/ota_tester_pca10040_s212.uvprojx b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm5_no_packs/ota_tester_pca10040_s212.uvprojx new file mode 100644 index 0000000..0667b3e --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/arm5_no_packs/ota_tester_pca10040_s212.uvprojx @@ -0,0 +1,557 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> <Target> + <TargetName>nrf52832_xxaa</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> <Device>nRF52832_xxAA</Device> + <Vendor>Nordic Semiconductor</Vendor> + <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.16.0</PackID> + <PackURL>http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/</PackURL> <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(64000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll></FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:nRF52832_xxAA$Device\Include\nrf.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>..\..\..\..\..\..\..\..\modules\nrfx\mdk\nrf52.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\_build\</OutputDirectory> + <OutputName>nrf52832_xxaa</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\_build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName></SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll></SimDlgDll> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> <UsePdscDebugDescription>1</UsePdscDebugDescription> </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>-1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>Segger\JL2CM3.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4099</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>Segger\JL2CM3.dll</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x12000</StartAddress> + <Size>0x6e000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000b80</StartAddress> + <Size>0xf480</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <v6Lang>0</v6Lang> + <v6LangP>0</v6LangP> + <vShortEn>0</vShortEn> + <vShortWch>0</vShortWch> + <VariousControls> + <MiscControls>--reduce_paths</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT __HEAP_SIZE=8192 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\..\components\ant\ant_channel_config;..\..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\..\components\libraries\hardfault;..\..\..\..\..\..\..\..\components\libraries\hardfault\nrf52;..\..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\include\boot_common;..\..\..\include;..\..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\..\external\segger_rtt;..\..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls> --cpreproc_opts=-DANT_STACK_SUPPORT_REQD,-DBOARD_PCA10040,-DCONFIG_GPIO_AS_PINRESET,-DFLOAT_ABI_HARD,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_74,-DS212,-DSOFTDEVICE_PRESENT,-D__HEAP_SIZE=8192,-D__STACK_SIZE=8192</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT __HEAP_SIZE=8192 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\..\components\ant\ant_channel_config;..\..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\..\components\libraries\hardfault;..\..\..\..\..\..\..\..\components\libraries\hardfault\nrf52;..\..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\include\boot_common;..\..\..\include;..\..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\..\external\segger_rtt;..\..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x00000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc>--diag_suppress 6330</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> <Group> + <GroupName>Application</GroupName> + <Files> <File> + <FileName>ant_boot_settings_api.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\ant_boot_settings_api.c</FilePath> </File> <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\main.c</FilePath> </File> <File> + <FileName>sdk_config.h</FileName> + <FileType>5</FileType> + <FilePath>..\config\sdk_config.h</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Board Definition</GroupName> + <Files> <File> + <FileName>boards.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\boards\boards.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_ANT</GroupName> + <Files> <File> + <FileName>ant_channel_config.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\ant\ant_channel_config\ant_channel_config.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Drivers</GroupName> + <Files> <File> + <FileName>nrf_drv_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_uart.c</FilePath> </File> <File> + <FileName>nrfx_prs.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\drivers\src\prs\nrfx_prs.c</FilePath> </File> <File> + <FileName>nrfx_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_uart.c</FilePath> </File> <File> + <FileName>nrfx_uarte.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_uarte.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Libraries</GroupName> + <Files> <File> + <FileName>app_error.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_error.c</FilePath> </File> <File> + <FileName>app_error_handler_keil.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_error_handler_keil.c</FilePath> </File> <File> + <FileName>app_error_weak.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_error_weak.c</FilePath> </File> <File> + <FileName>app_util_platform.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\app_util_platform.c</FilePath> </File> <File> + <FileName>hardfault_handler_keil.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\hardfault\nrf52\handler\hardfault_handler_keil.c</FilePath> </File> <File> + <FileName>hardfault_implementation.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\hardfault\hardfault_implementation.c</FilePath> </File> <File> + <FileName>nrf_assert.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\util\nrf_assert.c</FilePath> </File> <File> + <FileName>nrf_atomic.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.c</FilePath> </File> <File> + <FileName>nrf_balloc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.c</FilePath> </File> <File> + <FileName>nrf_fprintf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\fprintf\nrf_fprintf.c</FilePath> </File> <File> + <FileName>nrf_fprintf_format.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\fprintf\nrf_fprintf_format.c</FilePath> </File> <File> + <FileName>nrf_memobj.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_memobj\nrf_memobj.c</FilePath> </File> <File> + <FileName>nrf_section_iter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.c</FilePath> </File> <File> + <FileName>nrf_strerror.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Log</GroupName> + <Files> <File> + <FileName>nrf_log_backend_rtt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_backend_rtt.c</FilePath> </File> <File> + <FileName>nrf_log_backend_serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_backend_serial.c</FilePath> </File> <File> + <FileName>nrf_log_backend_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_backend_uart.c</FilePath> </File> <File> + <FileName>nrf_log_default_backends.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_default_backends.c</FilePath> </File> <File> + <FileName>nrf_log_frontend.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_frontend.c</FilePath> </File> <File> + <FileName>nrf_log_str_formatter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_str_formatter.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Segger_RTT</GroupName> + <Files> <File> + <FileName>SEGGER_RTT.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT.c</FilePath> </File> <File> + <FileName>SEGGER_RTT_Syscalls_KEIL.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_Syscalls_KEIL.c</FilePath> </File> <File> + <FileName>SEGGER_RTT_printf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_printf.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_SoftDevice</GroupName> + <Files> <File> + <FileName>nrf_sdh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh.c</FilePath> </File> <File> + <FileName>nrf_sdh_ant.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ant.c</FilePath> </File> <File> + <FileName>nrf_sdh_soc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_soc.c</FilePath> </File> </Files> + </Group> </Groups> + </Target> </Targets><RTE> + <packages> + <filter> + <targetInfos/> + </filter> <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"> + <targetInfos> <targetInfo name="nrf52832_xxaa" versionMatchMode="fixed"/> </targetInfos> + </package> + <package name="nRF_DeviceFamilyPack" url="http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/" vendor="NordicSemiconductor" version="8.16.0"> + <targetInfos> <targetInfo name="nrf52832_xxaa" versionMatchMode="fixed"/> </targetInfos> + </package> </packages> + <apis/> + <components> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/> + <targetInfos> <targetInfo name="nrf52832_xxaa" versionMatchMode="fixed"/> </targetInfos> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="NordicSemiconductor" Cversion="8.16.0" condition="nRF5x Series CMSIS Device"> + <package name="nRF_DeviceFamilyPack" url="http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/" vendor="NordicSemiconductor" version="8.16.0"/> + <targetInfos> <targetInfo name="nrf52832_xxaa" versionMatchMode="fixed"/> </targetInfos> + </component> </components> + <files> </files> +</RTE> +</Project> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/armgcc/Makefile b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/armgcc/Makefile new file mode 100644 index 0000000..73e7a08 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/armgcc/Makefile @@ -0,0 +1,180 @@ +PROJECT_NAME := ota_tester_pca10040_s212 +TARGETS := nrf52832_xxaa +OUTPUT_DIRECTORY := _build + +SDK_ROOT := ../../../../../../../.. +PROJ_DIR := ../../.. + +$(OUTPUT_DIRECTORY)/nrf52832_xxaa.out: \ + LINKER_SCRIPT := ota_tester_gcc_nrf52.ld + +# Source files common to all targets +SRC_FILES += \ + $(SDK_ROOT)/modules/nrfx/mdk/gcc_startup_nrf52.S \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_backend_rtt.c \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_backend_serial.c \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_backend_uart.c \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_default_backends.c \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_frontend.c \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_str_formatter.c \ + $(SDK_ROOT)/components/boards/boards.c \ + $(SDK_ROOT)/components/libraries/util/app_error.c \ + $(SDK_ROOT)/components/libraries/util/app_error_handler_gcc.c \ + $(SDK_ROOT)/components/libraries/util/app_error_weak.c \ + $(SDK_ROOT)/components/libraries/util/app_util_platform.c \ + $(SDK_ROOT)/components/libraries/hardfault/nrf52/handler/hardfault_handler_gcc.c \ + $(SDK_ROOT)/components/libraries/hardfault/hardfault_implementation.c \ + $(SDK_ROOT)/components/libraries/util/nrf_assert.c \ + $(SDK_ROOT)/components/libraries/atomic/nrf_atomic.c \ + $(SDK_ROOT)/components/libraries/balloc/nrf_balloc.c \ + $(SDK_ROOT)/external/fprintf/nrf_fprintf.c \ + $(SDK_ROOT)/external/fprintf/nrf_fprintf_format.c \ + $(SDK_ROOT)/components/libraries/experimental_memobj/nrf_memobj.c \ + $(SDK_ROOT)/components/libraries/experimental_section_vars/nrf_section_iter.c \ + $(SDK_ROOT)/components/libraries/strerror/nrf_strerror.c \ + $(SDK_ROOT)/integration/nrfx/legacy/nrf_drv_uart.c \ + $(SDK_ROOT)/modules/nrfx/drivers/src/prs/nrfx_prs.c \ + $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_uart.c \ + $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_uarte.c \ + $(SDK_ROOT)/components/ant/ant_channel_config/ant_channel_config.c \ + $(PROJ_DIR)/../ant_boot_settings_api.c \ + $(PROJ_DIR)/main.c \ + $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT.c \ + $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT_Syscalls_GCC.c \ + $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT_printf.c \ + $(SDK_ROOT)/modules/nrfx/mdk/system_nrf52.c \ + $(SDK_ROOT)/components/softdevice/common/nrf_sdh.c \ + $(SDK_ROOT)/components/softdevice/common/nrf_sdh_ant.c \ + $(SDK_ROOT)/components/softdevice/common/nrf_sdh_soc.c \ + +# Include folders common to all targets +INC_FOLDERS += \ + $(SDK_ROOT)/components/libraries/hardfault \ + $(SDK_ROOT)/components/libraries/hardfault/nrf52 \ + $(SDK_ROOT)/integration/nrfx \ + $(SDK_ROOT)/components/softdevice/s212/headers/nrf52 \ + ../config \ + $(SDK_ROOT)/components/libraries/experimental_section_vars \ + $(SDK_ROOT)/modules/nrfx/mdk \ + $(SDK_ROOT)/components/libraries/strerror \ + $(SDK_ROOT)/components/boards \ + $(SDK_ROOT)/components/libraries/experimental_memobj \ + $(SDK_ROOT)/components/softdevice/s212/headers \ + $(SDK_ROOT)/modules/nrfx/hal \ + $(SDK_ROOT)/modules/nrfx/drivers/include \ + $(SDK_ROOT)/components/ant/ant_channel_config \ + $(SDK_ROOT)/external/fprintf \ + $(SDK_ROOT)/components/libraries/balloc \ + $(SDK_ROOT)/components/libraries/util \ + $(SDK_ROOT)/modules/nrfx \ + $(PROJ_DIR)/include \ + $(SDK_ROOT)/components/softdevice/common \ + $(SDK_ROOT)/components \ + $(SDK_ROOT)/external/segger_rtt \ + $(SDK_ROOT)/integration/nrfx/legacy \ + $(SDK_ROOT)/components/libraries/experimental_log \ + $(SDK_ROOT)/components/libraries/experimental_log/src \ + $(SDK_ROOT)/components/libraries/atomic \ + $(SDK_ROOT)/components/libraries/delay \ + $(SDK_ROOT)/components/toolchain/cmsis/include \ + $(PROJ_DIR)/../include/boot_common \ + +# Libraries common to all targets +LIB_FILES += \ + +# Optimization flags +OPT = -O3 -g3 +# Uncomment the line below to enable link time optimization +#OPT += -flto + +# C flags common to all targets +CFLAGS += $(OPT) +CFLAGS += -DANT_STACK_SUPPORT_REQD +CFLAGS += -DBOARD_PCA10040 +CFLAGS += -DCONFIG_GPIO_AS_PINRESET +CFLAGS += -DFLOAT_ABI_HARD +CFLAGS += -DNRF52 +CFLAGS += -DNRF52832_XXAA +CFLAGS += -DNRF52_PAN_74 +CFLAGS += -DS212 +CFLAGS += -DSOFTDEVICE_PRESENT +CFLAGS += -mcpu=cortex-m4 +CFLAGS += -mthumb -mabi=aapcs +CFLAGS += -Wall -Werror +CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 +# keep every function in a separate section, this allows linker to discard unused ones +CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing +CFLAGS += -fno-builtin -fshort-enums + +# C++ flags common to all targets +CXXFLAGS += $(OPT) + +# Assembler flags common to all targets +ASMFLAGS += -g3 +ASMFLAGS += -mcpu=cortex-m4 +ASMFLAGS += -mthumb -mabi=aapcs +ASMFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 +ASMFLAGS += -DANT_STACK_SUPPORT_REQD +ASMFLAGS += -DBOARD_PCA10040 +ASMFLAGS += -DCONFIG_GPIO_AS_PINRESET +ASMFLAGS += -DFLOAT_ABI_HARD +ASMFLAGS += -DNRF52 +ASMFLAGS += -DNRF52832_XXAA +ASMFLAGS += -DNRF52_PAN_74 +ASMFLAGS += -DS212 +ASMFLAGS += -DSOFTDEVICE_PRESENT + +# Linker flags +LDFLAGS += $(OPT) +LDFLAGS += -mthumb -mabi=aapcs -L$(SDK_ROOT)/modules/nrfx/mdk -T$(LINKER_SCRIPT) +LDFLAGS += -mcpu=cortex-m4 +LDFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 +# let linker dump unused sections +LDFLAGS += -Wl,--gc-sections +# use newlib in nano version +LDFLAGS += --specs=nano.specs + +nrf52832_xxaa: CFLAGS += -D__HEAP_SIZE=8192 +nrf52832_xxaa: CFLAGS += -D__STACK_SIZE=8192 +nrf52832_xxaa: ASMFLAGS += -D__HEAP_SIZE=8192 +nrf52832_xxaa: ASMFLAGS += -D__STACK_SIZE=8192 + +# Add standard libraries at the very end of the linker input, after all objects +# that may need symbols provided by these libraries. +LIB_FILES += -lc -lnosys -lm + + +.PHONY: default help + +# Default target - first one defined +default: nrf52832_xxaa + +# Print all targets that can be built +help: + @echo following targets are available: + @echo nrf52832_xxaa + @echo sdk_config - starting external tool for editing sdk_config.h + @echo flash - flashing binary + +TEMPLATE_PATH := $(SDK_ROOT)/components/toolchain/gcc + + +include $(TEMPLATE_PATH)/Makefile.common + +$(foreach target, $(TARGETS), $(call define_target, $(target))) + +.PHONY: flash erase + +# Flash the program +flash: $(OUTPUT_DIRECTORY)/nrf52832_xxaa.hex + @echo Flashing: $< + nrfjprog -f nrf52 --program $< --sectorerase + nrfjprog -f nrf52 --reset + +erase: + nrfjprog -f nrf52 --eraseall + +SDK_CONFIG_FILE := ../config/sdk_config.h +CMSIS_CONFIG_TOOL := $(SDK_ROOT)/external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar +sdk_config: + java -jar $(CMSIS_CONFIG_TOOL) $(SDK_CONFIG_FILE) diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/armgcc/ota_tester_gcc_nrf52.ld b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/armgcc/ota_tester_gcc_nrf52.ld new file mode 100644 index 0000000..52daead --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/armgcc/ota_tester_gcc_nrf52.ld @@ -0,0 +1,88 @@ +/* Linker script to configure memory regions. */ + +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x12000, LENGTH = 0x6e000 + RAM (rwx) : ORIGIN = 0x20000b80, LENGTH = 0xf480 + ant_boot_settings (r) : ORIGIN = 0x0007FF80, LENGTH = 0x80 +} + +SECTIONS +{ + .ant_boot_settings(NOLOAD) : + { + PROVIDE(__start_ant_boot_settings = .); + KEEP(*(SORT(.ant_boot_settings*))) + PROVIDE(__stop_ant_boot_settings = .); + } > ant_boot_settings +} + +SECTIONS +{ + . = ALIGN(4); + .mem_section_dummy_ram : + { + } + .log_dynamic_data : + { + PROVIDE(__start_log_dynamic_data = .); + KEEP(*(SORT(.log_dynamic_data*))) + PROVIDE(__stop_log_dynamic_data = .); + } > RAM + +} INSERT AFTER .data; + +SECTIONS +{ + .mem_section_dummy_rom : + { + } + .sdh_ant_observers : + { + PROVIDE(__start_sdh_ant_observers = .); + KEEP(*(SORT(.sdh_ant_observers*))) + PROVIDE(__stop_sdh_ant_observers = .); + } > FLASH + .sdh_soc_observers : + { + PROVIDE(__start_sdh_soc_observers = .); + KEEP(*(SORT(.sdh_soc_observers*))) + PROVIDE(__stop_sdh_soc_observers = .); + } > FLASH + .log_const_data : + { + PROVIDE(__start_log_const_data = .); + KEEP(*(SORT(.log_const_data*))) + PROVIDE(__stop_log_const_data = .); + } > FLASH + .nrf_balloc : + { + PROVIDE(__start_nrf_balloc = .); + KEEP(*(.nrf_balloc)) + PROVIDE(__stop_nrf_balloc = .); + } > FLASH + .sdh_state_observers : + { + PROVIDE(__start_sdh_state_observers = .); + KEEP(*(SORT(.sdh_state_observers*))) + PROVIDE(__stop_sdh_state_observers = .); + } > FLASH + .sdh_stack_observers : + { + PROVIDE(__start_sdh_stack_observers = .); + KEEP(*(SORT(.sdh_stack_observers*))) + PROVIDE(__stop_sdh_stack_observers = .); + } > FLASH + .sdh_req_observers : + { + PROVIDE(__start_sdh_req_observers = .); + KEEP(*(SORT(.sdh_req_observers*))) + PROVIDE(__stop_sdh_req_observers = .); + } > FLASH + +} INSERT AFTER .text + +INCLUDE "nrf_common.ld" diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/config/sdk_config.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/config/sdk_config.h new file mode 100644 index 0000000..25089ed --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/config/sdk_config.h @@ -0,0 +1,3547 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + + +#ifndef SDK_CONFIG_H +#define SDK_CONFIG_H +// <<< Use Configuration Wizard in Context Menu >>>\n +#ifdef USE_APP_CONFIG +#include "app_config.h" +#endif +// <h> nRF_ANT + +//========================================================== +// <q> ANT_CHANNEL_CONFIG_ENABLED - ant_channel_config - ANT common channel configuration + + +#ifndef ANT_CHANNEL_CONFIG_ENABLED +#define ANT_CHANNEL_CONFIG_ENABLED 1 +#endif + +// </h> +//========================================================== + +// <h> nRF_Drivers + +//========================================================== +// <e> NRFX_PRS_ENABLED - nrfx_prs - Peripheral Resource Sharing module +//========================================================== +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 1 +#endif +// <q> NRFX_PRS_BOX_0_ENABLED - Enables box 0 in the module. + + +#ifndef NRFX_PRS_BOX_0_ENABLED +#define NRFX_PRS_BOX_0_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_1_ENABLED - Enables box 1 in the module. + + +#ifndef NRFX_PRS_BOX_1_ENABLED +#define NRFX_PRS_BOX_1_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_2_ENABLED - Enables box 2 in the module. + + +#ifndef NRFX_PRS_BOX_2_ENABLED +#define NRFX_PRS_BOX_2_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_3_ENABLED - Enables box 3 in the module. + + +#ifndef NRFX_PRS_BOX_3_ENABLED +#define NRFX_PRS_BOX_3_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_4_ENABLED - Enables box 4 in the module. + + +#ifndef NRFX_PRS_BOX_4_ENABLED +#define NRFX_PRS_BOX_4_ENABLED 1 +#endif + +// <e> NRFX_PRS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_PRS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_PRS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PRS_CONFIG_INFO_COLOR +#define NRFX_PRS_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_PRS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PRS_CONFIG_DEBUG_COLOR +#define NRFX_PRS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver +//========================================================== +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 1 +#endif +// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance +#ifndef NRFX_UARTE0_ENABLED +#define NRFX_UARTE0_ENABLED 0 +#endif + +// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC +#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 +#endif + +// <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY +#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 +#endif + +// <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <8388608=> 31250 baud +// <10289152=> 38400 baud +// <15007744=> 56000 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 +#endif + +// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_INFO_COLOR +#define NRFX_UARTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR +#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver +//========================================================== +#ifndef NRFX_UART_ENABLED +#define NRFX_UART_ENABLED 1 +#endif +// <o> NRFX_UART0_ENABLED - Enable UART0 instance +#ifndef NRFX_UART0_ENABLED +#define NRFX_UART0_ENABLED 0 +#endif + +// <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC +#define NRFX_UART_DEFAULT_CONFIG_HWFC 0 +#endif + +// <o> NRFX_UART_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY +#define NRFX_UART_DEFAULT_CONFIG_PARITY 0 +#endif + +// <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3866624=> 14400 baud +// <5152768=> 19200 baud +// <7729152=> 28800 baud +// <8388608=> 31250 baud +// <10309632=> 38400 baud +// <15007744=> 56000 baud +// <15462400=> 57600 baud +// <20615168=> 76800 baud +// <30924800=> 115200 baud +// <61845504=> 230400 baud +// <67108864=> 250000 baud +// <123695104=> 460800 baud +// <247386112=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 +#endif + +// <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UART_CONFIG_LOG_ENABLED +#define NRFX_UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_UART_CONFIG_LOG_LEVEL +#define NRFX_UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UART_CONFIG_INFO_COLOR +#define NRFX_UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UART_CONFIG_DEBUG_COLOR +#define NRFX_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer +//========================================================== +#ifndef UART_ENABLED +#define UART_ENABLED 1 +#endif +// <o> UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef UART_DEFAULT_CONFIG_HWFC +#define UART_DEFAULT_CONFIG_HWFC 0 +#endif + +// <o> UART_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef UART_DEFAULT_CONFIG_PARITY +#define UART_DEFAULT_CONFIG_PARITY 0 +#endif + +// <o> UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef UART_DEFAULT_CONFIG_BAUDRATE +#define UART_DEFAULT_CONFIG_BAUDRATE 30801920 +#endif + +// <o> UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <q> UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA + + +#ifndef UART_EASY_DMA_SUPPORT +#define UART_EASY_DMA_SUPPORT 1 +#endif + +// <q> UART_LEGACY_SUPPORT - Driver supporting Legacy mode + + +#ifndef UART_LEGACY_SUPPORT +#define UART_LEGACY_SUPPORT 1 +#endif + +// <e> UART0_ENABLED - Enable UART0 instance +//========================================================== +#ifndef UART0_ENABLED +#define UART0_ENABLED 1 +#endif +// <q> UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA + + +#ifndef UART0_CONFIG_USE_EASY_DMA +#define UART0_CONFIG_USE_EASY_DMA 1 +#endif + +// </e> + +// </e> + +// </h> +//========================================================== + +// <h> nRF_Libraries + +//========================================================== +// <e> HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release +//========================================================== +#ifndef HARDFAULT_HANDLER_ENABLED +#define HARDFAULT_HANDLER_ENABLED 1 +#endif +// <q> HARDFAULT_HANDLER_GDB_PSP_BACKTRACE - Bypass the GDB problem with multiple stack pointers backtrace + + +// <i> There is a known bug in GDB which causes it to incorrectly backtrace the code +// <i> when multiple stack pointers are used (main and process stack pointers). +// <i> This option enables the fix for that problem and allows to see the proper backtrace info. +// <i> It makes it possible to trace the code to the exact point where a HardFault appeared. +// <i> This option requires additional commands and may temporarily switch MSP stack to store data on PSP space. +// <i> This is an optional parameter - enable it while debugging. +// <i> Before a HardFault handler exits, the stack will be reverted to its previous value. + +#ifndef HARDFAULT_HANDLER_GDB_PSP_BACKTRACE +#define HARDFAULT_HANDLER_GDB_PSP_BACKTRACE 1 +#endif + +// </e> + +// <e> NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module +//========================================================== +#ifndef NRF_BALLOC_ENABLED +#define NRF_BALLOC_ENABLED 1 +#endif +// <e> NRF_BALLOC_CONFIG_DEBUG_ENABLED - Enables debug mode in the module. +//========================================================== +#ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED +#define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0 +#endif +// <o> NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> + + +#ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS +#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1 +#endif + +// <o> NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> + + +#ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS +#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS 1 +#endif + +// <q> NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED - Enables basic checks in this module. + + +#ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED +#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0 +#endif + +// <q> NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED - Enables double memory free check in this module. + + +#ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED +#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0 +#endif + +// <q> NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED - Enables free memory corruption check in this module. + + +#ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED +#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0 +#endif + +// <q> NRF_BALLOC_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_BALLOC_CLI_CMDS +#define NRF_BALLOC_CLI_CMDS 0 +#endif + +// </e> + +// </e> + +// <q> NRF_FPRINTF_ENABLED - nrf_fprintf - fprintf function. + + +#ifndef NRF_FPRINTF_ENABLED +#define NRF_FPRINTF_ENABLED 1 +#endif + +// <q> NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module + + +#ifndef NRF_MEMOBJ_ENABLED +#define NRF_MEMOBJ_ENABLED 1 +#endif + +// <q> NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator + + +#ifndef NRF_SECTION_ITER_ENABLED +#define NRF_SECTION_ITER_ENABLED 1 +#endif + +// <q> NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. + + +#ifndef NRF_STRERROR_ENABLED +#define NRF_STRERROR_ENABLED 1 +#endif + +// </h> +//========================================================== + +// <h> nRF_Log + +//========================================================== +// <e> NRF_LOG_BACKEND_RTT_ENABLED - nrf_log_backend_rtt - Log RTT backend +//========================================================== +#ifndef NRF_LOG_BACKEND_RTT_ENABLED +#define NRF_LOG_BACKEND_RTT_ENABLED 0 +#endif +// <o> NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. +// <i> Size of the buffer is a trade-off between RAM usage and processing. +// <i> if buffer is smaller then strings will often be fragmented. +// <i> It is recommended to use size which will fit typical log and only the +// <i> longer one will be fragmented. + +#ifndef NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE +#define NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE 64 +#endif + +// <o> NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS - Period before retrying writing to RTT +#ifndef NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS +#define NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS 1 +#endif + +// <o> NRF_LOG_BACKEND_RTT_TX_RETRY_CNT - Writing to RTT retries. +// <i> If RTT fails to accept any new data after retries +// <i> module assumes that host is not active and on next +// <i> request it will perform only one write attempt. +// <i> On successful writing, module assumes that host is active +// <i> and scheme with retry is applied again. + +#ifndef NRF_LOG_BACKEND_RTT_TX_RETRY_CNT +#define NRF_LOG_BACKEND_RTT_TX_RETRY_CNT 3 +#endif + +// </e> + +// <e> NRF_LOG_BACKEND_UART_ENABLED - nrf_log_backend_uart - Log UART backend +//========================================================== +#ifndef NRF_LOG_BACKEND_UART_ENABLED +#define NRF_LOG_BACKEND_UART_ENABLED 1 +#endif +// <o> NRF_LOG_BACKEND_UART_TX_PIN - UART TX pin +#ifndef NRF_LOG_BACKEND_UART_TX_PIN +#define NRF_LOG_BACKEND_UART_TX_PIN 6 +#endif + +// <o> NRF_LOG_BACKEND_UART_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef NRF_LOG_BACKEND_UART_BAUDRATE +#define NRF_LOG_BACKEND_UART_BAUDRATE 30801920 +#endif + +// <o> NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. +// <i> Size of the buffer is a trade-off between RAM usage and processing. +// <i> if buffer is smaller then strings will often be fragmented. +// <i> It is recommended to use size which will fit typical log and only the +// <i> longer one will be fragmented. + +#ifndef NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE +#define NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE 64 +#endif + +// </e> + +// <q> NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED - nrf_log_str_formatter - Log string formatter + + +#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED +#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1 +#endif + +// <h> nrf_log - Logger + +//========================================================== +// <e> NRF_LOG_ENABLED - Logging module for nRF5 SDK +//========================================================== +#ifndef NRF_LOG_ENABLED +#define NRF_LOG_ENABLED 1 +#endif +// <e> NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string +//========================================================== +#ifndef NRF_LOG_USES_COLORS +#define NRF_LOG_USES_COLORS 0 +#endif +// <o> NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_COLOR_DEFAULT +#define NRF_LOG_COLOR_DEFAULT 0 +#endif + +// <o> NRF_LOG_ERROR_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_ERROR_COLOR +#define NRF_LOG_ERROR_COLOR 2 +#endif + +// <o> NRF_LOG_WARNING_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_WARNING_COLOR +#define NRF_LOG_WARNING_COLOR 4 +#endif + +// </e> + +// <o> NRF_LOG_DEFAULT_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LOG_DEFAULT_LEVEL +#define NRF_LOG_DEFAULT_LEVEL 3 +#endif + +// <q> NRF_LOG_DEFERRED - Enable deffered logger. + + +// <i> Log data is buffered and can be processed in idle. + +#ifndef NRF_LOG_DEFERRED +#define NRF_LOG_DEFERRED 1 +#endif + +// <o> NRF_LOG_BUFSIZE - Size of the buffer for storing logs (in bytes). + + +// <i> Must be power of 2 and multiple of 4. +// <i> If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum. +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 +// <2048=> 2048 +// <4096=> 4096 +// <8192=> 8192 +// <16384=> 16384 + +#ifndef NRF_LOG_BUFSIZE +#define NRF_LOG_BUFSIZE 1024 +#endif + +// <q> NRF_LOG_ALLOW_OVERFLOW - Configures behavior when circular buffer is full. + + +// <i> If set then oldest logs are overwritten. Otherwise a +// <i> marker is injected informing about overflow. + +#ifndef NRF_LOG_ALLOW_OVERFLOW +#define NRF_LOG_ALLOW_OVERFLOW 1 +#endif + +// <e> NRF_LOG_USES_TIMESTAMP - Enable timestamping + +// <i> Function for getting the timestamp is provided by the user +//========================================================== +#ifndef NRF_LOG_USES_TIMESTAMP +#define NRF_LOG_USES_TIMESTAMP 0 +#endif +// <o> NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) +#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY +#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 32768 +#endif + +// </e> + +// <q> NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. + + +#ifndef NRF_LOG_FILTERS_ENABLED +#define NRF_LOG_FILTERS_ENABLED 0 +#endif + +// <q> NRF_LOG_CLI_CMDS - Enable CLI commands for the module. + + +#ifndef NRF_LOG_CLI_CMDS +#define NRF_LOG_CLI_CMDS 0 +#endif + +// <h> Log message pool - Configuration of log message pool + +//========================================================== +// <o> NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. +// <i> If a small value is set, then performance of logs processing +// <i> is degraded because data is fragmented. Bigger value impacts +// <i> RAM memory utilization. The size is set to fit a message with +// <i> a timestamp and up to 2 arguments in a single memory object. + +#ifndef NRF_LOG_MSGPOOL_ELEMENT_SIZE +#define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20 +#endif + +// <o> NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects +// <i> If a small value is set, then it may lead to a deadlock +// <i> in certain cases if backend has high latency and holds +// <i> multiple messages for long time. Bigger value impacts +// <i> RAM memory usage. + +#ifndef NRF_LOG_MSGPOOL_ELEMENT_COUNT +#define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8 +#endif + +// </h> +//========================================================== + +// </e> + +// <h> nrf_log module configuration + +//========================================================== +// <h> nrf_log in nRF_Core + +//========================================================== +// <e> NRF_MPU_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_MPU_CONFIG_LOG_ENABLED +#define NRF_MPU_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_MPU_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_MPU_CONFIG_LOG_LEVEL +#define NRF_MPU_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_MPU_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MPU_CONFIG_INFO_COLOR +#define NRF_MPU_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_MPU_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MPU_CONFIG_DEBUG_COLOR +#define NRF_MPU_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_STACK_GUARD_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_STACK_GUARD_CONFIG_LOG_ENABLED +#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_STACK_GUARD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL +#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_STACK_GUARD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR +#define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_STACK_GUARD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR +#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TASK_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TASK_MANAGER_CONFIG_LOG_ENABLED +#define TASK_MANAGER_CONFIG_LOG_ENABLED 0 +#endif +// <o> TASK_MANAGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TASK_MANAGER_CONFIG_LOG_LEVEL +#define TASK_MANAGER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TASK_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TASK_MANAGER_CONFIG_INFO_COLOR +#define TASK_MANAGER_CONFIG_INFO_COLOR 0 +#endif + +// <o> TASK_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR +#define TASK_MANAGER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// <h> nrf_log in nRF_Drivers + +//========================================================== +// <e> CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef CLOCK_CONFIG_LOG_ENABLED +#define CLOCK_CONFIG_LOG_ENABLED 0 +#endif +// <o> CLOCK_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef CLOCK_CONFIG_LOG_LEVEL +#define CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +// <o> CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef CLOCK_CONFIG_INFO_COLOR +#define CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// <o> CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef CLOCK_CONFIG_DEBUG_COLOR +#define CLOCK_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> COMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef COMP_CONFIG_LOG_ENABLED +#define COMP_CONFIG_LOG_ENABLED 0 +#endif +// <o> COMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef COMP_CONFIG_LOG_LEVEL +#define COMP_CONFIG_LOG_LEVEL 3 +#endif + +// <o> COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef COMP_CONFIG_INFO_COLOR +#define COMP_CONFIG_INFO_COLOR 0 +#endif + +// <o> COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef COMP_CONFIG_DEBUG_COLOR +#define COMP_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef GPIOTE_CONFIG_LOG_ENABLED +#define GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef GPIOTE_CONFIG_LOG_LEVEL +#define GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef GPIOTE_CONFIG_INFO_COLOR +#define GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef GPIOTE_CONFIG_DEBUG_COLOR +#define GPIOTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef LPCOMP_CONFIG_LOG_ENABLED +#define LPCOMP_CONFIG_LOG_ENABLED 0 +#endif +// <o> LPCOMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef LPCOMP_CONFIG_LOG_LEVEL +#define LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +// <o> LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef LPCOMP_CONFIG_INFO_COLOR +#define LPCOMP_CONFIG_INFO_COLOR 0 +#endif + +// <o> LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef LPCOMP_CONFIG_DEBUG_COLOR +#define LPCOMP_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PDM_CONFIG_LOG_ENABLED +#define PDM_CONFIG_LOG_ENABLED 0 +#endif +// <o> PDM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PDM_CONFIG_LOG_LEVEL +#define PDM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PDM_CONFIG_INFO_COLOR +#define PDM_CONFIG_INFO_COLOR 0 +#endif + +// <o> PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PDM_CONFIG_DEBUG_COLOR +#define PDM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> PPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PPI_CONFIG_LOG_ENABLED +#define PPI_CONFIG_LOG_ENABLED 0 +#endif +// <o> PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PPI_CONFIG_LOG_LEVEL +#define PPI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PPI_CONFIG_INFO_COLOR +#define PPI_CONFIG_INFO_COLOR 0 +#endif + +// <o> PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PPI_CONFIG_DEBUG_COLOR +#define PPI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PWM_CONFIG_LOG_ENABLED +#define PWM_CONFIG_LOG_ENABLED 0 +#endif +// <o> PWM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PWM_CONFIG_LOG_LEVEL +#define PWM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PWM_CONFIG_INFO_COLOR +#define PWM_CONFIG_INFO_COLOR 0 +#endif + +// <o> PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PWM_CONFIG_DEBUG_COLOR +#define PWM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef QDEC_CONFIG_LOG_ENABLED +#define QDEC_CONFIG_LOG_ENABLED 0 +#endif +// <o> QDEC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef QDEC_CONFIG_LOG_LEVEL +#define QDEC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef QDEC_CONFIG_INFO_COLOR +#define QDEC_CONFIG_INFO_COLOR 0 +#endif + +// <o> QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef QDEC_CONFIG_DEBUG_COLOR +#define QDEC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> RNG_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef RNG_CONFIG_LOG_ENABLED +#define RNG_CONFIG_LOG_ENABLED 0 +#endif +// <o> RNG_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef RNG_CONFIG_LOG_LEVEL +#define RNG_CONFIG_LOG_LEVEL 3 +#endif + +// <o> RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RNG_CONFIG_INFO_COLOR +#define RNG_CONFIG_INFO_COLOR 0 +#endif + +// <o> RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RNG_CONFIG_DEBUG_COLOR +#define RNG_CONFIG_DEBUG_COLOR 0 +#endif + +// <q> RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. + + +#ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED +#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 +#endif + +// </e> + +// <e> RTC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef RTC_CONFIG_LOG_ENABLED +#define RTC_CONFIG_LOG_ENABLED 0 +#endif +// <o> RTC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef RTC_CONFIG_LOG_LEVEL +#define RTC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RTC_CONFIG_INFO_COLOR +#define RTC_CONFIG_INFO_COLOR 0 +#endif + +// <o> RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RTC_CONFIG_DEBUG_COLOR +#define RTC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SAADC_CONFIG_LOG_ENABLED +#define SAADC_CONFIG_LOG_ENABLED 0 +#endif +// <o> SAADC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SAADC_CONFIG_LOG_LEVEL +#define SAADC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SAADC_CONFIG_INFO_COLOR +#define SAADC_CONFIG_INFO_COLOR 0 +#endif + +// <o> SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SAADC_CONFIG_DEBUG_COLOR +#define SAADC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SPIS_CONFIG_LOG_ENABLED +#define SPIS_CONFIG_LOG_ENABLED 0 +#endif +// <o> SPIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SPIS_CONFIG_LOG_LEVEL +#define SPIS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPIS_CONFIG_INFO_COLOR +#define SPIS_CONFIG_INFO_COLOR 0 +#endif + +// <o> SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPIS_CONFIG_DEBUG_COLOR +#define SPIS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> SPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SPI_CONFIG_LOG_ENABLED +#define SPI_CONFIG_LOG_ENABLED 0 +#endif +// <o> SPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SPI_CONFIG_LOG_LEVEL +#define SPI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_INFO_COLOR +#define SPI_CONFIG_INFO_COLOR 0 +#endif + +// <o> SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_DEBUG_COLOR +#define SPI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TIMER_CONFIG_LOG_ENABLED +#define TIMER_CONFIG_LOG_ENABLED 0 +#endif +// <o> TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TIMER_CONFIG_LOG_LEVEL +#define TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TIMER_CONFIG_INFO_COLOR +#define TIMER_CONFIG_INFO_COLOR 0 +#endif + +// <o> TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TIMER_CONFIG_DEBUG_COLOR +#define TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TWIS_CONFIG_LOG_ENABLED +#define TWIS_CONFIG_LOG_ENABLED 0 +#endif +// <o> TWIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TWIS_CONFIG_LOG_LEVEL +#define TWIS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWIS_CONFIG_INFO_COLOR +#define TWIS_CONFIG_INFO_COLOR 0 +#endif + +// <o> TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWIS_CONFIG_DEBUG_COLOR +#define TWIS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TWI_CONFIG_LOG_ENABLED +#define TWI_CONFIG_LOG_ENABLED 0 +#endif +// <o> TWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TWI_CONFIG_LOG_LEVEL +#define TWI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWI_CONFIG_INFO_COLOR +#define TWI_CONFIG_INFO_COLOR 0 +#endif + +// <o> TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWI_CONFIG_DEBUG_COLOR +#define TWI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef UART_CONFIG_LOG_ENABLED +#define UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef UART_CONFIG_LOG_LEVEL +#define UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef UART_CONFIG_INFO_COLOR +#define UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef UART_CONFIG_DEBUG_COLOR +#define UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> USBD_CONFIG_LOG_ENABLED - Enable logging in the module +//========================================================== +#ifndef USBD_CONFIG_LOG_ENABLED +#define USBD_CONFIG_LOG_ENABLED 0 +#endif +// <o> USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef USBD_CONFIG_LOG_LEVEL +#define USBD_CONFIG_LOG_LEVEL 3 +#endif + +// <o> USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef USBD_CONFIG_INFO_COLOR +#define USBD_CONFIG_INFO_COLOR 0 +#endif + +// <o> USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef USBD_CONFIG_DEBUG_COLOR +#define USBD_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef WDT_CONFIG_LOG_ENABLED +#define WDT_CONFIG_LOG_ENABLED 0 +#endif +// <o> WDT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef WDT_CONFIG_LOG_LEVEL +#define WDT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef WDT_CONFIG_INFO_COLOR +#define WDT_CONFIG_INFO_COLOR 0 +#endif + +// <o> WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef WDT_CONFIG_DEBUG_COLOR +#define WDT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// <h> nrf_log in nRF_Libraries + +//========================================================== +// <e> APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_TIMER_CONFIG_LOG_ENABLED +#define APP_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_LOG_LEVEL +#define APP_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_TIMER_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// <i> If module generates a lot of logs, initial log level can +// <i> be decreased to prevent flooding. Severity level can be +// <i> increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL +#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// <o> APP_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_INFO_COLOR +#define APP_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_DEBUG_COLOR +#define APP_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED +#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL +#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_CDC_ACM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR +#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR +#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED +#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_DUMMY_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL +#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_DUMMY_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR +#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_DUMMY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR +#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED +#define APP_USBD_MSC_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_MSC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL +#define APP_USBD_MSC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_MSC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR +#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR +#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED +#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_ATFIFO_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// <o> NRF_ATFIFO_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR +#define NRF_ATFIFO_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_ATFIFO_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR +#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_BALLOC_CONFIG_LOG_ENABLED +#define NRF_BALLOC_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_BALLOC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_LOG_LEVEL +#define NRF_BALLOC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// <i> If module generates a lot of logs, initial log level can +// <i> be decreased to prevent flooding. Severity level can be +// <i> increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL +#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// <o> NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BALLOC_CONFIG_INFO_COLOR +#define NRF_BALLOC_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_BALLOC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR +#define NRF_BALLOC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED +#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL +#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_CLI_BLE_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR +#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR +#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED +#define NRF_CLI_UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_CLI_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL +#define NRF_CLI_UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_CLI_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_UART_CONFIG_INFO_COLOR +#define NRF_CLI_UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_CLI_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR +#define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED +#define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_MEMOBJ_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL +#define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_MEMOBJ_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR +#define NRF_MEMOBJ_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_MEMOBJ_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR +#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_PWR_MGMT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_PWR_MGMT_CONFIG_LOG_ENABLED +#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_PWR_MGMT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL +#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_PWR_MGMT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR +#define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_PWR_MGMT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR +#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED +#define NRF_QUEUE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_QUEUE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL +#define NRF_QUEUE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// <o> NRF_QUEUE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_INFO_COLOR +#define NRF_QUEUE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_QUEUE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR +#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module. +//========================================================== +#ifndef NRF_SDH_ANT_LOG_ENABLED +#define NRF_SDH_ANT_LOG_ENABLED 1 +#endif +// <o> NRF_SDH_ANT_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_ANT_LOG_LEVEL +#define NRF_SDH_ANT_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_ANT_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_ANT_INFO_COLOR +#define NRF_SDH_ANT_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_ANT_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_ANT_DEBUG_COLOR +#define NRF_SDH_ANT_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_BLE_LOG_ENABLED - Enable logging in SoftDevice handler (BLE) module. +//========================================================== +#ifndef NRF_SDH_BLE_LOG_ENABLED +#define NRF_SDH_BLE_LOG_ENABLED 0 +#endif +// <o> NRF_SDH_BLE_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_BLE_LOG_LEVEL +#define NRF_SDH_BLE_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_BLE_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_BLE_INFO_COLOR +#define NRF_SDH_BLE_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_BLE_DEBUG_COLOR +#define NRF_SDH_BLE_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_LOG_ENABLED - Enable logging in SoftDevice handler module. +//========================================================== +#ifndef NRF_SDH_LOG_ENABLED +#define NRF_SDH_LOG_ENABLED 1 +#endif +// <o> NRF_SDH_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_LOG_LEVEL +#define NRF_SDH_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_INFO_COLOR +#define NRF_SDH_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_DEBUG_COLOR +#define NRF_SDH_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_SOC_LOG_ENABLED - Enable logging in SoftDevice handler (SoC) module. +//========================================================== +#ifndef NRF_SDH_SOC_LOG_ENABLED +#define NRF_SDH_SOC_LOG_ENABLED 1 +#endif +// <o> NRF_SDH_SOC_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_SOC_LOG_LEVEL +#define NRF_SDH_SOC_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_SOC_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_SOC_INFO_COLOR +#define NRF_SDH_SOC_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_SOC_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_SOC_DEBUG_COLOR +#define NRF_SDH_SOC_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED +#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_SORTLIST_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL +#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_SORTLIST_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR +#define NRF_SORTLIST_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_SORTLIST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR +#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED +#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_TWI_SENSOR_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL +#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_TWI_SENSOR_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR +#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR +#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// <h> nrf_log in nRF_Serialization + +//========================================================== +// <e> SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED +#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0 +#endif +// <o> SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL +#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SER_HAL_TRANSPORT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR +#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0 +#endif + +// <o> SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR +#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// </h> +//========================================================== + +// </h> +//========================================================== + +// </h> +//========================================================== + +// <h> nRF_Segger_RTT + +//========================================================== +// <h> segger_rtt - SEGGER RTT + +//========================================================== +// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer. +// <i> Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE +// <i> or this value is actually used. It depends on which one is bigger. + +#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP +#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 512 +#endif + +// <o> SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer. +#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS +#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2 +#endif + +// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer. +#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN +#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16 +#endif + +// <o> SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer. +#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS +#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2 +#endif + +// <o> SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full. + + +// <i> The following modes are supported: +// <i> - SKIP - Do not block, output nothing. +// <i> - TRIM - Do not block, output as much as fits. +// <i> - BLOCK - Wait until there is space in the buffer. +// <0=> SKIP +// <1=> TRIM +// <2=> BLOCK_IF_FIFO_FULL + +#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE +#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + +// <h> nRF_SoftDevice + +//========================================================== +// <e> NRF_SDH_ANT_ENABLED - nrf_sdh_ant - SoftDevice ANT event handler +//========================================================== +#ifndef NRF_SDH_ANT_ENABLED +#define NRF_SDH_ANT_ENABLED 1 +#endif +// <h> ANT Channels + +//========================================================== +// <o> NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED - Allocated ANT channels. +#ifndef NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED +#define NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED 1 +#endif + +// <o> NRF_SDH_ANT_ENCRYPTED_CHANNELS - Encrypted ANT channels. +#ifndef NRF_SDH_ANT_ENCRYPTED_CHANNELS +#define NRF_SDH_ANT_ENCRYPTED_CHANNELS 0 +#endif + +// </h> +//========================================================== + +// <h> ANT Queues + +//========================================================== +// <o> NRF_SDH_ANT_EVENT_QUEUE_SIZE - Event queue size. +#ifndef NRF_SDH_ANT_EVENT_QUEUE_SIZE +#define NRF_SDH_ANT_EVENT_QUEUE_SIZE 32 +#endif + +// <o> NRF_SDH_ANT_BURST_QUEUE_SIZE - ANT burst queue size. +#ifndef NRF_SDH_ANT_BURST_QUEUE_SIZE +#define NRF_SDH_ANT_BURST_QUEUE_SIZE 128 +#endif + +// </h> +//========================================================== + +// <h> ANT Observers - Observers and priority levels + +//========================================================== +// <o> NRF_SDH_ANT_OBSERVER_PRIO_LEVELS - Total number of priority levels for ANT observers. +// <i> This setting configures the number of priority levels available for the ANT event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_ANT_OBSERVER_PRIO_LEVELS +#define NRF_SDH_ANT_OBSERVER_PRIO_LEVELS 2 +#endif + +// <h> ANT Observers priorities - Invididual priorities + +//========================================================== +// <o> ANT_BPWR_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Bicycle Power Profile. + +#ifndef ANT_BPWR_ANT_OBSERVER_PRIO +#define ANT_BPWR_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_BSC_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Bicycle Speed and Cadence Profile. + +#ifndef ANT_BSC_ANT_OBSERVER_PRIO +#define ANT_BSC_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_ENCRYPT_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Cryptographic ANT stack configuration module. + +#ifndef ANT_ENCRYPT_ANT_OBSERVER_PRIO +#define ANT_ENCRYPT_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_HRM_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Heart Rate Monitor. + +#ifndef ANT_HRM_ANT_OBSERVER_PRIO +#define ANT_HRM_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_SDM_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Stride Based Speed and Distance Monitor Profile. + +#ifndef ANT_SDM_ANT_OBSERVER_PRIO +#define ANT_SDM_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the ANT state indicator module. + +#ifndef ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO +#define ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO 1 +#endif + +// <o> BSP_BTN_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Button Control module. + +#ifndef BSP_BTN_ANT_OBSERVER_PRIO +#define BSP_BTN_ANT_OBSERVER_PRIO 1 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + + +// </e> + +// <e> NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler +//========================================================== +#ifndef NRF_SDH_ENABLED +#define NRF_SDH_ENABLED 1 +#endif +// <h> Dispatch model + +// <i> This setting configures how Stack events are dispatched to the application. +//========================================================== +// <o> NRF_SDH_DISPATCH_MODEL + + +// <i> NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context. +// <i> NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler. +// <i> NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually. +// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT +// <1=> NRF_SDH_DISPATCH_MODEL_APPSH +// <2=> NRF_SDH_DISPATCH_MODEL_POLLING + +#ifndef NRF_SDH_DISPATCH_MODEL +#define NRF_SDH_DISPATCH_MODEL 0 +#endif + +// </h> +//========================================================== + +// <h> Clock - SoftDevice clock configuration + +//========================================================== +// <o> NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source. + +// <0=> NRF_CLOCK_LF_SRC_RC +// <1=> NRF_CLOCK_LF_SRC_XTAL +// <2=> NRF_CLOCK_LF_SRC_SYNTH + +#ifndef NRF_SDH_CLOCK_LF_SRC +#define NRF_SDH_CLOCK_LF_SRC 1 +#endif + +// <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. +#ifndef NRF_SDH_CLOCK_LF_RC_CTIV +#define NRF_SDH_CLOCK_LF_RC_CTIV 0 +#endif + +// <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. +// <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated +// <i> if the temperature has not changed. + +#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV +#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0 +#endif + +// <o> NRF_SDH_CLOCK_LF_ACCURACY - External clock accuracy used in the LL to compute timing. + +// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM +// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM +// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM +// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM +// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM +// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM +// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM +// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM +// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM +// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM +// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM +// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM + +#ifndef NRF_SDH_CLOCK_LF_ACCURACY +#define NRF_SDH_CLOCK_LF_ACCURACY 7 +#endif + +// </h> +//========================================================== + +// <h> SDH Observers - Observers and priority levels + +//========================================================== +// <o> NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. +// <i> This setting configures the number of priority levels available for the SoftDevice request event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_REQ_OBSERVER_PRIO_LEVELS +#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2 +#endif + +// <o> NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. +// <i> This setting configures the number of priority levels available for the SoftDevice state event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_STATE_OBSERVER_PRIO_LEVELS +#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2 +#endif + +// <o> NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. +// <i> This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC). +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_STACK_OBSERVER_PRIO_LEVELS +#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS 2 +#endif + + +// <h> State Observers priorities - Invididual priorities + +//========================================================== +// <o> CLOCK_CONFIG_STATE_OBSERVER_PRIO +// <i> Priority with which state events are dispatched to the Clock driver. + +#ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO +#define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// <o> POWER_CONFIG_STATE_OBSERVER_PRIO +// <i> Priority with which state events are dispatched to the Power driver. + +#ifndef POWER_CONFIG_STATE_OBSERVER_PRIO +#define POWER_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// <o> RNG_CONFIG_STATE_OBSERVER_PRIO +// <i> Priority with which state events are dispatched to this module. + +#ifndef RNG_CONFIG_STATE_OBSERVER_PRIO +#define RNG_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// </h> +//========================================================== + +// <h> Stack Event Observers priorities - Invididual priorities + +//========================================================== +// <o> NRF_SDH_ANT_STACK_OBSERVER_PRIO +// <i> This setting configures the priority with which ANT events are processed with respect to other events coming from the stack. +// <i> Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC. +// <i> Zero is the highest priority. + +#ifndef NRF_SDH_ANT_STACK_OBSERVER_PRIO +#define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0 +#endif + +// <o> NRF_SDH_BLE_STACK_OBSERVER_PRIO +// <i> This setting configures the priority with which BLE events are processed with respect to other events coming from the stack. +// <i> Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC. +// <i> Zero is the highest priority. + +#ifndef NRF_SDH_BLE_STACK_OBSERVER_PRIO +#define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0 +#endif + +// <o> NRF_SDH_SOC_STACK_OBSERVER_PRIO +// <i> This setting configures the priority with which SoC events are processed with respect to other events coming from the stack. +// <i> Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE. +// <i> Zero is the highest priority. + +#ifndef NRF_SDH_SOC_STACK_OBSERVER_PRIO +#define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + + +// </e> + +// <e> NRF_SDH_SOC_ENABLED - nrf_sdh_soc - SoftDevice SoC event handler +//========================================================== +#ifndef NRF_SDH_SOC_ENABLED +#define NRF_SDH_SOC_ENABLED 1 +#endif +// <h> SoC Observers - Observers and priority levels + +//========================================================== +// <o> NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. +// <i> This setting configures the number of priority levels available for the SoC event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_SOC_OBSERVER_PRIO_LEVELS +#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS 2 +#endif + +// <h> SoC Observers priorities - Invididual priorities + +//========================================================== +// <o> BLE_ADV_SOC_OBSERVER_PRIO +// <i> Priority with which SoC events are dispatched to the Advertising module. + +#ifndef BLE_ADV_SOC_OBSERVER_PRIO +#define BLE_ADV_SOC_OBSERVER_PRIO 1 +#endif + +// <o> BLE_DFU_SOC_OBSERVER_PRIO +// <i> Priority with which BLE events are dispatched to the DFU Service. + +#ifndef BLE_DFU_SOC_OBSERVER_PRIO +#define BLE_DFU_SOC_OBSERVER_PRIO 1 +#endif + +// <o> CLOCK_CONFIG_SOC_OBSERVER_PRIO +// <i> Priority with which SoC events are dispatched to the Clock driver. + +#ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO +#define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0 +#endif + +// <o> POWER_CONFIG_SOC_OBSERVER_PRIO +// <i> Priority with which SoC events are dispatched to the Power driver. + +#ifndef POWER_CONFIG_SOC_OBSERVER_PRIO +#define POWER_CONFIG_SOC_OBSERVER_PRIO 0 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + + +// </e> + +// </h> +//========================================================== + +// <<< end of configuration section >>> +#endif //SDK_CONFIG_H + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/flash_placement.xml b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/flash_placement.xml new file mode 100644 index 0000000..2b6d6df --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/flash_placement.xml @@ -0,0 +1,45 @@ +<!DOCTYPE Linker_Placement_File> +<Root name="Flash Section Placement"> + <MemorySegment name="FLASH" start="$(FLASH_PH_START)" size="$(FLASH_PH_SIZE)"> + <ProgramSection load="no" name=".reserved_flash" start="$(FLASH_PH_START)" size="$(FLASH_START)-$(FLASH_PH_START)" /> + <ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START)" /> + <ProgramSection alignment="4" load="Yes" name=".init" /> + <ProgramSection alignment="4" load="Yes" name=".init_rodata" /> + <ProgramSection alignment="4" load="Yes" name=".text" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_ant_observers" inputsections="*(SORT(.sdh_ant_observers*))" address_symbol="__start_sdh_ant_observers" end_symbol="__stop_sdh_ant_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_soc_observers" inputsections="*(SORT(.sdh_soc_observers*))" address_symbol="__start_sdh_soc_observers" end_symbol="__stop_sdh_soc_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_const_data" inputsections="*(SORT(.log_const_data*))" address_symbol="__start_log_const_data" end_symbol="__stop_log_const_data" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".nrf_balloc" inputsections="*(.nrf_balloc*)" address_symbol="__start_nrf_balloc" end_symbol="__stop_nrf_balloc" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_state_observers" inputsections="*(SORT(.sdh_state_observers*))" address_symbol="__start_sdh_state_observers" end_symbol="__stop_sdh_state_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_stack_observers" inputsections="*(SORT(.sdh_stack_observers*))" address_symbol="__start_sdh_stack_observers" end_symbol="__stop_sdh_stack_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_req_observers" inputsections="*(SORT(.sdh_req_observers*))" address_symbol="__start_sdh_req_observers" end_symbol="__stop_sdh_req_observers" /> + <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections" address_symbol="__start_nrf_sections" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_dynamic_data" inputsections="*(SORT(.log_dynamic_data*))" runin=".log_dynamic_data_run"/> + <ProgramSection alignment="4" load="Yes" name=".dtors" /> + <ProgramSection alignment="4" load="Yes" name=".ctors" /> + <ProgramSection alignment="4" load="Yes" name=".rodata" /> + <ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" /> + <ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" /> + <ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" /> + <ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" /> + </MemorySegment> + <MemorySegment name="RAM" start="$(RAM_PH_START)" size="$(RAM_PH_SIZE)"> + <ProgramSection load="no" name=".reserved_ram" start="$(RAM_PH_START)" size="$(RAM_START)-$(RAM_PH_START)" /> + <ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START)" address_symbol="__app_ram_start__"/> + <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections_run" address_symbol="__start_nrf_sections_run" /> + <ProgramSection alignment="4" keep="Yes" load="No" name=".log_dynamic_data_run" address_symbol="__start_log_dynamic_data" end_symbol="__stop_log_dynamic_data" /> + <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections_run_end" address_symbol="__end_nrf_sections_run" /> + <ProgramSection alignment="4" load="No" name=".fast_run" /> + <ProgramSection alignment="4" load="No" name=".data_run" /> + <ProgramSection alignment="4" load="No" name=".tdata_run" /> + <ProgramSection alignment="4" load="No" name=".bss" /> + <ProgramSection alignment="4" load="No" name=".tbss" /> + <ProgramSection alignment="4" load="No" name=".non_init" /> + <ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" /> + <ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack" address_symbol="__StackLimit" end_symbol="__StackTop"/> + <ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" /> + </MemorySegment> + <MemorySegment name="ant_boot_settings" start="0x0007FF80" size="0x80"> + <ProgramSection alignment="4" keep="Yes" load="No" name=".ant_boot_settings" address_symbol="__start_ant_boot_settings" end_symbol="__stop_ant_boot_settings" start = "0x0007FF80" size="0x80" /> + </MemorySegment> +</Root> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/ota_tester_pca10040_s212.emProject b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/ota_tester_pca10040_s212.emProject new file mode 100644 index 0000000..93aeef7 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/ota_tester_pca10040_s212.emProject @@ -0,0 +1,99 @@ +<!DOCTYPE CrossStudio_Project_File> +<solution Name="ota_tester_pca10040_s212" target="8" version="2"> + <project Name="ota_tester_pca10040_s212"> + <configuration + Name="Common" + arm_architecture="v7EM" + arm_core_type="Cortex-M4" + arm_endian="Little" + arm_fp_abi="Hard" + arm_fpu_type="FPv4-SP-D16" + arm_linker_heap_size="8192" + arm_linker_process_stack_size="0" + arm_linker_stack_size="8192" + arm_linker_treat_warnings_as_errors="No" + arm_simulator_memory_simulation_parameter="RWX 00000000,00100000,FFFFFFFF;RWX 20000000,00010000,CDCDCDCD" + arm_target_device_name="nRF52832_xxAA" + arm_target_interface_type="SWD" + c_user_include_directories="../../../config;../../../../../../../../components;../../../../../../../../components/ant/ant_channel_config;../../../../../../../../components/boards;../../../../../../../../components/libraries/atomic;../../../../../../../../components/libraries/balloc;../../../../../../../../components/libraries/delay;../../../../../../../../components/libraries/experimental_log;../../../../../../../../components/libraries/experimental_log/src;../../../../../../../../components/libraries/experimental_memobj;../../../../../../../../components/libraries/experimental_section_vars;../../../../../../../../components/libraries/hardfault;../../../../../../../../components/libraries/hardfault/nrf52;../../../../../../../../components/libraries/strerror;../../../../../../../../components/libraries/util;../../../../../../../../components/softdevice/common;../../../../../../../../components/softdevice/s212/headers;../../../../../../../../components/softdevice/s212/headers/nrf52;../../../../../../../../components/toolchain/cmsis/include;../../../../include/boot_common;../../../include;../../../../../../../../external/fprintf;../../../../../../../../external/segger_rtt;../../../../../../../../integration/nrfx;../../../../../../../../integration/nrfx/legacy;../../../../../../../../modules/nrfx;../../../../../../../../modules/nrfx/drivers/include;../../../../../../../../modules/nrfx/hal;../../../../../../../../modules/nrfx/mdk;../config;" + c_preprocessor_definitions="ANT_STACK_SUPPORT_REQD;BOARD_PCA10040;CONFIG_GPIO_AS_PINRESET;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;NRF52;NRF52832_XXAA;NRF52_PAN_74;S212;SOFTDEVICE_PRESENT;" + debug_target_connection="J-Link" + gcc_entry_point="Reset_Handler" + macros="CMSIS_CONFIG_TOOL=../../../../../../../../external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar" + debug_register_definition_file="../../../../../../../../modules/nrfx/mdk/nrf52.svd" + debug_start_from_entry_point_symbol="No" + gcc_debugging_level="Level 3" linker_output_format="hex" + linker_printf_width_precision_supported="Yes" + linker_printf_fmt_level="long" + linker_section_placement_file="flash_placement.xml" + linker_section_placement_macros="FLASH_PH_START=0x0;FLASH_PH_SIZE=0x80000;RAM_PH_START=0x20000000;RAM_PH_SIZE=0x10000;FLASH_START=0x12000;FLASH_SIZE=0x6e000;RAM_START=0x20000b80;RAM_SIZE=0xf480" + linker_section_placements_segments="FLASH RX 0x0 0x80000;RAM RWX 0x20000000 0x10000;ant_boot_settings RX 0x0007FF80 0x80" + project_directory="" + project_type="Executable" /> + <folder Name="Segger Startup Files"> + <file file_name="$(StudioDir)/source/thumb_crt0.s" /> + </folder> + <folder Name="nRF_Log"> + <file file_name="../../../../../../../../components/libraries/experimental_log/src/nrf_log_backend_rtt.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_log/src/nrf_log_backend_serial.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_log/src/nrf_log_backend_uart.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_log/src/nrf_log_default_backends.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_log/src/nrf_log_frontend.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_log/src/nrf_log_str_formatter.c" /> + </folder> + <folder Name="Board Definition"> + <file file_name="../../../../../../../../components/boards/boards.c" /> + </folder> + <folder Name="nRF_Libraries"> + <file file_name="../../../../../../../../components/libraries/util/app_error.c" /> + <file file_name="../../../../../../../../components/libraries/util/app_error_handler_gcc.c" /> + <file file_name="../../../../../../../../components/libraries/util/app_error_weak.c" /> + <file file_name="../../../../../../../../components/libraries/util/app_util_platform.c" /> + <file file_name="../../../../../../../../components/libraries/hardfault/nrf52/handler/hardfault_handler_gcc.c" /> + <file file_name="../../../../../../../../components/libraries/hardfault/hardfault_implementation.c" /> + <file file_name="../../../../../../../../components/libraries/util/nrf_assert.c" /> + <file file_name="../../../../../../../../components/libraries/atomic/nrf_atomic.c" /> + <file file_name="../../../../../../../../components/libraries/balloc/nrf_balloc.c" /> + <file file_name="../../../../../../../../external/fprintf/nrf_fprintf.c" /> + <file file_name="../../../../../../../../external/fprintf/nrf_fprintf_format.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_memobj/nrf_memobj.c" /> + <file file_name="../../../../../../../../components/libraries/experimental_section_vars/nrf_section_iter.c" /> + <file file_name="../../../../../../../../components/libraries/strerror/nrf_strerror.c" /> + </folder> + <folder Name="nRF_Drivers"> + <file file_name="../../../../../../../../integration/nrfx/legacy/nrf_drv_uart.c" /> + <file file_name="../../../../../../../../modules/nrfx/drivers/src/prs/nrfx_prs.c" /> + <file file_name="../../../../../../../../modules/nrfx/drivers/src/nrfx_uart.c" /> + <file file_name="../../../../../../../../modules/nrfx/drivers/src/nrfx_uarte.c" /> + </folder> + <folder Name="nRF_ANT"> + <file file_name="../../../../../../../../components/ant/ant_channel_config/ant_channel_config.c" /> + </folder> + <folder Name="Application"> + <file file_name="../../../../ant_boot_settings_api.c" /> + <file file_name="../../../main.c" /> + <file file_name="../config/sdk_config.h" /> + </folder> + <folder Name="nRF_Segger_RTT"> + <file file_name="../../../../../../../../external/segger_rtt/SEGGER_RTT.c" /> + <file file_name="../../../../../../../../external/segger_rtt/SEGGER_RTT_Syscalls_SES.c" /> + <file file_name="../../../../../../../../external/segger_rtt/SEGGER_RTT_printf.c" /> + </folder> + <folder Name="None"> + <file file_name="../../../../../../../../modules/nrfx/mdk/ses_nRF_Startup.s" /> + <file file_name="../../../../../../../../modules/nrfx/mdk/ses_nrf52_Vectors.s" /> + <file file_name="../../../../../../../../modules/nrfx/mdk/system_nrf52.c" /> + </folder> + <folder Name="nRF_SoftDevice"> + <file file_name="../../../../../../../../components/softdevice/common/nrf_sdh.c" /> + <file file_name="../../../../../../../../components/softdevice/common/nrf_sdh_ant.c" /> + <file file_name="../../../../../../../../components/softdevice/common/nrf_sdh_soc.c" /> + </folder> + </project> + <configuration Name="Release" + c_preprocessor_definitions="NDEBUG" + gcc_optimization_level="Optimize For Size" /> + <configuration Name="Debug" + c_preprocessor_definitions="DEBUG; DEBUG_NRF" + gcc_optimization_level="None"/> +</solution> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/ota_tester_pca10040_s212.emSession b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/ota_tester_pca10040_s212.emSession new file mode 100644 index 0000000..bdaeb03 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/ota_tester/pca10040/s212/ses/ota_tester_pca10040_s212.emSession @@ -0,0 +1,7 @@ +<!DOCTYPE CrossStudio_Session_File> +<session> + <ARMCrossStudioWindow activeProject="ota_tester_pca10040_s212" buildConfiguration="Release"/> + <Files> + <SessionOpenFile codecName="Default" debugPath="../../../main.c" left="0" name="unnamed" path="../../../main.c" selected="1" top="0" useBinaryEdit="0" useTextEdit="1" x="0" y="0"/> + </Files> +</session>
\ No newline at end of file diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm4/dfu_experimental_dual_bank_ant_pca10040_s212.uvopt b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm4/dfu_experimental_dual_bank_ant_pca10040_s212.uvopt new file mode 100644 index 0000000..9563c09 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm4/dfu_experimental_dual_bank_ant_pca10040_s212.uvopt @@ -0,0 +1,31 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + <Target> + <TargetName>nrf52832_xxaa_s212</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> <OPTFL> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> <DebugOpt> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN1 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf52xxx -FS00 -FL0200000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + </TargetOption> + </Target></ProjectOpt> + + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm4/dfu_experimental_dual_bank_ant_pca10040_s212.uvproj b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm4/dfu_experimental_dual_bank_ant_pca10040_s212.uvproj new file mode 100644 index 0000000..2708ca8 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm4/dfu_experimental_dual_bank_ant_pca10040_s212.uvproj @@ -0,0 +1,536 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> <Target> + <TargetName>nrf52832_xxaa_s212</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>nRF52832_xxAA</Device> + <Vendor>Nordic Semiconductor</Vendor> + <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(64000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-UM0364FCE -O78 -S0 -C0 -TO18 -TC16000000 -TP21 -TDS800D -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC2000 -FN1 -FF0nRF52xxx -FS00 -FL0200000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>core.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>..\..\..\..\..\..\..\modules\nrfx\mdk\nrf52.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\_build\</OutputDirectory> + <OutputName>nrf52832_xxaa_s212</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\_build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName></SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll></SimDlgDll> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>0</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>-1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>Segger\JL2CM3.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4099</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>Segger\JL2CM3.dll</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>5</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x79000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20002800</StartAddress> + <Size>0xd800</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <VariousControls> + <MiscControls>--c99 --reduce_paths</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT SWI_DISABLE0 __HEAP_SIZE=0 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..;..\..\..\include;..\..\..\include\boot_common;..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\components\ant\ant_fs;..\..\..\..\..\..\..\components\ant\ant_key_manager;..\..\..\..\..\..\..\components\ant\ant_key_manager\config;..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\components\libraries\bsp;..\..\..\..\..\..\..\components\libraries\button;..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\components\libraries\scheduler;..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\components\libraries\timer;..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <VariousControls> + <MiscControls> --cpreproc_opts=-DANT_STACK_SUPPORT_REQD,-DBOARD_PCA10040,-DCONFIG_GPIO_AS_PINRESET,-DFLOAT_ABI_HARD,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_74,-DS212,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-D__HEAP_SIZE=0,-D__STACK_SIZE=8192</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT SWI_DISABLE0 __HEAP_SIZE=0 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..;..\..\..\include;..\..\..\include\boot_common;..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\components\ant\ant_fs;..\..\..\..\..\..\..\components\ant\ant_key_manager;..\..\..\..\..\..\..\components\ant\ant_key_manager\config;..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\components\libraries\bsp;..\..\..\..\..\..\..\components\libraries\button;..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\components\libraries\scheduler;..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\components\libraries\timer;..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x00000000</TextAddressRange> + <DataAddressRange>0x00000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc>--diag_suppress 6330</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> <Group> + <GroupName>None</GroupName> + <Files> <File> + <FileName>arm_startup_nrf52.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\..\..\..\modules\nrfx\mdk\arm_startup_nrf52.s</FilePath> </File> <File> + <FileName>system_nrf52.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\modules\nrfx\mdk\system_nrf52.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Application</GroupName> + <Files> <File> + <FileName>antfs_ota.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\antfs_ota.c</FilePath> </File> <File> + <FileName>bootloader.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\bootloader.c</FilePath> </File> <File> + <FileName>bootloader_util.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\bootloader_util.c</FilePath> </File> <File> + <FileName>bootloader_util_arm.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\bootloader_util_arm.c</FilePath> </File> <File> + <FileName>debug_pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\debug_pin.c</FilePath> </File> <File> + <FileName>dfu_dual_bank.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\dfu_dual_bank.c</FilePath> </File> <File> + <FileName>dfu_transport_ant.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\dfu_transport_ant.c</FilePath> </File> <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\main.c</FilePath> </File> <File> + <FileName>pstorage.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\pstorage.c</FilePath> </File> <File> + <FileName>sdk_config.h</FileName> + <FileType>5</FileType> + <FilePath>..\config\sdk_config.h</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Board Definition</GroupName> + <Files> <File> + <FileName>boards.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\boards\boards.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Board Support</GroupName> + <Files> <File> + <FileName>bsp.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\bsp\bsp.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_ANT</GroupName> + <Files> <File> + <FileName>ant_key_manager.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\ant\ant_key_manager\ant_key_manager.c</FilePath> </File> <File> + <FileName>antfs.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\ant\ant_fs\antfs.c</FilePath> </File> <File> + <FileName>crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\ant\ant_fs\crc.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Drivers</GroupName> + <Files> <File> + <FileName>nrfx_gpiote.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_gpiote.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Libraries</GroupName> + <Files> <File> + <FileName>app_button.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\button\app_button.c</FilePath> </File> <File> + <FileName>app_error.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_error.c</FilePath> </File> <File> + <FileName>app_error_handler_keil.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_error_handler_keil.c</FilePath> </File> <File> + <FileName>app_error_weak.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_error_weak.c</FilePath> </File> <File> + <FileName>app_scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\scheduler\app_scheduler.c</FilePath> </File> <File> + <FileName>app_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\timer\app_timer.c</FilePath> </File> <File> + <FileName>app_util_platform.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_util_platform.c</FilePath> </File> <File> + <FileName>nrf_assert.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\nrf_assert.c</FilePath> </File> <File> + <FileName>nrf_atomic.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.c</FilePath> </File> <File> + <FileName>nrf_balloc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.c</FilePath> </File> <File> + <FileName>nrf_fprintf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\external\fprintf\nrf_fprintf.c</FilePath> </File> <File> + <FileName>nrf_fprintf_format.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\external\fprintf\nrf_fprintf_format.c</FilePath> </File> <File> + <FileName>nrf_memobj.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_memobj\nrf_memobj.c</FilePath> </File> <File> + <FileName>nrf_section_iter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.c</FilePath> </File> <File> + <FileName>nrf_strerror.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Log</GroupName> + <Files> <File> + <FileName>nrf_log_frontend.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_frontend.c</FilePath> </File> <File> + <FileName>nrf_log_str_formatter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_str_formatter.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_SoftDevice</GroupName> + <Files> <File> + <FileName>nrf_sdh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh.c</FilePath> </File> <File> + <FileName>nrf_sdh_ant.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ant.c</FilePath> </File> <File> + <FileName>nrf_sdh_soc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_soc.c</FilePath> </File> </Files> + </Group> </Groups> + </Target> </Targets> + +</Project> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm5_no_packs/dfu_experimental_dual_bank_ant_pca10040_s212.uvoptx b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm5_no_packs/dfu_experimental_dual_bank_ant_pca10040_s212.uvoptx new file mode 100644 index 0000000..e582265 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm5_no_packs/dfu_experimental_dual_bank_ant_pca10040_s212.uvoptx @@ -0,0 +1,115 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + <Target> + <TargetName>nrf52832_xxaa_s212</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\_build\</ListingPath> + </OPTLEX> + <CpuCode>0</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>1</tPdscDbg> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>7</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U408001579 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf52xxx -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx))</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target></ProjectOpt> + + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm5_no_packs/dfu_experimental_dual_bank_ant_pca10040_s212.uvprojx b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm5_no_packs/dfu_experimental_dual_bank_ant_pca10040_s212.uvprojx new file mode 100644 index 0000000..f11c606 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/arm5_no_packs/dfu_experimental_dual_bank_ant_pca10040_s212.uvprojx @@ -0,0 +1,560 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> <Target> + <TargetName>nrf52832_xxaa_s212</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> <Device>nRF52832_xxAA</Device> + <Vendor>Nordic Semiconductor</Vendor> + <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.16.0</PackID> + <PackURL>http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/</PackURL> <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(64000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll></FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:nRF52832_xxAA$Device\Include\nrf.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>..\..\..\..\..\..\..\modules\nrfx\mdk\nrf52.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\_build\</OutputDirectory> + <OutputName>nrf52832_xxaa_s212</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\_build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName></SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll></SimDlgDll> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> <UsePdscDebugDescription>1</UsePdscDebugDescription> </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>-1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>Segger\JL2CM3.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4099</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>Segger\JL2CM3.dll</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x79000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20002800</StartAddress> + <Size>0xd800</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <v6Lang>0</v6Lang> + <v6LangP>0</v6LangP> + <vShortEn>0</vShortEn> + <vShortWch>0</vShortWch> + <VariousControls> + <MiscControls>--reduce_paths</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT SWI_DISABLE0 __HEAP_SIZE=0 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..;..\..\..\include;..\..\..\include\boot_common;..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\components\ant\ant_fs;..\..\..\..\..\..\..\components\ant\ant_key_manager;..\..\..\..\..\..\..\components\ant\ant_key_manager\config;..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\components\libraries\bsp;..\..\..\..\..\..\..\components\libraries\button;..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\components\libraries\scheduler;..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\components\libraries\timer;..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls> --cpreproc_opts=-DANT_STACK_SUPPORT_REQD,-DBOARD_PCA10040,-DCONFIG_GPIO_AS_PINRESET,-DFLOAT_ABI_HARD,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_74,-DS212,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-D__HEAP_SIZE=0,-D__STACK_SIZE=8192</MiscControls> + <Define> ANT_STACK_SUPPORT_REQD BOARD_PCA10040 CONFIG_GPIO_AS_PINRESET FLOAT_ABI_HARD NRF52 NRF52832_XXAA NRF52_PAN_74 S212 SOFTDEVICE_PRESENT SWI_DISABLE0 __HEAP_SIZE=0 __STACK_SIZE=8192</Define> + <Undefine></Undefine> + <IncludePath>..\..\..\config;..\..\..;..\..\..\include;..\..\..\include\boot_common;..\..\..\..\..\..\..\components;..\..\..\..\..\..\..\components\ant\ant_fs;..\..\..\..\..\..\..\components\ant\ant_key_manager;..\..\..\..\..\..\..\components\ant\ant_key_manager\config;..\..\..\..\..\..\..\components\boards;..\..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\..\components\libraries\bsp;..\..\..\..\..\..\..\components\libraries\button;..\..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\..\components\libraries\experimental_log;..\..\..\..\..\..\..\components\libraries\experimental_log\src;..\..\..\..\..\..\..\components\libraries\experimental_memobj;..\..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\..\components\libraries\scheduler;..\..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\..\components\libraries\timer;..\..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\..\components\softdevice\s212\headers;..\..\..\..\..\..\..\components\softdevice\s212\headers\nrf52;..\..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\..\modules\nrfx\hal;..\..\..\..\..\..\..\modules\nrfx\mdk;..\config</IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x00000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc>--diag_suppress 6330</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> <Group> + <GroupName>Application</GroupName> + <Files> <File> + <FileName>antfs_ota.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\antfs_ota.c</FilePath> </File> <File> + <FileName>bootloader.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\bootloader.c</FilePath> </File> <File> + <FileName>bootloader_util.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\bootloader_util.c</FilePath> </File> <File> + <FileName>bootloader_util_arm.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\bootloader_util_arm.c</FilePath> </File> <File> + <FileName>debug_pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\debug_pin.c</FilePath> </File> <File> + <FileName>dfu_dual_bank.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\dfu_dual_bank.c</FilePath> </File> <File> + <FileName>dfu_transport_ant.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\dfu_transport_ant.c</FilePath> </File> <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\main.c</FilePath> </File> <File> + <FileName>pstorage.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\pstorage.c</FilePath> </File> <File> + <FileName>sdk_config.h</FileName> + <FileType>5</FileType> + <FilePath>..\config\sdk_config.h</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Board Definition</GroupName> + <Files> <File> + <FileName>boards.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\boards\boards.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>Board Support</GroupName> + <Files> <File> + <FileName>bsp.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\bsp\bsp.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_ANT</GroupName> + <Files> <File> + <FileName>ant_key_manager.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\ant\ant_key_manager\ant_key_manager.c</FilePath> </File> <File> + <FileName>antfs.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\ant\ant_fs\antfs.c</FilePath> </File> <File> + <FileName>crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\ant\ant_fs\crc.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Drivers</GroupName> + <Files> <File> + <FileName>nrfx_gpiote.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_gpiote.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Libraries</GroupName> + <Files> <File> + <FileName>app_button.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\button\app_button.c</FilePath> </File> <File> + <FileName>app_error.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_error.c</FilePath> </File> <File> + <FileName>app_error_handler_keil.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_error_handler_keil.c</FilePath> </File> <File> + <FileName>app_error_weak.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_error_weak.c</FilePath> </File> <File> + <FileName>app_scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\scheduler\app_scheduler.c</FilePath> </File> <File> + <FileName>app_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\timer\app_timer.c</FilePath> </File> <File> + <FileName>app_util_platform.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\app_util_platform.c</FilePath> </File> <File> + <FileName>nrf_assert.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\util\nrf_assert.c</FilePath> </File> <File> + <FileName>nrf_atomic.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.c</FilePath> </File> <File> + <FileName>nrf_balloc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.c</FilePath> </File> <File> + <FileName>nrf_fprintf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\external\fprintf\nrf_fprintf.c</FilePath> </File> <File> + <FileName>nrf_fprintf_format.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\external\fprintf\nrf_fprintf_format.c</FilePath> </File> <File> + <FileName>nrf_memobj.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_memobj\nrf_memobj.c</FilePath> </File> <File> + <FileName>nrf_section_iter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.c</FilePath> </File> <File> + <FileName>nrf_strerror.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_Log</GroupName> + <Files> <File> + <FileName>nrf_log_frontend.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_frontend.c</FilePath> </File> <File> + <FileName>nrf_log_str_formatter.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\libraries\experimental_log\src\nrf_log_str_formatter.c</FilePath> </File> </Files> + </Group> <Group> + <GroupName>nRF_SoftDevice</GroupName> + <Files> <File> + <FileName>nrf_sdh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh.c</FilePath> </File> <File> + <FileName>nrf_sdh_ant.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ant.c</FilePath> </File> <File> + <FileName>nrf_sdh_soc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_soc.c</FilePath> </File> </Files> + </Group> </Groups> + </Target> </Targets><RTE> + <packages> + <filter> + <targetInfos/> + </filter> <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"> + <targetInfos> <targetInfo name="nrf52832_xxaa_s212" versionMatchMode="fixed"/> </targetInfos> + </package> + <package name="nRF_DeviceFamilyPack" url="http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/" vendor="NordicSemiconductor" version="8.16.0"> + <targetInfos> <targetInfo name="nrf52832_xxaa_s212" versionMatchMode="fixed"/> </targetInfos> + </package> </packages> + <apis/> + <components> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/> + <targetInfos> <targetInfo name="nrf52832_xxaa_s212" versionMatchMode="fixed"/> </targetInfos> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="NordicSemiconductor" Cversion="8.16.0" condition="nRF5x Series CMSIS Device"> + <package name="nRF_DeviceFamilyPack" url="http://developer.nordicsemi.com/nRF51_SDK/pieces/nRF_DeviceFamilyPack/" vendor="NordicSemiconductor" version="8.16.0"/> + <targetInfos> <targetInfo name="nrf52832_xxaa_s212" versionMatchMode="fixed"/> </targetInfos> + </component> </components> + <files> </files> +</RTE> +</Project> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/armgcc/Makefile b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/armgcc/Makefile new file mode 100644 index 0000000..83f01dd --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/armgcc/Makefile @@ -0,0 +1,188 @@ +PROJECT_NAME := dfu_experimental_dual_bank_ant_pca10040_s212 +TARGETS := nrf52832_xxaa_s212 +OUTPUT_DIRECTORY := _build + +SDK_ROOT := ../../../../../../.. +PROJ_DIR := ../../.. + +$(OUTPUT_DIRECTORY)/nrf52832_xxaa_s212.out: \ + LINKER_SCRIPT := dfu_gcc_nrf52.ld + +# Source files common to all targets +SRC_FILES += \ + $(SDK_ROOT)/modules/nrfx/mdk/gcc_startup_nrf52.S \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_frontend.c \ + $(SDK_ROOT)/components/libraries/experimental_log/src/nrf_log_str_formatter.c \ + $(SDK_ROOT)/components/boards/boards.c \ + $(SDK_ROOT)/components/libraries/button/app_button.c \ + $(SDK_ROOT)/components/libraries/util/app_error.c \ + $(SDK_ROOT)/components/libraries/util/app_error_handler_gcc.c \ + $(SDK_ROOT)/components/libraries/util/app_error_weak.c \ + $(SDK_ROOT)/components/libraries/scheduler/app_scheduler.c \ + $(SDK_ROOT)/components/libraries/timer/app_timer.c \ + $(SDK_ROOT)/components/libraries/util/app_util_platform.c \ + $(SDK_ROOT)/components/libraries/util/nrf_assert.c \ + $(SDK_ROOT)/components/libraries/atomic/nrf_atomic.c \ + $(SDK_ROOT)/components/libraries/balloc/nrf_balloc.c \ + $(SDK_ROOT)/external/fprintf/nrf_fprintf.c \ + $(SDK_ROOT)/external/fprintf/nrf_fprintf_format.c \ + $(SDK_ROOT)/components/libraries/experimental_memobj/nrf_memobj.c \ + $(SDK_ROOT)/components/libraries/experimental_section_vars/nrf_section_iter.c \ + $(SDK_ROOT)/components/libraries/strerror/nrf_strerror.c \ + $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_gpiote.c \ + $(SDK_ROOT)/components/ant/ant_key_manager/ant_key_manager.c \ + $(SDK_ROOT)/components/ant/ant_fs/antfs.c \ + $(SDK_ROOT)/components/ant/ant_fs/crc.c \ + $(SDK_ROOT)/components/libraries/bsp/bsp.c \ + $(PROJ_DIR)/antfs_ota.c \ + $(PROJ_DIR)/bootloader.c \ + $(PROJ_DIR)/bootloader_util.c \ + $(PROJ_DIR)/bootloader_util_gcc.c \ + $(PROJ_DIR)/debug_pin.c \ + $(PROJ_DIR)/dfu_dual_bank.c \ + $(PROJ_DIR)/dfu_transport_ant.c \ + $(PROJ_DIR)/main.c \ + $(PROJ_DIR)/pstorage.c \ + $(SDK_ROOT)/modules/nrfx/mdk/system_nrf52.c \ + $(SDK_ROOT)/components/softdevice/common/nrf_sdh.c \ + $(SDK_ROOT)/components/softdevice/common/nrf_sdh_ant.c \ + $(SDK_ROOT)/components/softdevice/common/nrf_sdh_soc.c \ + +# Include folders common to all targets +INC_FOLDERS += \ + $(PROJ_DIR)/config \ + $(PROJ_DIR) \ + $(PROJ_DIR)/include \ + $(PROJ_DIR)/include/boot_common \ + $(SDK_ROOT)/external/fprintf \ + $(SDK_ROOT)/components/libraries/experimental_section_vars \ + $(SDK_ROOT)/components/ant/ant_key_manager \ + $(SDK_ROOT)/components/libraries/experimental_log \ + $(SDK_ROOT)/components/libraries/experimental_memobj \ + $(SDK_ROOT)/components/libraries/atomic \ + $(SDK_ROOT)/components/libraries/delay \ + ../config \ + $(SDK_ROOT)/components/libraries/balloc \ + $(SDK_ROOT)/components/softdevice/common \ + $(SDK_ROOT)/components \ + $(SDK_ROOT)/modules/nrfx/mdk \ + $(SDK_ROOT)/components/libraries/scheduler \ + $(SDK_ROOT)/components/libraries/strerror \ + $(SDK_ROOT)/integration/nrfx \ + $(SDK_ROOT)/modules/nrfx/drivers/include \ + $(SDK_ROOT)/components/softdevice/s212/headers/nrf52 \ + $(SDK_ROOT)/components/libraries/experimental_log/src \ + $(SDK_ROOT)/components/softdevice/s212/headers \ + $(SDK_ROOT)/modules/nrfx \ + $(SDK_ROOT)/components/ant/ant_fs \ + $(SDK_ROOT)/modules/nrfx/hal \ + $(SDK_ROOT)/components/ant/ant_key_manager/config \ + $(SDK_ROOT)/components/libraries/bsp \ + $(SDK_ROOT)/components/boards \ + $(SDK_ROOT)/components/libraries/timer \ + $(SDK_ROOT)/components/libraries/button \ + $(SDK_ROOT)/integration/nrfx/legacy \ + $(SDK_ROOT)/components/libraries/util \ + $(SDK_ROOT)/components/toolchain/cmsis/include \ + +# Libraries common to all targets +LIB_FILES += \ + +# Optimization flags +OPT = -Os -g3 +# Uncomment the line below to enable link time optimization +#OPT += -flto + +# C flags common to all targets +CFLAGS += $(OPT) +CFLAGS += -DANT_STACK_SUPPORT_REQD +CFLAGS += -DBOARD_PCA10040 +CFLAGS += -DCONFIG_GPIO_AS_PINRESET +CFLAGS += -DFLOAT_ABI_HARD +CFLAGS += -DNRF52 +CFLAGS += -DNRF52832_XXAA +CFLAGS += -DNRF52_PAN_74 +CFLAGS += -DS212 +CFLAGS += -DSOFTDEVICE_PRESENT +CFLAGS += -DSWI_DISABLE0 +CFLAGS += -mcpu=cortex-m4 +CFLAGS += -mthumb -mabi=aapcs +CFLAGS += -Wall -Werror +CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 +# keep every function in a separate section, this allows linker to discard unused ones +CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing +CFLAGS += -fno-builtin -fshort-enums -flto + +# C++ flags common to all targets +CXXFLAGS += $(OPT) + +# Assembler flags common to all targets +ASMFLAGS += -g3 +ASMFLAGS += -mcpu=cortex-m4 +ASMFLAGS += -mthumb -mabi=aapcs +ASMFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 +ASMFLAGS += -DANT_STACK_SUPPORT_REQD +ASMFLAGS += -DBOARD_PCA10040 +ASMFLAGS += -DCONFIG_GPIO_AS_PINRESET +ASMFLAGS += -DFLOAT_ABI_HARD +ASMFLAGS += -DNRF52 +ASMFLAGS += -DNRF52832_XXAA +ASMFLAGS += -DNRF52_PAN_74 +ASMFLAGS += -DS212 +ASMFLAGS += -DSOFTDEVICE_PRESENT +ASMFLAGS += -DSWI_DISABLE0 + +# Linker flags +LDFLAGS += $(OPT) +LDFLAGS += -mthumb -mabi=aapcs -L$(SDK_ROOT)/modules/nrfx/mdk -T$(LINKER_SCRIPT) +LDFLAGS += -mcpu=cortex-m4 +LDFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 +# let linker dump unused sections +LDFLAGS += -Wl,--gc-sections +# use newlib in nano version +LDFLAGS += --specs=nano.specs + +nrf52832_xxaa_s212: CFLAGS += -D__HEAP_SIZE=0 +nrf52832_xxaa_s212: CFLAGS += -D__STACK_SIZE=8192 +nrf52832_xxaa_s212: ASMFLAGS += -D__HEAP_SIZE=0 +nrf52832_xxaa_s212: ASMFLAGS += -D__STACK_SIZE=8192 + +# Add standard libraries at the very end of the linker input, after all objects +# that may need symbols provided by these libraries. +LIB_FILES += -lc -lnosys -lm + + +.PHONY: default help + +# Default target - first one defined +default: nrf52832_xxaa_s212 + +# Print all targets that can be built +help: + @echo following targets are available: + @echo nrf52832_xxaa_s212 + @echo sdk_config - starting external tool for editing sdk_config.h + @echo flash - flashing binary + +TEMPLATE_PATH := $(SDK_ROOT)/components/toolchain/gcc + + +include $(TEMPLATE_PATH)/Makefile.common + +$(foreach target, $(TARGETS), $(call define_target, $(target))) + +.PHONY: flash erase + +# Flash the program +flash: $(OUTPUT_DIRECTORY)/nrf52832_xxaa_s212.hex + @echo Flashing: $< + nrfjprog -f nrf52 --program $< --sectorerase + nrfjprog -f nrf52 --reset + +erase: + nrfjprog -f nrf52 --eraseall + +SDK_CONFIG_FILE := ../config/sdk_config.h +CMSIS_CONFIG_TOOL := $(SDK_ROOT)/external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar +sdk_config: + java -jar $(CMSIS_CONFIG_TOOL) $(SDK_CONFIG_FILE) diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/armgcc/dfu_gcc_nrf52.ld b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/armgcc/dfu_gcc_nrf52.ld new file mode 100644 index 0000000..db1aebe --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/armgcc/dfu_gcc_nrf52.ld @@ -0,0 +1,109 @@ +/* Linker script to configure memory regions. */ + +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x79000, LENGTH = 0x5000 + RAM (rwx) : ORIGIN = 0x20002800, LENGTH = 0xd800 + boot_settings_pending (r) : ORIGIN = 0x0007E000, LENGTH = 0x1000 + boot_settings (r) : ORIGIN = 0x0007F000, LENGTH = 0x1000 + uicr_boot_start_address (r) : ORIGIN = 0x10001014, LENGTH = 0x4 + uicr_mbr_retaining_address (r) : ORIGIN = 0x10001018, LENGTH = 0x4 +} + +SECTIONS +{ + .boot_settings_pending(NOLOAD) : + { + PROVIDE(__start_boot_settings_pending = .); + KEEP(*(SORT(.boot_settings_pending*))) + PROVIDE(__stop_boot_settings_pending = .); + } > boot_settings_pending + .boot_settings(NOLOAD) : + { + PROVIDE(__start_boot_settings = .); + KEEP(*(SORT(.boot_settings*))) + PROVIDE(__stop_boot_settings = .); + } > boot_settings + .uicr_boot_start_address : + { + PROVIDE(__start_uicr_boot_start_address = .); + KEEP(*(SORT(.uicr_boot_start_address*))) + PROVIDE(__stop_uicr_boot_start_address = .); + } > uicr_boot_start_address + .uicr_mbr_retaining_address : + { + PROVIDE(__start_uicr_mbr_retaining_address = .); + KEEP(*(SORT(.uicr_mbr_retaining_address*))) + PROVIDE(__stop_uicr_mbr_retaining_address = .); + } > uicr_mbr_retaining_address +} + +SECTIONS +{ + . = ALIGN(4); + .mem_section_dummy_ram : + { + } + .log_dynamic_data : + { + PROVIDE(__start_log_dynamic_data = .); + KEEP(*(SORT(.log_dynamic_data*))) + PROVIDE(__stop_log_dynamic_data = .); + } > RAM + +} INSERT AFTER .data; + +SECTIONS +{ + .mem_section_dummy_rom : + { + } + .sdh_ant_observers : + { + PROVIDE(__start_sdh_ant_observers = .); + KEEP(*(SORT(.sdh_ant_observers*))) + PROVIDE(__stop_sdh_ant_observers = .); + } > FLASH + .sdh_soc_observers : + { + PROVIDE(__start_sdh_soc_observers = .); + KEEP(*(SORT(.sdh_soc_observers*))) + PROVIDE(__stop_sdh_soc_observers = .); + } > FLASH + .log_const_data : + { + PROVIDE(__start_log_const_data = .); + KEEP(*(SORT(.log_const_data*))) + PROVIDE(__stop_log_const_data = .); + } > FLASH + .nrf_balloc : + { + PROVIDE(__start_nrf_balloc = .); + KEEP(*(.nrf_balloc)) + PROVIDE(__stop_nrf_balloc = .); + } > FLASH + .sdh_state_observers : + { + PROVIDE(__start_sdh_state_observers = .); + KEEP(*(SORT(.sdh_state_observers*))) + PROVIDE(__stop_sdh_state_observers = .); + } > FLASH + .sdh_stack_observers : + { + PROVIDE(__start_sdh_stack_observers = .); + KEEP(*(SORT(.sdh_stack_observers*))) + PROVIDE(__stop_sdh_stack_observers = .); + } > FLASH + .sdh_req_observers : + { + PROVIDE(__start_sdh_req_observers = .); + KEEP(*(SORT(.sdh_req_observers*))) + PROVIDE(__stop_sdh_req_observers = .); + } > FLASH + +} INSERT AFTER .text + +INCLUDE "nrf_common.ld" diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/config/sdk_config.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/config/sdk_config.h new file mode 100644 index 0000000..f363c7a --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/config/sdk_config.h @@ -0,0 +1,3303 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + + +#ifndef SDK_CONFIG_H +#define SDK_CONFIG_H +// <<< Use Configuration Wizard in Context Menu >>>\n +#ifdef USE_APP_CONFIG +#include "app_config.h" +#endif +// <h> nRF_ANT + +//========================================================== +// <e> ANTFS_ENABLED - ant_fs - ANT File Share module. +//========================================================== +#ifndef ANTFS_ENABLED +#define ANTFS_ENABLED 1 +#endif +// <o> ANTFS_CONFIG_NETWORK_NUMBER - ANT-FS network number. +#ifndef ANTFS_CONFIG_NETWORK_NUMBER +#define ANTFS_CONFIG_NETWORK_NUMBER 0 +#endif + +// <o> ANTFS_CONFIG_CHANNEL_NUMBER - ANT-FS channel number. +#ifndef ANTFS_CONFIG_CHANNEL_NUMBER +#define ANTFS_CONFIG_CHANNEL_NUMBER 0 +#endif + +// <o> ANTFS_CONFIG_PAIRING_TIMEOUT - Pairing timeout - how long the UI will wait for a response to a pairing request before switching to the link layer, in seconds. +#ifndef ANTFS_CONFIG_PAIRING_TIMEOUT +#define ANTFS_CONFIG_PAIRING_TIMEOUT 120 +#endif + +// <o> ANTFS_CONFIG_LINK_COMMAND_TIMEOUT - Command timeout - how long the client will wait without receiving any commands before switching to the link layer, in seconds. +#ifndef ANTFS_CONFIG_LINK_COMMAND_TIMEOUT +#define ANTFS_CONFIG_LINK_COMMAND_TIMEOUT 10 +#endif + +// <o> ANTFS_CONFIG_TRANS_TYPE - ANT-FS Transmission Type. +#ifndef ANTFS_CONFIG_TRANS_TYPE +#define ANTFS_CONFIG_TRANS_TYPE 5 +#endif + +// <o> ANTFS_CONFIG_DEVICE_TYPE - ANT device type for channel configuration. +#ifndef ANTFS_CONFIG_DEVICE_TYPE +#define ANTFS_CONFIG_DEVICE_TYPE 16 +#endif + +// <o> ANTFS_CONFIG_BEACON_STATUS_PERIOD - ANT-FS Beacon Message Period. + +// <0=> 0.5 Hz +// <1=> 1 Hz +// <2=> 2 Hz +// <3=> 4 Hz +// <4=> 8 Hz + +#ifndef ANTFS_CONFIG_BEACON_STATUS_PERIOD +#define ANTFS_CONFIG_BEACON_STATUS_PERIOD 3 +#endif + +// <o> ANTFS_CONFIG_TRANSMIT_POWER - ANT Transmit Power. + +// <0=> Lowest ANT Tx power level setting. (-20dBm) +// <1=> ANT Tx power > Lvl 0. (-12dBm) +// <2=> ANT Tx power > Lvl 1. (-4dBm) +// <3=> ANT Tx power > Lvl 2. Default tx power level. (0dBm) +// <4=> ANT Tx power > Lvl 3. (+4dBm) +// <128=> Custom tx power selection + +#ifndef ANTFS_CONFIG_TRANSMIT_POWER +#define ANTFS_CONFIG_TRANSMIT_POWER 3 +#endif + +// <o> ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER - ANT Custom Transmit Power. +#ifndef ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER +#define ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER 0 +#endif + +// <q> ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED - Use pairing and key exchange authentication. + + +#ifndef ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED +#define ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED 0 +#endif + +// <q> ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED - Use passkey authentication. + + +#ifndef ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED +#define ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED 0 +#endif + +// <q> ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED - Allow host to bypass authentication. + + +#ifndef ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED +#define ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED 1 +#endif + +// <q> ANTFS_CONFIG_UPLOAD_ENABLED - Support upload operation. + + +#ifndef ANTFS_CONFIG_UPLOAD_ENABLED +#define ANTFS_CONFIG_UPLOAD_ENABLED 1 +#endif + +// <q> ANTFS_CONFIG_DEBUG_LED_ENABLED - Enables LED debug in the module. + + +#ifndef ANTFS_CONFIG_DEBUG_LED_ENABLED +#define ANTFS_CONFIG_DEBUG_LED_ENABLED 0 +#endif + +// </e> + +// <q> ANT_KEY_MANAGER_ENABLED - ant_key_manager - Software Component + + +#ifndef ANT_KEY_MANAGER_ENABLED +#define ANT_KEY_MANAGER_ENABLED 1 +#endif + +// </h> +//========================================================== + +// <h> nRF_Drivers + +//========================================================== +// <e> GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer +//========================================================== +#ifndef GPIOTE_ENABLED +#define GPIOTE_ENABLED 1 +#endif +// <o> GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4 +#endif + +// <o> GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef GPIOTE_CONFIG_IRQ_PRIORITY +#define GPIOTE_CONFIG_IRQ_PRIORITY 7 +#endif + +// </e> + +// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver +//========================================================== +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 1 +#endif +// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#endif + +// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR +#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR +#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// </h> +//========================================================== + +// <h> nRF_Libraries + +//========================================================== +// <e> APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler +//========================================================== +#ifndef APP_SCHEDULER_ENABLED +#define APP_SCHEDULER_ENABLED 1 +#endif +// <q> APP_SCHEDULER_WITH_PAUSE - Enabling pause feature + + +#ifndef APP_SCHEDULER_WITH_PAUSE +#define APP_SCHEDULER_WITH_PAUSE 0 +#endif + +// <q> APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling + + +#ifndef APP_SCHEDULER_WITH_PROFILER +#define APP_SCHEDULER_WITH_PROFILER 0 +#endif + +// </e> + +// <e> APP_TIMER_ENABLED - app_timer - Application timer functionality +//========================================================== +#ifndef APP_TIMER_ENABLED +#define APP_TIMER_ENABLED 1 +#endif +// <o> APP_TIMER_CONFIG_RTC_FREQUENCY - Configure RTC prescaler. + +// <0=> 32768 Hz +// <1=> 16384 Hz +// <3=> 8192 Hz +// <7=> 4096 Hz +// <15=> 2048 Hz +// <31=> 1024 Hz + +#ifndef APP_TIMER_CONFIG_RTC_FREQUENCY +#define APP_TIMER_CONFIG_RTC_FREQUENCY 0 +#endif + +// <o> APP_TIMER_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef APP_TIMER_CONFIG_IRQ_PRIORITY +#define APP_TIMER_CONFIG_IRQ_PRIORITY 7 +#endif + +// <o> APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. +// <i> Size of the queue depends on how many timers are used +// <i> in the system, how often timers are started and overall +// <i> system latency. If queue size is too small app_timer calls +// <i> will fail. + +#ifndef APP_TIMER_CONFIG_OP_QUEUE_SIZE +#define APP_TIMER_CONFIG_OP_QUEUE_SIZE 10 +#endif + +// <q> APP_TIMER_CONFIG_USE_SCHEDULER - Enable scheduling app_timer events to app_scheduler + + +#ifndef APP_TIMER_CONFIG_USE_SCHEDULER +#define APP_TIMER_CONFIG_USE_SCHEDULER 1 +#endif + +// <q> APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on + + +// <i> If option is enabled RTC is kept running even if there is no active timers. +// <i> This option can be used when app_timer is used for timestamping. + +#ifndef APP_TIMER_KEEPS_RTC_ACTIVE +#define APP_TIMER_KEEPS_RTC_ACTIVE 0 +#endif + +// <h> App Timer Legacy configuration - Legacy configuration. + +//========================================================== +// <q> APP_TIMER_WITH_PROFILER - Enable app_timer profiling + + +#ifndef APP_TIMER_WITH_PROFILER +#define APP_TIMER_WITH_PROFILER 0 +#endif + +// <q> APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. + + +#ifndef APP_TIMER_CONFIG_SWI_NUMBER +#define APP_TIMER_CONFIG_SWI_NUMBER 0 +#endif + +// </h> +//========================================================== + +// </e> + +// <e> NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module +//========================================================== +#ifndef NRF_BALLOC_ENABLED +#define NRF_BALLOC_ENABLED 1 +#endif +// <e> NRF_BALLOC_CONFIG_DEBUG_ENABLED - Enables debug mode in the module. +//========================================================== +#ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED +#define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0 +#endif +// <o> NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> + + +#ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS +#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1 +#endif + +// <o> NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> + + +#ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS +#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS 1 +#endif + +// <q> NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED - Enables basic checks in this module. + + +#ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED +#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0 +#endif + +// <q> NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED - Enables double memory free check in this module. + + +#ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED +#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0 +#endif + +// <q> NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED - Enables free memory corruption check in this module. + + +#ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED +#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0 +#endif + +// <q> NRF_BALLOC_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_BALLOC_CLI_CMDS +#define NRF_BALLOC_CLI_CMDS 0 +#endif + +// </e> + +// </e> + +// <q> NRF_FPRINTF_ENABLED - nrf_fprintf - fprintf function. + + +#ifndef NRF_FPRINTF_ENABLED +#define NRF_FPRINTF_ENABLED 1 +#endif + +// <q> NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module + + +#ifndef NRF_MEMOBJ_ENABLED +#define NRF_MEMOBJ_ENABLED 1 +#endif + +// <q> NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator + + +#ifndef NRF_SECTION_ITER_ENABLED +#define NRF_SECTION_ITER_ENABLED 1 +#endif + +// <q> NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. + + +#ifndef NRF_STRERROR_ENABLED +#define NRF_STRERROR_ENABLED 1 +#endif + +// <h> app_button - buttons handling module + +//========================================================== +// <q> BUTTON_ENABLED - Enables Button module + + +#ifndef BUTTON_ENABLED +#define BUTTON_ENABLED 1 +#endif + +// <q> BUTTON_HIGH_ACCURACY_ENABLED - Enables GPIOTE high accuracy for buttons + + +#ifndef BUTTON_HIGH_ACCURACY_ENABLED +#define BUTTON_HIGH_ACCURACY_ENABLED 0 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + +// <h> nRF_Log + +//========================================================== +// <q> NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED - nrf_log_str_formatter - Log string formatter + + +#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED +#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1 +#endif + +// <h> nrf_log - Logger + +//========================================================== +// <e> NRF_LOG_ENABLED - Logging module for nRF5 SDK +//========================================================== +#ifndef NRF_LOG_ENABLED +#define NRF_LOG_ENABLED 0 +#endif +// <e> NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string +//========================================================== +#ifndef NRF_LOG_USES_COLORS +#define NRF_LOG_USES_COLORS 0 +#endif +// <o> NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_COLOR_DEFAULT +#define NRF_LOG_COLOR_DEFAULT 0 +#endif + +// <o> NRF_LOG_ERROR_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_ERROR_COLOR +#define NRF_LOG_ERROR_COLOR 2 +#endif + +// <o> NRF_LOG_WARNING_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_WARNING_COLOR +#define NRF_LOG_WARNING_COLOR 4 +#endif + +// </e> + +// <o> NRF_LOG_DEFAULT_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LOG_DEFAULT_LEVEL +#define NRF_LOG_DEFAULT_LEVEL 3 +#endif + +// <q> NRF_LOG_DEFERRED - Enable deffered logger. + + +// <i> Log data is buffered and can be processed in idle. + +#ifndef NRF_LOG_DEFERRED +#define NRF_LOG_DEFERRED 1 +#endif + +// <o> NRF_LOG_BUFSIZE - Size of the buffer for storing logs (in bytes). + + +// <i> Must be power of 2 and multiple of 4. +// <i> If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum. +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 +// <2048=> 2048 +// <4096=> 4096 +// <8192=> 8192 +// <16384=> 16384 + +#ifndef NRF_LOG_BUFSIZE +#define NRF_LOG_BUFSIZE 1024 +#endif + +// <q> NRF_LOG_ALLOW_OVERFLOW - Configures behavior when circular buffer is full. + + +// <i> If set then oldest logs are overwritten. Otherwise a +// <i> marker is injected informing about overflow. + +#ifndef NRF_LOG_ALLOW_OVERFLOW +#define NRF_LOG_ALLOW_OVERFLOW 1 +#endif + +// <e> NRF_LOG_USES_TIMESTAMP - Enable timestamping + +// <i> Function for getting the timestamp is provided by the user +//========================================================== +#ifndef NRF_LOG_USES_TIMESTAMP +#define NRF_LOG_USES_TIMESTAMP 0 +#endif +// <o> NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) +#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY +#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 32768 +#endif + +// </e> + +// <q> NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. + + +#ifndef NRF_LOG_FILTERS_ENABLED +#define NRF_LOG_FILTERS_ENABLED 0 +#endif + +// <q> NRF_LOG_CLI_CMDS - Enable CLI commands for the module. + + +#ifndef NRF_LOG_CLI_CMDS +#define NRF_LOG_CLI_CMDS 0 +#endif + +// <h> Log message pool - Configuration of log message pool + +//========================================================== +// <o> NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. +// <i> If a small value is set, then performance of logs processing +// <i> is degraded because data is fragmented. Bigger value impacts +// <i> RAM memory utilization. The size is set to fit a message with +// <i> a timestamp and up to 2 arguments in a single memory object. + +#ifndef NRF_LOG_MSGPOOL_ELEMENT_SIZE +#define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20 +#endif + +// <o> NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects +// <i> If a small value is set, then it may lead to a deadlock +// <i> in certain cases if backend has high latency and holds +// <i> multiple messages for long time. Bigger value impacts +// <i> RAM memory usage. + +#ifndef NRF_LOG_MSGPOOL_ELEMENT_COUNT +#define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8 +#endif + +// </h> +//========================================================== + +// </e> + +// <h> nrf_log module configuration + +//========================================================== +// <h> nrf_log in nRF_Core + +//========================================================== +// <e> NRF_MPU_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_MPU_CONFIG_LOG_ENABLED +#define NRF_MPU_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_MPU_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_MPU_CONFIG_LOG_LEVEL +#define NRF_MPU_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_MPU_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MPU_CONFIG_INFO_COLOR +#define NRF_MPU_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_MPU_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MPU_CONFIG_DEBUG_COLOR +#define NRF_MPU_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_STACK_GUARD_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_STACK_GUARD_CONFIG_LOG_ENABLED +#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_STACK_GUARD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL +#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_STACK_GUARD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR +#define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_STACK_GUARD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR +#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TASK_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TASK_MANAGER_CONFIG_LOG_ENABLED +#define TASK_MANAGER_CONFIG_LOG_ENABLED 0 +#endif +// <o> TASK_MANAGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TASK_MANAGER_CONFIG_LOG_LEVEL +#define TASK_MANAGER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TASK_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TASK_MANAGER_CONFIG_INFO_COLOR +#define TASK_MANAGER_CONFIG_INFO_COLOR 0 +#endif + +// <o> TASK_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR +#define TASK_MANAGER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// <h> nrf_log in nRF_Drivers + +//========================================================== +// <e> CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef CLOCK_CONFIG_LOG_ENABLED +#define CLOCK_CONFIG_LOG_ENABLED 0 +#endif +// <o> CLOCK_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef CLOCK_CONFIG_LOG_LEVEL +#define CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +// <o> CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef CLOCK_CONFIG_INFO_COLOR +#define CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// <o> CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef CLOCK_CONFIG_DEBUG_COLOR +#define CLOCK_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> COMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef COMP_CONFIG_LOG_ENABLED +#define COMP_CONFIG_LOG_ENABLED 0 +#endif +// <o> COMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef COMP_CONFIG_LOG_LEVEL +#define COMP_CONFIG_LOG_LEVEL 3 +#endif + +// <o> COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef COMP_CONFIG_INFO_COLOR +#define COMP_CONFIG_INFO_COLOR 0 +#endif + +// <o> COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef COMP_CONFIG_DEBUG_COLOR +#define COMP_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef GPIOTE_CONFIG_LOG_ENABLED +#define GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef GPIOTE_CONFIG_LOG_LEVEL +#define GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef GPIOTE_CONFIG_INFO_COLOR +#define GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef GPIOTE_CONFIG_DEBUG_COLOR +#define GPIOTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef LPCOMP_CONFIG_LOG_ENABLED +#define LPCOMP_CONFIG_LOG_ENABLED 0 +#endif +// <o> LPCOMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef LPCOMP_CONFIG_LOG_LEVEL +#define LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +// <o> LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef LPCOMP_CONFIG_INFO_COLOR +#define LPCOMP_CONFIG_INFO_COLOR 0 +#endif + +// <o> LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef LPCOMP_CONFIG_DEBUG_COLOR +#define LPCOMP_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PDM_CONFIG_LOG_ENABLED +#define PDM_CONFIG_LOG_ENABLED 0 +#endif +// <o> PDM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PDM_CONFIG_LOG_LEVEL +#define PDM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PDM_CONFIG_INFO_COLOR +#define PDM_CONFIG_INFO_COLOR 0 +#endif + +// <o> PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PDM_CONFIG_DEBUG_COLOR +#define PDM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> PPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PPI_CONFIG_LOG_ENABLED +#define PPI_CONFIG_LOG_ENABLED 0 +#endif +// <o> PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PPI_CONFIG_LOG_LEVEL +#define PPI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PPI_CONFIG_INFO_COLOR +#define PPI_CONFIG_INFO_COLOR 0 +#endif + +// <o> PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PPI_CONFIG_DEBUG_COLOR +#define PPI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PWM_CONFIG_LOG_ENABLED +#define PWM_CONFIG_LOG_ENABLED 0 +#endif +// <o> PWM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PWM_CONFIG_LOG_LEVEL +#define PWM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PWM_CONFIG_INFO_COLOR +#define PWM_CONFIG_INFO_COLOR 0 +#endif + +// <o> PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PWM_CONFIG_DEBUG_COLOR +#define PWM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef QDEC_CONFIG_LOG_ENABLED +#define QDEC_CONFIG_LOG_ENABLED 0 +#endif +// <o> QDEC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef QDEC_CONFIG_LOG_LEVEL +#define QDEC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef QDEC_CONFIG_INFO_COLOR +#define QDEC_CONFIG_INFO_COLOR 0 +#endif + +// <o> QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef QDEC_CONFIG_DEBUG_COLOR +#define QDEC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> RNG_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef RNG_CONFIG_LOG_ENABLED +#define RNG_CONFIG_LOG_ENABLED 0 +#endif +// <o> RNG_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef RNG_CONFIG_LOG_LEVEL +#define RNG_CONFIG_LOG_LEVEL 3 +#endif + +// <o> RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RNG_CONFIG_INFO_COLOR +#define RNG_CONFIG_INFO_COLOR 0 +#endif + +// <o> RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RNG_CONFIG_DEBUG_COLOR +#define RNG_CONFIG_DEBUG_COLOR 0 +#endif + +// <q> RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. + + +#ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED +#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 +#endif + +// </e> + +// <e> RTC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef RTC_CONFIG_LOG_ENABLED +#define RTC_CONFIG_LOG_ENABLED 0 +#endif +// <o> RTC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef RTC_CONFIG_LOG_LEVEL +#define RTC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RTC_CONFIG_INFO_COLOR +#define RTC_CONFIG_INFO_COLOR 0 +#endif + +// <o> RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RTC_CONFIG_DEBUG_COLOR +#define RTC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SAADC_CONFIG_LOG_ENABLED +#define SAADC_CONFIG_LOG_ENABLED 0 +#endif +// <o> SAADC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SAADC_CONFIG_LOG_LEVEL +#define SAADC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SAADC_CONFIG_INFO_COLOR +#define SAADC_CONFIG_INFO_COLOR 0 +#endif + +// <o> SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SAADC_CONFIG_DEBUG_COLOR +#define SAADC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SPIS_CONFIG_LOG_ENABLED +#define SPIS_CONFIG_LOG_ENABLED 0 +#endif +// <o> SPIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SPIS_CONFIG_LOG_LEVEL +#define SPIS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPIS_CONFIG_INFO_COLOR +#define SPIS_CONFIG_INFO_COLOR 0 +#endif + +// <o> SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPIS_CONFIG_DEBUG_COLOR +#define SPIS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> SPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SPI_CONFIG_LOG_ENABLED +#define SPI_CONFIG_LOG_ENABLED 0 +#endif +// <o> SPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SPI_CONFIG_LOG_LEVEL +#define SPI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_INFO_COLOR +#define SPI_CONFIG_INFO_COLOR 0 +#endif + +// <o> SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_DEBUG_COLOR +#define SPI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TIMER_CONFIG_LOG_ENABLED +#define TIMER_CONFIG_LOG_ENABLED 0 +#endif +// <o> TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TIMER_CONFIG_LOG_LEVEL +#define TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TIMER_CONFIG_INFO_COLOR +#define TIMER_CONFIG_INFO_COLOR 0 +#endif + +// <o> TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TIMER_CONFIG_DEBUG_COLOR +#define TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TWIS_CONFIG_LOG_ENABLED +#define TWIS_CONFIG_LOG_ENABLED 0 +#endif +// <o> TWIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TWIS_CONFIG_LOG_LEVEL +#define TWIS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWIS_CONFIG_INFO_COLOR +#define TWIS_CONFIG_INFO_COLOR 0 +#endif + +// <o> TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWIS_CONFIG_DEBUG_COLOR +#define TWIS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> TWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TWI_CONFIG_LOG_ENABLED +#define TWI_CONFIG_LOG_ENABLED 0 +#endif +// <o> TWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TWI_CONFIG_LOG_LEVEL +#define TWI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWI_CONFIG_INFO_COLOR +#define TWI_CONFIG_INFO_COLOR 0 +#endif + +// <o> TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWI_CONFIG_DEBUG_COLOR +#define TWI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef UART_CONFIG_LOG_ENABLED +#define UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef UART_CONFIG_LOG_LEVEL +#define UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef UART_CONFIG_INFO_COLOR +#define UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef UART_CONFIG_DEBUG_COLOR +#define UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> USBD_CONFIG_LOG_ENABLED - Enable logging in the module +//========================================================== +#ifndef USBD_CONFIG_LOG_ENABLED +#define USBD_CONFIG_LOG_ENABLED 0 +#endif +// <o> USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef USBD_CONFIG_LOG_LEVEL +#define USBD_CONFIG_LOG_LEVEL 3 +#endif + +// <o> USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef USBD_CONFIG_INFO_COLOR +#define USBD_CONFIG_INFO_COLOR 0 +#endif + +// <o> USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef USBD_CONFIG_DEBUG_COLOR +#define USBD_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef WDT_CONFIG_LOG_ENABLED +#define WDT_CONFIG_LOG_ENABLED 0 +#endif +// <o> WDT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef WDT_CONFIG_LOG_LEVEL +#define WDT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef WDT_CONFIG_INFO_COLOR +#define WDT_CONFIG_INFO_COLOR 0 +#endif + +// <o> WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef WDT_CONFIG_DEBUG_COLOR +#define WDT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// <h> nrf_log in nRF_Libraries + +//========================================================== +// <e> APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_TIMER_CONFIG_LOG_ENABLED +#define APP_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_LOG_LEVEL +#define APP_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_TIMER_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// <i> If module generates a lot of logs, initial log level can +// <i> be decreased to prevent flooding. Severity level can be +// <i> increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL +#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// <o> APP_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_INFO_COLOR +#define APP_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_DEBUG_COLOR +#define APP_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED +#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL +#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_CDC_ACM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR +#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR +#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED +#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_DUMMY_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL +#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_DUMMY_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR +#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_DUMMY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR +#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED +#define APP_USBD_MSC_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_MSC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL +#define APP_USBD_MSC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_MSC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR +#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR +#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0 +#endif +// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0 +#endif + +// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED +#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_ATFIFO_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// <o> NRF_ATFIFO_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR +#define NRF_ATFIFO_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_ATFIFO_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR +#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_BALLOC_CONFIG_LOG_ENABLED +#define NRF_BALLOC_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_BALLOC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_LOG_LEVEL +#define NRF_BALLOC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// <i> If module generates a lot of logs, initial log level can +// <i> be decreased to prevent flooding. Severity level can be +// <i> increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL +#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// <o> NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BALLOC_CONFIG_INFO_COLOR +#define NRF_BALLOC_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_BALLOC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR +#define NRF_BALLOC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED +#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL +#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_CLI_BLE_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR +#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR +#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED +#define NRF_CLI_UART_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_CLI_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL +#define NRF_CLI_UART_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_CLI_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_UART_CONFIG_INFO_COLOR +#define NRF_CLI_UART_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_CLI_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR +#define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED +#define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_MEMOBJ_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL +#define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_MEMOBJ_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR +#define NRF_MEMOBJ_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_MEMOBJ_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR +#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_PWR_MGMT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_PWR_MGMT_CONFIG_LOG_ENABLED +#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_PWR_MGMT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL +#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_PWR_MGMT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR +#define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_PWR_MGMT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR +#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED +#define NRF_QUEUE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_QUEUE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL +#define NRF_QUEUE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// <o> NRF_QUEUE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_INFO_COLOR +#define NRF_QUEUE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_QUEUE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR +#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module. +//========================================================== +#ifndef NRF_SDH_ANT_LOG_ENABLED +#define NRF_SDH_ANT_LOG_ENABLED 1 +#endif +// <o> NRF_SDH_ANT_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_ANT_LOG_LEVEL +#define NRF_SDH_ANT_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_ANT_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_ANT_INFO_COLOR +#define NRF_SDH_ANT_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_ANT_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_ANT_DEBUG_COLOR +#define NRF_SDH_ANT_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_BLE_LOG_ENABLED - Enable logging in SoftDevice handler (BLE) module. +//========================================================== +#ifndef NRF_SDH_BLE_LOG_ENABLED +#define NRF_SDH_BLE_LOG_ENABLED 0 +#endif +// <o> NRF_SDH_BLE_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_BLE_LOG_LEVEL +#define NRF_SDH_BLE_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_BLE_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_BLE_INFO_COLOR +#define NRF_SDH_BLE_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_BLE_DEBUG_COLOR +#define NRF_SDH_BLE_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_LOG_ENABLED - Enable logging in SoftDevice handler module. +//========================================================== +#ifndef NRF_SDH_LOG_ENABLED +#define NRF_SDH_LOG_ENABLED 1 +#endif +// <o> NRF_SDH_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_LOG_LEVEL +#define NRF_SDH_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_INFO_COLOR +#define NRF_SDH_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_DEBUG_COLOR +#define NRF_SDH_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SDH_SOC_LOG_ENABLED - Enable logging in SoftDevice handler (SoC) module. +//========================================================== +#ifndef NRF_SDH_SOC_LOG_ENABLED +#define NRF_SDH_SOC_LOG_ENABLED 1 +#endif +// <o> NRF_SDH_SOC_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_SOC_LOG_LEVEL +#define NRF_SDH_SOC_LOG_LEVEL 3 +#endif + +// <o> NRF_SDH_SOC_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_SOC_INFO_COLOR +#define NRF_SDH_SOC_INFO_COLOR 0 +#endif + +// <o> NRF_SDH_SOC_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_SOC_DEBUG_COLOR +#define NRF_SDH_SOC_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED +#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_SORTLIST_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL +#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_SORTLIST_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR +#define NRF_SORTLIST_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_SORTLIST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR +#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// <e> NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED +#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRF_TWI_SENSOR_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL +#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRF_TWI_SENSOR_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR +#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR +#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// <h> nrf_log in nRF_Serialization + +//========================================================== +// <e> SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED +#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0 +#endif +// <o> SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL +#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> SER_HAL_TRANSPORT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR +#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0 +#endif + +// <o> SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR +#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </h> +//========================================================== + +// </h> +//========================================================== + +// </h> +//========================================================== + +// </h> +//========================================================== + +// <h> nRF_SoftDevice + +//========================================================== +// <e> NRF_SDH_ANT_ENABLED - nrf_sdh_ant - SoftDevice ANT event handler +//========================================================== +#ifndef NRF_SDH_ANT_ENABLED +#define NRF_SDH_ANT_ENABLED 1 +#endif +// <h> ANT Channels + +//========================================================== +// <o> NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED - Allocated ANT channels. +#ifndef NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED +#define NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED 1 +#endif + +// <o> NRF_SDH_ANT_ENCRYPTED_CHANNELS - Encrypted ANT channels. +#ifndef NRF_SDH_ANT_ENCRYPTED_CHANNELS +#define NRF_SDH_ANT_ENCRYPTED_CHANNELS 0 +#endif + +// </h> +//========================================================== + +// <h> ANT Queues + +//========================================================== +// <o> NRF_SDH_ANT_EVENT_QUEUE_SIZE - Event queue size. +#ifndef NRF_SDH_ANT_EVENT_QUEUE_SIZE +#define NRF_SDH_ANT_EVENT_QUEUE_SIZE 32 +#endif + +// <o> NRF_SDH_ANT_BURST_QUEUE_SIZE - ANT burst queue size. +#ifndef NRF_SDH_ANT_BURST_QUEUE_SIZE +#define NRF_SDH_ANT_BURST_QUEUE_SIZE 128 +#endif + +// </h> +//========================================================== + +// <h> ANT Observers - Observers and priority levels + +//========================================================== +// <o> NRF_SDH_ANT_OBSERVER_PRIO_LEVELS - Total number of priority levels for ANT observers. +// <i> This setting configures the number of priority levels available for the ANT event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_ANT_OBSERVER_PRIO_LEVELS +#define NRF_SDH_ANT_OBSERVER_PRIO_LEVELS 2 +#endif + +// <h> ANT Observers priorities - Invididual priorities + +//========================================================== +// <o> ANT_BPWR_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Bicycle Power Profile. + +#ifndef ANT_BPWR_ANT_OBSERVER_PRIO +#define ANT_BPWR_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_BSC_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Bicycle Speed and Cadence Profile. + +#ifndef ANT_BSC_ANT_OBSERVER_PRIO +#define ANT_BSC_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_ENCRYPT_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Cryptographic ANT stack configuration module. + +#ifndef ANT_ENCRYPT_ANT_OBSERVER_PRIO +#define ANT_ENCRYPT_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_HRM_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Heart Rate Monitor. + +#ifndef ANT_HRM_ANT_OBSERVER_PRIO +#define ANT_HRM_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_SDM_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Stride Based Speed and Distance Monitor Profile. + +#ifndef ANT_SDM_ANT_OBSERVER_PRIO +#define ANT_SDM_ANT_OBSERVER_PRIO 1 +#endif + +// <o> ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the ANT state indicator module. + +#ifndef ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO +#define ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO 1 +#endif + +// <o> BSP_BTN_ANT_OBSERVER_PRIO +// <i> Priority with which ANT events are dispatched to the Button Control module. + +#ifndef BSP_BTN_ANT_OBSERVER_PRIO +#define BSP_BTN_ANT_OBSERVER_PRIO 1 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + + +// </e> + +// <e> NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler +//========================================================== +#ifndef NRF_SDH_ENABLED +#define NRF_SDH_ENABLED 1 +#endif +// <h> Dispatch model + +// <i> This setting configures how Stack events are dispatched to the application. +//========================================================== +// <o> NRF_SDH_DISPATCH_MODEL + + +// <i> NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context. +// <i> NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler. +// <i> NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually. +// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT +// <1=> NRF_SDH_DISPATCH_MODEL_APPSH +// <2=> NRF_SDH_DISPATCH_MODEL_POLLING + +#ifndef NRF_SDH_DISPATCH_MODEL +#define NRF_SDH_DISPATCH_MODEL 1 +#endif + +// </h> +//========================================================== + +// <h> Clock - SoftDevice clock configuration + +//========================================================== +// <o> NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source. + +// <0=> NRF_CLOCK_LF_SRC_RC +// <1=> NRF_CLOCK_LF_SRC_XTAL +// <2=> NRF_CLOCK_LF_SRC_SYNTH + +#ifndef NRF_SDH_CLOCK_LF_SRC +#define NRF_SDH_CLOCK_LF_SRC 1 +#endif + +// <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. +#ifndef NRF_SDH_CLOCK_LF_RC_CTIV +#define NRF_SDH_CLOCK_LF_RC_CTIV 0 +#endif + +// <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. +// <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated +// <i> if the temperature has not changed. + +#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV +#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0 +#endif + +// <o> NRF_SDH_CLOCK_LF_ACCURACY - External clock accuracy used in the LL to compute timing. + +// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM +// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM +// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM +// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM +// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM +// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM +// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM +// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM +// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM +// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM +// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM +// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM + +#ifndef NRF_SDH_CLOCK_LF_ACCURACY +#define NRF_SDH_CLOCK_LF_ACCURACY 7 +#endif + +// </h> +//========================================================== + +// <h> SDH Observers - Observers and priority levels + +//========================================================== +// <o> NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. +// <i> This setting configures the number of priority levels available for the SoftDevice request event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_REQ_OBSERVER_PRIO_LEVELS +#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2 +#endif + +// <o> NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. +// <i> This setting configures the number of priority levels available for the SoftDevice state event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_STATE_OBSERVER_PRIO_LEVELS +#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2 +#endif + +// <o> NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. +// <i> This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC). +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_STACK_OBSERVER_PRIO_LEVELS +#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS 2 +#endif + + +// <h> State Observers priorities - Invididual priorities + +//========================================================== +// <o> CLOCK_CONFIG_STATE_OBSERVER_PRIO +// <i> Priority with which state events are dispatched to the Clock driver. + +#ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO +#define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// <o> POWER_CONFIG_STATE_OBSERVER_PRIO +// <i> Priority with which state events are dispatched to the Power driver. + +#ifndef POWER_CONFIG_STATE_OBSERVER_PRIO +#define POWER_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// <o> RNG_CONFIG_STATE_OBSERVER_PRIO +// <i> Priority with which state events are dispatched to this module. + +#ifndef RNG_CONFIG_STATE_OBSERVER_PRIO +#define RNG_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// </h> +//========================================================== + +// <h> Stack Event Observers priorities - Invididual priorities + +//========================================================== +// <o> NRF_SDH_ANT_STACK_OBSERVER_PRIO +// <i> This setting configures the priority with which ANT events are processed with respect to other events coming from the stack. +// <i> Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC. +// <i> Zero is the highest priority. + +#ifndef NRF_SDH_ANT_STACK_OBSERVER_PRIO +#define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0 +#endif + +// <o> NRF_SDH_BLE_STACK_OBSERVER_PRIO +// <i> This setting configures the priority with which BLE events are processed with respect to other events coming from the stack. +// <i> Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC. +// <i> Zero is the highest priority. + +#ifndef NRF_SDH_BLE_STACK_OBSERVER_PRIO +#define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0 +#endif + +// <o> NRF_SDH_SOC_STACK_OBSERVER_PRIO +// <i> This setting configures the priority with which SoC events are processed with respect to other events coming from the stack. +// <i> Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE. +// <i> Zero is the highest priority. + +#ifndef NRF_SDH_SOC_STACK_OBSERVER_PRIO +#define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + + +// </e> + +// <e> NRF_SDH_SOC_ENABLED - nrf_sdh_soc - SoftDevice SoC event handler +//========================================================== +#ifndef NRF_SDH_SOC_ENABLED +#define NRF_SDH_SOC_ENABLED 1 +#endif +// <h> SoC Observers - Observers and priority levels + +//========================================================== +// <o> NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. +// <i> This setting configures the number of priority levels available for the SoC event handlers. +// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_SOC_OBSERVER_PRIO_LEVELS +#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS 2 +#endif + +// <h> SoC Observers priorities - Invididual priorities + +//========================================================== +// <o> BLE_ADV_SOC_OBSERVER_PRIO +// <i> Priority with which SoC events are dispatched to the Advertising module. + +#ifndef BLE_ADV_SOC_OBSERVER_PRIO +#define BLE_ADV_SOC_OBSERVER_PRIO 1 +#endif + +// <o> BLE_DFU_SOC_OBSERVER_PRIO +// <i> Priority with which BLE events are dispatched to the DFU Service. + +#ifndef BLE_DFU_SOC_OBSERVER_PRIO +#define BLE_DFU_SOC_OBSERVER_PRIO 1 +#endif + +// <o> CLOCK_CONFIG_SOC_OBSERVER_PRIO +// <i> Priority with which SoC events are dispatched to the Clock driver. + +#ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO +#define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0 +#endif + +// <o> POWER_CONFIG_SOC_OBSERVER_PRIO +// <i> Priority with which SoC events are dispatched to the Power driver. + +#ifndef POWER_CONFIG_SOC_OBSERVER_PRIO +#define POWER_CONFIG_SOC_OBSERVER_PRIO 0 +#endif + +// </h> +//========================================================== + +// </h> +//========================================================== + + +// </e> + +// </h> +//========================================================== + +// <<< end of configuration section >>> +#endif //SDK_CONFIG_H + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/dfu_experimental_dual_bank_ant_pca10040_s212.emProject b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/dfu_experimental_dual_bank_ant_pca10040_s212.emProject new file mode 100644 index 0000000..aa226fa --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/dfu_experimental_dual_bank_ant_pca10040_s212.emProject @@ -0,0 +1,97 @@ +<!DOCTYPE CrossStudio_Project_File> +<solution Name="dfu_experimental_dual_bank_ant_pca10040_s212" target="8" version="2"> + <project Name="dfu_experimental_dual_bank_ant_pca10040_s212"> + <configuration + Name="Common" + arm_architecture="v7EM" + arm_core_type="Cortex-M4" + arm_endian="Little" + arm_fp_abi="Hard" + arm_fpu_type="FPv4-SP-D16" + arm_linker_heap_size="0" + arm_linker_process_stack_size="0" + arm_linker_stack_size="8192" + arm_linker_treat_warnings_as_errors="No" + arm_simulator_memory_simulation_parameter="RWX 00000000,00100000,FFFFFFFF;RWX 20000000,00010000,CDCDCDCD" + arm_target_device_name="nRF52832_xxAA" + arm_target_interface_type="SWD" + c_user_include_directories="../../../config;../../..;../../../include;../../../include/boot_common;../../../../../../../components;../../../../../../../components/ant/ant_fs;../../../../../../../components/ant/ant_key_manager;../../../../../../../components/ant/ant_key_manager/config;../../../../../../../components/boards;../../../../../../../components/libraries/atomic;../../../../../../../components/libraries/balloc;../../../../../../../components/libraries/bsp;../../../../../../../components/libraries/button;../../../../../../../components/libraries/delay;../../../../../../../components/libraries/experimental_log;../../../../../../../components/libraries/experimental_log/src;../../../../../../../components/libraries/experimental_memobj;../../../../../../../components/libraries/experimental_section_vars;../../../../../../../components/libraries/scheduler;../../../../../../../components/libraries/strerror;../../../../../../../components/libraries/timer;../../../../../../../components/libraries/util;../../../../../../../components/softdevice/common;../../../../../../../components/softdevice/s212/headers;../../../../../../../components/softdevice/s212/headers/nrf52;../../../../../../../components/toolchain/cmsis/include;../../../../../../../external/fprintf;../../../../../../../integration/nrfx;../../../../../../../integration/nrfx/legacy;../../../../../../../modules/nrfx;../../../../../../../modules/nrfx/drivers/include;../../../../../../../modules/nrfx/hal;../../../../../../../modules/nrfx/mdk;../config;" + c_preprocessor_definitions="ANT_STACK_SUPPORT_REQD;BOARD_PCA10040;CONFIG_GPIO_AS_PINRESET;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;NRF52;NRF52832_XXAA;NRF52_PAN_74;S212;SOFTDEVICE_PRESENT;SWI_DISABLE0;" + debug_target_connection="J-Link" + gcc_entry_point="Reset_Handler" + macros="CMSIS_CONFIG_TOOL=../../../../../../../external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar" + debug_register_definition_file="../../../../../../../modules/nrfx/mdk/nrf52.svd" + debug_start_from_entry_point_symbol="No" + gcc_debugging_level="Level 3" linker_output_format="hex" + linker_printf_width_precision_supported="Yes" + linker_printf_fmt_level="long" + linker_section_placement_file="flash_placement.xml" + linker_section_placement_macros="FLASH_PH_START=0x0;FLASH_PH_SIZE=0x80000;RAM_PH_START=0x20000000;RAM_PH_SIZE=0x10000;FLASH_START=0x79000;FLASH_SIZE=0x5000;RAM_START=0x20002800;RAM_SIZE=0xd800" + linker_section_placements_segments="FLASH RX 0x0 0x80000;RAM RWX 0x20000000 0x10000;boot_settings_pending RX 0x0007E000 0x1000;boot_settings RX 0x0007F000 0x1000;uicr_boot_start_address RX 0x10001014 0x4;uicr_mbr_retaining_address RX 0x10001018 0x4" + project_directory="" + project_type="Executable" /> + <folder Name="Segger Startup Files"> + <file file_name="$(StudioDir)/source/thumb_crt0.s" /> + </folder> + <folder Name="nRF_Log"> + <file file_name="../../../../../../../components/libraries/experimental_log/src/nrf_log_frontend.c" /> + <file file_name="../../../../../../../components/libraries/experimental_log/src/nrf_log_str_formatter.c" /> + </folder> + <folder Name="Board Definition"> + <file file_name="../../../../../../../components/boards/boards.c" /> + </folder> + <folder Name="nRF_Libraries"> + <file file_name="../../../../../../../components/libraries/button/app_button.c" /> + <file file_name="../../../../../../../components/libraries/util/app_error.c" /> + <file file_name="../../../../../../../components/libraries/util/app_error_handler_gcc.c" /> + <file file_name="../../../../../../../components/libraries/util/app_error_weak.c" /> + <file file_name="../../../../../../../components/libraries/scheduler/app_scheduler.c" /> + <file file_name="../../../../../../../components/libraries/timer/app_timer.c" /> + <file file_name="../../../../../../../components/libraries/util/app_util_platform.c" /> + <file file_name="../../../../../../../components/libraries/util/nrf_assert.c" /> + <file file_name="../../../../../../../components/libraries/atomic/nrf_atomic.c" /> + <file file_name="../../../../../../../components/libraries/balloc/nrf_balloc.c" /> + <file file_name="../../../../../../../external/fprintf/nrf_fprintf.c" /> + <file file_name="../../../../../../../external/fprintf/nrf_fprintf_format.c" /> + <file file_name="../../../../../../../components/libraries/experimental_memobj/nrf_memobj.c" /> + <file file_name="../../../../../../../components/libraries/experimental_section_vars/nrf_section_iter.c" /> + <file file_name="../../../../../../../components/libraries/strerror/nrf_strerror.c" /> + </folder> + <folder Name="nRF_Drivers"> + <file file_name="../../../../../../../modules/nrfx/drivers/src/nrfx_gpiote.c" /> + </folder> + <folder Name="nRF_ANT"> + <file file_name="../../../../../../../components/ant/ant_key_manager/ant_key_manager.c" /> + <file file_name="../../../../../../../components/ant/ant_fs/antfs.c" /> + <file file_name="../../../../../../../components/ant/ant_fs/crc.c" /> + </folder> + <folder Name="Board Support"> + <file file_name="../../../../../../../components/libraries/bsp/bsp.c" /> + </folder> + <folder Name="Application"> + <file file_name="../../../antfs_ota.c" /> + <file file_name="../../../bootloader.c" /> + <file file_name="../../../bootloader_util.c" /> + <file file_name="../../../bootloader_util_gcc.c" /> + <file file_name="../../../debug_pin.c" /> + <file file_name="../../../dfu_dual_bank.c" /> + <file file_name="../../../dfu_transport_ant.c" /> + <file file_name="../../../main.c" /> + <file file_name="../../../pstorage.c" /> + <file file_name="../config/sdk_config.h" /> + </folder> + <folder Name="None"> + <file file_name="../../../../../../../modules/nrfx/mdk/ses_nRF_Startup.s" /> + <file file_name="../../../../../../../modules/nrfx/mdk/ses_nrf52_Vectors.s" /> + <file file_name="../../../../../../../modules/nrfx/mdk/system_nrf52.c" /> + </folder> + <folder Name="nRF_SoftDevice"> + <file file_name="../../../../../../../components/softdevice/common/nrf_sdh.c" /> + <file file_name="../../../../../../../components/softdevice/common/nrf_sdh_ant.c" /> + <file file_name="../../../../../../../components/softdevice/common/nrf_sdh_soc.c" /> + </folder> + </project> + <configuration Name="Release" + c_preprocessor_definitions="NDEBUG" + gcc_optimization_level="Optimize For Size" /> +</solution> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/dfu_experimental_dual_bank_ant_pca10040_s212.emSession b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/dfu_experimental_dual_bank_ant_pca10040_s212.emSession new file mode 100644 index 0000000..d9d510b --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/dfu_experimental_dual_bank_ant_pca10040_s212.emSession @@ -0,0 +1,7 @@ +<!DOCTYPE CrossStudio_Session_File> +<session> + <ARMCrossStudioWindow activeProject="dfu_experimental_dual_bank_ant_pca10040_s212" buildConfiguration="Release"/> + <Files> + <SessionOpenFile codecName="Default" debugPath="../../../main.c" left="0" name="unnamed" path="../../../main.c" selected="1" top="0" useBinaryEdit="0" useTextEdit="1" x="0" y="0"/> + </Files> +</session>
\ No newline at end of file diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/flash_placement.xml b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/flash_placement.xml new file mode 100644 index 0000000..e3760ea --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pca10040/dual_bank_ant_s212/ses/flash_placement.xml @@ -0,0 +1,54 @@ +<!DOCTYPE Linker_Placement_File> +<Root name="Flash Section Placement"> + <MemorySegment name="FLASH" start="$(FLASH_PH_START)" size="$(FLASH_PH_SIZE)"> + <ProgramSection load="no" name=".reserved_flash" start="$(FLASH_PH_START)" size="$(FLASH_START)-$(FLASH_PH_START)" /> + <ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START)" /> + <ProgramSection alignment="4" load="Yes" name=".init" /> + <ProgramSection alignment="4" load="Yes" name=".init_rodata" /> + <ProgramSection alignment="4" load="Yes" name=".text" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_ant_observers" inputsections="*(SORT(.sdh_ant_observers*))" address_symbol="__start_sdh_ant_observers" end_symbol="__stop_sdh_ant_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_soc_observers" inputsections="*(SORT(.sdh_soc_observers*))" address_symbol="__start_sdh_soc_observers" end_symbol="__stop_sdh_soc_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_const_data" inputsections="*(SORT(.log_const_data*))" address_symbol="__start_log_const_data" end_symbol="__stop_log_const_data" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".nrf_balloc" inputsections="*(.nrf_balloc*)" address_symbol="__start_nrf_balloc" end_symbol="__stop_nrf_balloc" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_state_observers" inputsections="*(SORT(.sdh_state_observers*))" address_symbol="__start_sdh_state_observers" end_symbol="__stop_sdh_state_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_stack_observers" inputsections="*(SORT(.sdh_stack_observers*))" address_symbol="__start_sdh_stack_observers" end_symbol="__stop_sdh_stack_observers" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_req_observers" inputsections="*(SORT(.sdh_req_observers*))" address_symbol="__start_sdh_req_observers" end_symbol="__stop_sdh_req_observers" /> + <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections" address_symbol="__start_nrf_sections" /> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_dynamic_data" inputsections="*(SORT(.log_dynamic_data*))" runin=".log_dynamic_data_run"/> + <ProgramSection alignment="4" load="Yes" name=".dtors" /> + <ProgramSection alignment="4" load="Yes" name=".ctors" /> + <ProgramSection alignment="4" load="Yes" name=".rodata" /> + <ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" /> + <ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" /> + <ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" /> + <ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" /> + </MemorySegment> + <MemorySegment name="RAM" start="$(RAM_PH_START)" size="$(RAM_PH_SIZE)"> + <ProgramSection load="no" name=".reserved_ram" start="$(RAM_PH_START)" size="$(RAM_START)-$(RAM_PH_START)" /> + <ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START)" address_symbol="__app_ram_start__"/> + <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections_run" address_symbol="__start_nrf_sections_run" /> + <ProgramSection alignment="4" keep="Yes" load="No" name=".log_dynamic_data_run" address_symbol="__start_log_dynamic_data" end_symbol="__stop_log_dynamic_data" /> + <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections_run_end" address_symbol="__end_nrf_sections_run" /> + <ProgramSection alignment="4" load="No" name=".fast_run" /> + <ProgramSection alignment="4" load="No" name=".data_run" /> + <ProgramSection alignment="4" load="No" name=".tdata_run" /> + <ProgramSection alignment="4" load="No" name=".bss" /> + <ProgramSection alignment="4" load="No" name=".tbss" /> + <ProgramSection alignment="4" load="No" name=".non_init" /> + <ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" /> + <ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack" address_symbol="__StackLimit" end_symbol="__StackTop"/> + <ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" /> + </MemorySegment> + <MemorySegment name="boot_settings_pending" start="0x0007E000" size="0x1000"> + <ProgramSection alignment="4" keep="Yes" load="No" name=".boot_settings_pending" address_symbol="__start_boot_settings_pending" end_symbol="__stop_boot_settings_pending" start = "0x0007E000" size="0x1000" /> + </MemorySegment> + <MemorySegment name="boot_settings" start="0x0007F000" size="0x1000"> + <ProgramSection alignment="4" keep="Yes" load="No" name=".boot_settings" address_symbol="__start_boot_settings" end_symbol="__stop_boot_settings" start = "0x0007F000" size="0x1000" /> + </MemorySegment> + <MemorySegment name="uicr_boot_start_address" start="0x10001014" size="0x4"> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".uicr_boot_start_address" address_symbol="__start_uicr_boot_start_address" end_symbol="__stop_uicr_boot_start_address" start = "0x10001014" size="0x4" /> + </MemorySegment> + <MemorySegment name="uicr_mbr_retaining_address" start="0x10001018" size="0x4"> + <ProgramSection alignment="4" keep="Yes" load="Yes" name=".uicr_mbr_retaining_address" address_symbol="__start_uicr_mbr_retaining_address" end_symbol="__stop_uicr_mbr_retaining_address" start = "0x10001018" size="0x4" /> + </MemorySegment> +</Root> diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pstorage.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pstorage.c new file mode 100644 index 0000000..b4eacff --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pstorage.c @@ -0,0 +1,1589 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "pstorage.h" +#include <stdlib.h> +#include <stdint.h> +#include <string.h> +#include "nordic_common.h" +#include "nrf_error.h" +#include "nrf_assert.h" +#include "nrf.h" +#include "nrf_soc.h" +#include "app_util.h" +#include "app_error.h" +#include "nrf_sdh_soc.h" + +#define INVALID_OPCODE 0x00 /**< Invalid op code identifier. */ +#define SOC_MAX_WRITE_SIZE PSTORAGE_FLASH_PAGE_SIZE /**< Maximum write size allowed for a single call to \ref sd_flash_write as specified in the SoC API. */ +#define RAW_MODE_APP_ID (PSTORAGE_NUM_OF_PAGES + 1) /**< Application id for raw mode. */ + +#if defined(NRF52) +#define SD_CMD_MAX_TRIES 1000 /**< Number of times to try a softdevice flash operatoion, specific for nRF52 to account for longest time of flash page erase*/ +#else +#define SD_CMD_MAX_TRIES 3 /**< Number of times to try a softdevice flash operation when the @ref NRF_EVT_FLASH_OPERATION_ERROR sys_evt is received. */ +#endif /* defined(NRF52) */ + +#define MASK_TAIL_SWAP_DONE (1 << 0) /**< Flag for checking if the tail restore area has been written to swap page. */ +#define MASK_SINGLE_PAGE_OPERATION (1 << 1) /**< Flag for checking if command is a single flash page operation. */ +#define MASK_MODULE_INITIALIZED (1 << 2) /**< Flag for checking if the module has been initialized. */ +#define MASK_FLASH_API_ERR_BUSY (1 << 3) /**< Flag for checking if flash API returned NRF_ERROR_BUSY. */ + +#define MODULE_INITIALIZED (m_flags & MASK_MODULE_INITIALIZED) /**< Macro designating whether the module has been initialized properly. */ + +/** + * @defgroup api_param_check API Parameters check macros. + * + * @details Macros that verify parameters passed to the module in the APIs. These macros + * could be mapped to nothing in final code versions to save execution and size. + * + * @{ + */ + +/**@brief Check if the input pointer is NULL, if so it returns NRF_ERROR_NULL. + */ +#define NULL_PARAM_CHECK(PARAM) \ + if ((PARAM) == NULL) \ + { \ + return NRF_ERROR_NULL; \ + } + +/**@brief Verifies that the module identifier supplied by the application is within permissible + * range. + */ +#define MODULE_ID_RANGE_CHECK(ID) \ + if ((((ID)->module_id) >= PSTORAGE_NUM_OF_PAGES) || \ + (m_app_table[(ID)->module_id].cb == NULL)) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +/**@brief Verifies that the block identifier supplied by the application is within the permissible + * range. + */ +#define BLOCK_ID_RANGE_CHECK(ID) \ + if (((ID)->block_id) >= (m_app_table[(ID)->module_id].base_id + \ + (m_app_table[(ID)->module_id].block_count * MODULE_BLOCK_SIZE(ID)))) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +/**@brief Verifies that the block size requested by the application can be supported by the module. + */ +#define BLOCK_SIZE_CHECK(X) \ + if (((X) > PSTORAGE_MAX_BLOCK_SIZE) || ((X) < PSTORAGE_MIN_BLOCK_SIZE)) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +/**@brief Verifies the block size requested by the application in registration API. + */ +#define BLOCK_COUNT_CHECK(COUNT, SIZE) \ + if (((COUNT) == 0) || \ + ((m_next_page_addr + ((COUNT) *(SIZE)) > PSTORAGE_SWAP_ADDR))) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +/**@brief Verifies the size parameter provided by the application in API. + */ +#define SIZE_CHECK(ID, SIZE) \ + if (((SIZE) == 0) || ((SIZE) > MODULE_BLOCK_SIZE(ID))) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +/**@brief Verifies the offset parameter provided by the application in API. + */ +#define OFFSET_CHECK(ID, OFFSET, SIZE) \ + if (((SIZE) + (OFFSET)) > MODULE_BLOCK_SIZE(ID)) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +#ifdef PSTORAGE_RAW_MODE_ENABLE + +/**@brief Verifies the module identifier supplied by the application. + */ +#define MODULE_RAW_HANDLE_CHECK(ID) \ + if ((((ID)->module_id) != RAW_MODE_APP_ID)) \ + { \ + return NRF_ERROR_INVALID_PARAM; \ + } + +#endif // PSTORAGE_RAW_MODE_ENABLE + +/**@} */ + + +/**@brief Macro to fetch the block size registered for the module. */ +#define MODULE_BLOCK_SIZE(ID) (m_app_table[(ID)->module_id].block_size) + +/**@brief Main state machine of the component. */ +typedef enum +{ + STATE_IDLE, /**< State for being idle (no command execution in progress). */ + STATE_STORE, /**< State for storing data when using store/update API. */ + STATE_DATA_ERASE_WITH_SWAP, /**< State for erasing the data page when using update/clear API when use of swap page is required. */ + STATE_DATA_ERASE, /**< State for erasing the data page when using update/clear API without the need to use the swap page. */ + STATE_ERROR /**< State entered when command processing is terminated abnormally. */ +} pstorage_state_t; + +/**@brief Sub state machine contained by @ref STATE_DATA_ERASE_WITH_SWAP super state machine. */ +typedef enum +{ + STATE_ERASE_SWAP, /**< State for erasing the swap page when using the update/clear API. */ + STATE_WRITE_DATA_TO_SWAP, /**< State for writing the data page into the swap page when using update/clear API. */ + STATE_ERASE_DATA_PAGE, /**< State for erasing data page when using update/clear API. */ + STATE_RESTORE_TAIL, /**< State for restoring tail (end) of backed up data from swap to data page when using update/clear API. */ + STATE_RESTORE_HEAD, /**< State for restoring head (beginning) of backed up data from swap to data page when using update/clear API. */ + SWAP_SUB_STATE_MAX /**< Enumeration upper bound. */ +} flash_swap_sub_state_t; + +/**@brief Application registration information. + * + * @details Defines application specific information that the application needs to maintain to be able + * to process requests from each one of them. + */ +typedef struct +{ + pstorage_ntf_cb_t cb; /**< Callback registered with the module to be notified of result of flash access. */ + pstorage_block_t base_id; /**< Base block ID assigned to the module. */ + pstorage_size_t block_size; /**< Size of block for the module. */ + pstorage_size_t block_count; /**< Number of blocks requested by the application. */ +} pstorage_module_table_t; + + +#ifdef PSTORAGE_RAW_MODE_ENABLE +/**@brief Application registration information. + * + * @details Defines application specific information that the application registered for raw mode. + */ +typedef struct +{ + pstorage_ntf_cb_t cb; /**< Callback registered with the module to be notified of the result of flash access. */ +} pstorage_raw_module_table_t; +#endif // PSTORAGE_RAW_MODE_ENABLE + + +/**@brief Defines command queue element. + * + * @details Defines command queue element. Each element encapsulates needed information to process + * a flash access command. + */ +typedef struct +{ + uint8_t op_code; /**< Identifies the flash access operation being queued. Element is free if op-code is INVALID_OPCODE. */ + pstorage_size_t size; /**< Identifies the size in bytes requested for the operation. */ + pstorage_size_t offset; /**< Offset requested by the application for the access operation. */ + pstorage_handle_t storage_addr; /**< Address/Identifier for persistent memory. */ + uint8_t * p_data_addr; /**< Address/Identifier for data memory. This is assumed to be resident memory. */ +} cmd_queue_element_t; + + +/**@brief Defines command queue, an element is free if the op_code field is not invalid. + * + * @details Defines commands enqueued for flash access. At any point in time, this queue has one or + * more flash access operations pending if the count field is not zero. When the queue is + * not empty, the rp (read pointer) field points to the flash access command in progress + * or, if none is in progress, the command to be requested next. The queue implements a + * simple first in first out algorithm. Data addresses are assumed to be resident. + */ +typedef struct +{ + uint8_t rp; /**< Read pointer, pointing to flash access that is ongoing or to be requested next. */ + uint8_t count; /**< Number of elements in the queue. */ + cmd_queue_element_t cmd[PSTORAGE_CMD_QUEUE_SIZE]; /**< Array to maintain flash access operation details. */ +} cmd_queue_t; + +static cmd_queue_t m_cmd_queue; /**< Flash operation request queue. */ +static pstorage_size_t m_next_app_instance; /**< Points to the application module instance that can be allocated next. */ +static uint32_t m_next_page_addr; /**< Points to the flash address that can be allocated to a module next. This is needed as blocks of a module that can span across flash pages. */ +static pstorage_state_t m_state; /**< Main state tracking variable. */ +static flash_swap_sub_state_t m_swap_sub_state; /**< Flash swap erase when swap used state tracking variable. */ +static uint32_t m_head_word_size; /**< Head restore area size in words. */ +static uint32_t m_tail_word_size; /**< Tail restore area size in words. */ +static uint32_t m_current_page_id; /**< Variable for tracking the flash page being processed. */ +static uint32_t m_num_of_command_retries; /**< Variable for tracking flash operation retries upon flash operation failures. */ +static pstorage_module_table_t m_app_table[PSTORAGE_NUM_OF_PAGES]; /**< Registered application information table. */ +static uint32_t m_num_of_bytes_written; /**< Variable for tracking the number of bytes written by the store operation. */ +static uint32_t m_app_data_size; /**< Variable for storing the application command size parameter internally. */ +static uint32_t m_flags = 0; /**< Storage for boolean flags for state tracking. */ + +#ifdef PSTORAGE_RAW_MODE_ENABLE +static pstorage_raw_module_table_t m_raw_app_table; /**< Registered application information table for raw mode. */ +#endif // PSTORAGE_RAW_MODE_ENABLE + +// Required forward declarations. +static void cmd_process(void); +static void store_operation_execute(void); +static void app_notify(uint32_t result, cmd_queue_element_t * p_elem); +static void cmd_queue_element_init(uint32_t index); +static void cmd_queue_dequeue(void); +static void sm_state_change(pstorage_state_t new_state); +static void swap_sub_state_state_change(flash_swap_sub_state_t new_state); + +/**@brief Function for consuming a command queue element. + * + * @details Function for consuming a command queue element, which has been fully processed. + */ +static void command_queue_element_consume(void) +{ + // Initialize/free the element as it is now processed. + cmd_queue_element_init(m_cmd_queue.rp); + + // Adjust command queue state tracking variables. + --(m_cmd_queue.count); + if (++(m_cmd_queue.rp) == PSTORAGE_CMD_QUEUE_SIZE) + { + m_cmd_queue.rp = 0; + } +} + + +/**@brief Function for executing the finalization procedure for the command executed. + * + * @details Function for executing the finalization procedure for command executed, which includes + * notifying the application of command completion, consuming the command queue element, + * and changing the internal state. + */ +static void command_end_procedure_run(void) +{ + app_notify(NRF_SUCCESS, &m_cmd_queue.cmd[m_cmd_queue.rp]); + + command_queue_element_consume(); + + sm_state_change(STATE_IDLE); +} + + +/**@brief Function for idle state entry actions. + * + * @details Function for idle state entry actions, which include resetting relevant state data and + * scheduling any possible queued flash access operation. + */ +static void state_idle_entry_run(void) +{ + m_num_of_command_retries = 0; + m_num_of_bytes_written = 0; + + // Schedule any possible queued flash access operation. + cmd_queue_dequeue(); +} + + +/**@brief Function for notifying an application of command completion and transitioning to an error + * state. + * + * @param[in] result Result code of the operation for the application. + */ +static void app_notify_error_state_transit(uint32_t result) +{ + app_notify(result, &m_cmd_queue.cmd[m_cmd_queue.rp]); + sm_state_change(STATE_ERROR); +} + + +/**@brief Function for processing flash API error code. + * + * @param[in] err_code Error code from the flash API. + */ +static void flash_api_err_code_process(uint32_t err_code) +{ + switch (err_code) + { + case NRF_SUCCESS: + break; + + case NRF_ERROR_BUSY: + // Flash access operation was not accepted and must be reissued upon flash operation + // complete event. + m_flags |= MASK_FLASH_API_ERR_BUSY; + break; + + default: + // Complete the operation with appropriate result code and transit to an error state. + app_notify_error_state_transit(err_code); + break; + } +} + +/**@brief Function for writing data to flash. + * + * @param[in] p_dst Pointer to start of flash location to be written. + * @param[in] p_src Pointer to buffer with data to be written. + * @param[in] size_in_words Number of 32-bit words to write. + */ +static void flash_write(uint32_t * const p_dst, + uint32_t const * const p_src, + uint32_t size_in_words) +{ + flash_api_err_code_process(sd_flash_write(p_dst, p_src, size_in_words)); +} + + +/**@brief Function for writing data to flash upon store command. + * + * @details Function for writing data to flash upon executing store command. Data is written to + * flash in reverse order, meaning starting at the end. If the data that is to be written + * is greater than the flash page size, it will be fragmented to fit the flash page size. + */ +static void store_cmd_flash_write_execute(void) +{ + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + + if (p_cmd->size > SOC_MAX_WRITE_SIZE) + { + const uint32_t offset = p_cmd->size - PSTORAGE_FLASH_PAGE_SIZE; + flash_write((uint32_t *)(p_cmd->storage_addr.block_id + p_cmd->offset + offset), + (uint32_t *)(p_cmd->p_data_addr + offset), + PSTORAGE_FLASH_PAGE_SIZE / sizeof(uint32_t)); + + m_num_of_bytes_written = PSTORAGE_FLASH_PAGE_SIZE; + } + else + { + flash_write((uint32_t *)(p_cmd->storage_addr.block_id + p_cmd->offset), + (uint32_t *)(p_cmd->p_data_addr), + p_cmd->size / sizeof(uint32_t)); + + m_num_of_bytes_written = p_cmd->size; + } +} + + +/**@brief Function for store state entry action. + * + * @details Function for store state entry action, which includes writing data to a flash page. + */ +static void state_store_entry_run(void) +{ + store_cmd_flash_write_execute(); +} + + +/**@brief Function for data erase with swap state entry actions. + * + * @details Function for data erase with swap state entry actions. This includes adjusting relevant + * state and data variables and transitioning to the correct sub state. + */ +static void state_data_erase_swap_entry_run(void) +{ + m_flags &= ~MASK_TAIL_SWAP_DONE; + + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + const pstorage_block_t cmd_block_id = p_cmd->storage_addr.block_id; + + const uint32_t clear_start_page_id = cmd_block_id / PSTORAGE_FLASH_PAGE_SIZE; + m_current_page_id = clear_start_page_id; + + // @note: No need to include p_cmd->offset when calculating clear_end_page_id as: + // - clear API does not include offset parameter + // - update and store APIs are limited to operate on single block boundary thus the boolean + // clause ((m_head_word_size == 0) && is_more_than_one_page) below in this function will never + // evaluate as true as if is_more_than_one_page == true m_head_word_size is always != 0 + const uint32_t clear_end_page_id = (cmd_block_id + p_cmd->size - 1u) / + PSTORAGE_FLASH_PAGE_SIZE; + + if (clear_start_page_id == clear_end_page_id) + { + m_flags |= MASK_SINGLE_PAGE_OPERATION; + } + else + { + m_flags &= ~MASK_SINGLE_PAGE_OPERATION; + } + + if ((m_head_word_size == 0) && !(m_flags & MASK_SINGLE_PAGE_OPERATION)) + { + // No head restore required and clear/update area is shared by multiple flash pages, which + // means the current flash page does not have any tail area to restore. You can proceed with + // data page erase directly as no swap is needed for the current flash page. + swap_sub_state_state_change(STATE_ERASE_DATA_PAGE); + } + else + { + swap_sub_state_state_change(STATE_ERASE_SWAP); + } +} + + +/**@brief Function for erasing flash page. + * + * @param[in] page_number Page number of the page to be erased. + */ +static void flash_page_erase(uint32_t page_number) +{ + flash_api_err_code_process(sd_flash_page_erase(page_number)); +} + + +/**@brief Function for data erase state entry action. + * + * @details Function for data erase state entry action, which includes erasing the data flash page. + */ +static void state_data_erase_entry_run(void) +{ + flash_page_erase(m_current_page_id); +} + + +/**@brief Function for dispatching the correct application main state entry action. + */ +static void state_entry_action_run(void) +{ + switch (m_state) + { + case STATE_IDLE: + state_idle_entry_run(); + break; + + case STATE_STORE: + state_store_entry_run(); + break; + + case STATE_DATA_ERASE_WITH_SWAP: + state_data_erase_swap_entry_run(); + break; + + case STATE_DATA_ERASE: + state_data_erase_entry_run(); + break; + + default: + // No action needed. + break; + } +} + + +/**@brief Function for changing application main state and dispatching state entry action. + * + * @param[in] new_state New application main state to transit to. + */ +static void sm_state_change(pstorage_state_t new_state) +{ + m_state = new_state; + state_entry_action_run(); +} + + +/**@brief Function for swap erase state entry action. + * + * @details Function for swap erase state entry action, which includes erasing swap flash + * page. + */ +static void state_swap_erase_entry_run(void) +{ + flash_page_erase(PSTORAGE_SWAP_ADDR / PSTORAGE_FLASH_PAGE_SIZE); +} + + +/**@brief Function for write data to the swap state entry action. + * + * @details Function for write data to the swap state entry action, which includes writing the + * current data page to the swap flash page. + */ +static void state_write_data_swap_entry_run(void) +{ + // @note: There is room for further optimization here as there is only need to write the + // whole flash page to swap area if there is both head and tail area to be restored. In any + // other case we can omit some data from the head or end of the page as that is the clear area. + flash_write((uint32_t *)(PSTORAGE_SWAP_ADDR), + (uint32_t *)(m_current_page_id * PSTORAGE_FLASH_PAGE_SIZE), + PSTORAGE_FLASH_PAGE_SIZE / sizeof(uint32_t)); +} + + +/**@brief Function for erase data page state entry action. + * + * @details Function for erase data page state entry action, which includes erasing the data flash + * page. + */ +static void state_erase_data_page_entry_run(void) +{ + flash_page_erase(m_current_page_id); +} + + +/**@brief Function for restore tail state entry action. + * + * @details Function for restore tail state entry action, which includes writing the tail section + * back from swap to the data page. + */ +static void state_restore_tail_entry_run(void) +{ + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + const pstorage_block_t cmd_block_id = p_cmd->storage_addr.block_id; + + const uint32_t tail_offset = (cmd_block_id + p_cmd->size + p_cmd->offset) % + PSTORAGE_FLASH_PAGE_SIZE; + + flash_write((uint32_t *)(cmd_block_id + p_cmd->size + p_cmd->offset), + (uint32_t *)(PSTORAGE_SWAP_ADDR + tail_offset), + m_tail_word_size); +} + + +/**@brief Function for restore head state entry action. + * + * @details Function for restore head state entry action, which includes writing the head section + * back from swap to the data page. + */ +static void state_restore_head_entry_run(void) +{ + flash_write((uint32_t *)((m_current_page_id - 1u) * PSTORAGE_FLASH_PAGE_SIZE), + (uint32_t *)PSTORAGE_SWAP_ADDR, + m_head_word_size); +} + + +/**@brief Function for dispatching the correct swap sub state entry action. + */ +static void swap_sub_state_entry_action_run(void) +{ + static void (* const swap_sub_state_sm_lut[SWAP_SUB_STATE_MAX])(void) = + { + state_swap_erase_entry_run, + state_write_data_swap_entry_run, + state_erase_data_page_entry_run, + state_restore_tail_entry_run, + state_restore_head_entry_run + }; + + swap_sub_state_sm_lut[m_swap_sub_state](); +} + + +/**@brief Function for changing the swap sub state and dispatching state entry action. + * + * @param[in] new_state New swap sub state to transit to. + */ +static void swap_sub_state_state_change(flash_swap_sub_state_t new_state) +{ + m_swap_sub_state = new_state; + swap_sub_state_entry_action_run(); +} + + +/**@brief Function for initializing the command queue element. + * + * @param[in] index Index of the element to be initialized. + */ +static void cmd_queue_element_init(uint32_t index) +{ + // Internal function and checks on range of index can be avoided. + m_cmd_queue.cmd[index].op_code = INVALID_OPCODE; + m_cmd_queue.cmd[index].size = 0; + m_cmd_queue.cmd[index].storage_addr.module_id = PSTORAGE_NUM_OF_PAGES; + m_cmd_queue.cmd[index].storage_addr.block_id = 0; + m_cmd_queue.cmd[index].p_data_addr = NULL; + m_cmd_queue.cmd[index].offset = 0; +} + + +/**@brief Function for initializing the command queue. + */ +static void cmd_queue_init(void) +{ + m_cmd_queue.rp = 0; + m_cmd_queue.count = 0; + + for (uint32_t cmd_index = 0; cmd_index < PSTORAGE_CMD_QUEUE_SIZE; ++cmd_index) + { + cmd_queue_element_init(cmd_index); + } +} + + +/**@brief Function for enqueuing, and possibly dispatching, a flash access operation. + * + * @param[in] opcode Identifies the operation requested to be enqueued. + * @param[in] p_storage_addr Identifies the module and flash address on which the operation is + * requested. + * @param[in] p_data_addr Identifies the data address for flash access. + * @param[in] size Size in bytes of data requested for the access operation. + * @param[in] offset Offset within the flash memory block at which operation is requested. + * + * @retval NRF_SUCCESS Upon success. + * @retval NRF_ERROR_NO_MEM Upon failure, when no space is available in the command queue. + */ +static uint32_t cmd_queue_enqueue(uint8_t opcode, + pstorage_handle_t * p_storage_addr, + uint8_t * p_data_addr, + pstorage_size_t size, + pstorage_size_t offset) +{ + uint32_t err_code; + + if (m_cmd_queue.count != PSTORAGE_CMD_QUEUE_SIZE) + { + // Enqueue the command if it the queue is not full. + uint32_t write_index = m_cmd_queue.rp + m_cmd_queue.count; + + if (write_index >= PSTORAGE_CMD_QUEUE_SIZE) + { + write_index -= PSTORAGE_CMD_QUEUE_SIZE; + } + + m_cmd_queue.cmd[write_index].op_code = opcode; + m_cmd_queue.cmd[write_index].p_data_addr = p_data_addr; + m_cmd_queue.cmd[write_index].storage_addr = (*p_storage_addr); + m_cmd_queue.cmd[write_index].size = size; + m_cmd_queue.cmd[write_index].offset = offset; + + m_cmd_queue.count++; + + if (m_state == STATE_IDLE) + { + cmd_process(); + } + + err_code = NRF_SUCCESS; + } + else + { + err_code = NRF_ERROR_NO_MEM; + } + + return err_code; +} + + +/**@brief Function for dequeing a possible pending flash access operation. + */ +static void cmd_queue_dequeue(void) +{ + if ((m_cmd_queue.count != 0)) + { + cmd_process(); + } +} + + +/**@brief Function for notifying an application of command completion. + * + * @param[in] result Result code of the operation for the application. + * @param[in] p_elem Pointer to the command queue element for which this result was received. + */ +static void app_notify(uint32_t result, cmd_queue_element_t * p_elem) +{ + pstorage_ntf_cb_t ntf_cb; + const uint8_t op_code = p_elem->op_code; + +#ifdef PSTORAGE_RAW_MODE_ENABLE + if (p_elem->storage_addr.module_id == RAW_MODE_APP_ID) + { + ntf_cb = m_raw_app_table.cb; + } + else +#endif // PSTORAGE_RAW_MODE_ENABLE + { + ntf_cb = m_app_table[p_elem->storage_addr.module_id].cb; + } + + ntf_cb(&p_elem->storage_addr, op_code, result, p_elem->p_data_addr, m_app_data_size); +} + + +/**@brief Function for evaluating if a data page swap is required for the tail section on the + * current page. + * + * @retval true If data page swap is required. + * @retval false If data page swap is not required. + */ +static bool is_tail_data_page_swap_required(void) +{ + bool ret_value; + + // Extract id of the last page command is executed upon. + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + const pstorage_block_t cmd_block_id = p_cmd->storage_addr.block_id; + const uint32_t last_page_id = (cmd_block_id + p_cmd->size + p_cmd->offset - 1u) / + PSTORAGE_FLASH_PAGE_SIZE; + + // If tail section area exists and the current page is the last page then tail data page swap is + // required. + if ((m_tail_word_size != 0) && (m_current_page_id == last_page_id)) + { + ret_value = true; + } + else + { + ret_value = false; + } + + return ret_value; +} + + +/**@brief Function for performing post processing for the update and clear commands. + * + * @details Function for performing post processing for the update and clear commands, which implies + * executing the correct execution path depending on the command. + */ +static void clear_post_processing_run(void) +{ + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + + if (p_cmd->op_code != PSTORAGE_UPDATE_OP_CODE) + { + command_end_procedure_run(); + } + else + { + store_operation_execute(); + } +} + + +/**@brief Function for doing swap sub state exit action. + */ +static void swap_sub_sm_exit_action_run(void) +{ + clear_post_processing_run(); +} + + +/**@brief Function for evaluating if the page erase operation is required for the current page. + * + * @retval true If page erase is required. + * @retval false If page erase is not required. + */ +static bool is_page_erase_required(void) +{ + bool ret; + + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + const pstorage_block_t cmd_block_id = p_cmd->storage_addr.block_id; + const uint32_t id_last_page_to_be_cleared = (cmd_block_id + p_cmd->size + + p_cmd->offset - 1u) / + PSTORAGE_FLASH_PAGE_SIZE; + + // True if: + // - current page is not the last page OR + // - current page is the last page AND no tail exists + if ((m_current_page_id < id_last_page_to_be_cleared) || + ((m_current_page_id == id_last_page_to_be_cleared) && (m_tail_word_size == 0))) + { + ret = true; + } + else + { + ret = false; + } + + return ret; +} + + +/**@brief Function for reissuing the last flash operation request, which was rejected by the flash + * API, in swap sub sate. + */ +static void swap_sub_state_err_busy_process(void) +{ + // Reissue the request by doing a self transition to the current state. + m_flags &= ~MASK_FLASH_API_ERR_BUSY; + swap_sub_state_state_change(m_swap_sub_state); +} + + +/**@brief Function for doing restore head state action upon flash operation success event. + * + * @details Function for doing restore head state action upon flash operation success event, which + * includes making a state transition depending on the current state. + */ +static void head_restore_state_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + if (is_tail_data_page_swap_required()) + { + // Additional data page needs to be swapped for tail section as we are clearing a block, + // which is shared between 2 flash pages. + + // Adjust variables to ensure correct state transition path is taken after the tail + // section swap has completed. + m_head_word_size = 0; + m_flags |= MASK_TAIL_SWAP_DONE; + + swap_sub_state_state_change(STATE_ERASE_SWAP); + } + else if (is_page_erase_required()) + { + // Additional page erase operation is required. + + // Adjust variable to ensure correct state transition path is taken after the additional + // page erase operation has completed. + m_head_word_size = 0; + swap_sub_state_state_change(STATE_ERASE_DATA_PAGE); + } + else if (m_tail_word_size != 0) + { + // Proceed with restoring tail from swap to data page. + swap_sub_state_state_change(STATE_RESTORE_TAIL); + } + else + { + // Swap statemachine execution end reached. + swap_sub_sm_exit_action_run(); + } + } + else + { + // As operation request was rejected by the flash API reissue the request. + swap_sub_state_err_busy_process(); + } +} + + +/**@brief Function for doing restore tail state action upon flash operation success event. + */ +static void tail_restore_state_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + swap_sub_sm_exit_action_run(); + } + else + { + // As operation request was rejected by the flash API reissue the request. + swap_sub_state_err_busy_process(); + } +} + + +/**@brief Function for doing data page erase state action upon a flash operation success event. + * + * @details Function for doing data page erase state action upon a flash operation success event, + * which includes making a state transit to a new state depending on the current state. + */ +static void data_page_erase_state_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + ++m_current_page_id; + + if (m_head_word_size != 0) + { + swap_sub_state_state_change(STATE_RESTORE_HEAD); + } + else if (is_page_erase_required()) + { + // Additional page erase operation is required. + swap_sub_state_state_change(STATE_ERASE_DATA_PAGE); + } + else if (m_tail_word_size != 0) + { + if (!(m_flags & MASK_TAIL_SWAP_DONE)) + { + // Tail area restore is required and we have not yet written the relevant data page + // to swap area. Start the process of writing the data page to swap. + m_flags |= MASK_TAIL_SWAP_DONE; + + swap_sub_state_state_change(STATE_ERASE_SWAP); + } + else + { + // Tail area restore is required and we have already written the relevant data page + // to swap area. Proceed by restoring the tail area. + swap_sub_state_state_change(STATE_RESTORE_TAIL); + } + } + else + { + swap_sub_sm_exit_action_run(); + } + } + else + { + // As operation request was rejected by the flash API reissue the request. + swap_sub_state_err_busy_process(); + } +} + + +/**@brief Function for doing data to swap write state action upon flash operation success event. + */ +static void data_to_swap_write_state_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + // If the operation is executed only on 1 single flash page it automatically means that tail + // area is written to the swap, which we store to flags. + if (m_flags & MASK_SINGLE_PAGE_OPERATION) + { + m_flags |= MASK_TAIL_SWAP_DONE; + } + + swap_sub_state_state_change(STATE_ERASE_DATA_PAGE); + } + else + { + // As operation request was rejected by the flash API reissue the request. + swap_sub_state_err_busy_process(); + } +} + + +/**@brief Function for doing swap erase state action upon flash operation success event. + */ +static void swap_erase_state_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + swap_sub_state_state_change(STATE_WRITE_DATA_TO_SWAP); + } + else + { + // As operation request was rejected by the flash API reissue the request. + swap_sub_state_err_busy_process(); + } +} + + +/**@brief Function for dispatching the correct state action for data erase with a swap composite +* state upon a flash operation success event. + */ +static void swap_sub_state_sm_run(void) +{ + static void (* const swap_sub_state_sm_lut[SWAP_SUB_STATE_MAX])(void) = + { + swap_erase_state_run, + data_to_swap_write_state_run, + data_page_erase_state_run, + tail_restore_state_run, + head_restore_state_run + }; + + swap_sub_state_sm_lut[m_swap_sub_state](); +} + + +/**@brief Function for reissuing the last flash operation request, which was rejected by the flash + * API, in main sate. + */ +static void main_state_err_busy_process(void) +{ + // Reissue the request by doing a self transition to the current state. + m_flags &= ~MASK_FLASH_API_ERR_BUSY; + sm_state_change(m_state); +} + + +/**@brief Function for doing erase state action upon flash operation success event. + * + * @details Function for doing erase state action upon flash operation success event, which includes + * making a state transition depending on the current state. + */ +static void erase_sub_state_sm_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + // Clear operation request has succeeded. + ++m_current_page_id; + + if (!is_page_erase_required()) + { + clear_post_processing_run(); + } + else + { + // All required flash pages have not yet been erased, issue erase by doing a self + // transit. + sm_state_change(m_state); + } + } + else + { + // As operation request was rejected by the flash API reissue the request. + main_state_err_busy_process(); + } +} + + +/**@brief Function for doing store state action upon flash operation success event. + */ +static void store_sub_state_sm_run(void) +{ + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + // As write operation request has succeeded, adjust the size tracking state information + // accordingly. + cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + p_cmd->size -= m_num_of_bytes_written; + + if (p_cmd->size == 0) + { + command_end_procedure_run(); + } + else + { + store_cmd_flash_write_execute(); + } + } + else + { + // As operation request was rejected by the flash API reissue the request. + main_state_err_busy_process(); + } +} + + +/**@brief Function for doing action upon flash operation success event. + */ +static void flash_operation_success_run(void) +{ + switch (m_state) + { + case STATE_STORE: + store_sub_state_sm_run(); + break; + + case STATE_DATA_ERASE: + erase_sub_state_sm_run(); + break; + + case STATE_DATA_ERASE_WITH_SWAP: + swap_sub_state_sm_run(); + break; + + default: + // No implementation needed. + break; + } +} + + +/**@brief Function for doing action upon flash operation failure event. + * + * @details Function for doing action upon flash operation failure event, which includes retrying + * the last operation or if retry count has been reached completing the operation with + * appropriate result code and transitioning to an error state. + * + * @note The command is not removed from the command queue, which will result to stalling of the + * command pipeline and the appropriate application recovery procedure for this is to reset + * the system by issuing @ref pstorage_init which will also result to flushing of the + * command queue. + */ +static void flash_operation_failure_run(void) +{ + if (++m_num_of_command_retries != SD_CMD_MAX_TRIES) + { + // Retry the last operation by doing a self transition to the current state. + + if (m_state != STATE_DATA_ERASE_WITH_SWAP) + { + sm_state_change(m_state); + } + else + { + swap_sub_state_state_change(m_swap_sub_state); + } + } + else + { + // Complete the operation with appropriate result code and transit to an error state. + app_notify_error_state_transit(NRF_ERROR_TIMEOUT); + } +} + +/**@brief Function for handling flash access result events. + * + * @param[in] evt System event to be handled. + * @param[in] p_context Parameter to pass to the handler. + */ +void pstorage_sys_event_handler(uint32_t sys_evt, void * p_context) +{ + if (m_state != STATE_IDLE && m_state != STATE_ERROR) + { + switch (sys_evt) + { + case NRF_EVT_FLASH_OPERATION_SUCCESS: + flash_operation_success_run(); + break; + + case NRF_EVT_FLASH_OPERATION_ERROR: + if (!(m_flags & MASK_FLASH_API_ERR_BUSY)) + { + flash_operation_failure_run(); + } + else + { + // As our last flash operation request was rejected by the flash API reissue the + // request by doing same code execution path as for flash operation sucess + // event. This will promote code reuse in the implementation. + flash_operation_success_run(); + } + break; + + default: + // No implementation needed. + break; + } + + } +} + +NRF_SDH_SOC_OBSERVER(m_soc_evt_observer, 0, pstorage_sys_event_handler, NULL); + +/**@brief Function for calculating the tail area size in number of 32-bit words. + * + * @param[in] cmd_end_of_storage_address End of storage area within the scope of the command. + * @param[in] end_of_storage_address End of allocated storage area for the application. + */ +static void tail_word_size_calculate(pstorage_size_t cmd_end_of_storage_address, + pstorage_size_t end_of_storage_address) +{ + // Two different cases to resolve when calculating correct size for restore tail section: + // 1) End of storage area and command end area are in the same page. + // 2) End of storage area and command end area are not in the same page. + + const uint32_t end_of_storage_area_page = end_of_storage_address / + PSTORAGE_FLASH_PAGE_SIZE; + const uint32_t command_end_of_storage_area_page = cmd_end_of_storage_address / + PSTORAGE_FLASH_PAGE_SIZE; + + if (end_of_storage_area_page == command_end_of_storage_area_page) + { + //lint -e{573} suppress "Signed-unsigned mix with divide". + m_tail_word_size = (end_of_storage_address - cmd_end_of_storage_address) / sizeof(uint32_t); + } + else + { + //lint -e{573} suppress "Signed-unsigned mix with divide". + m_tail_word_size = (PSTORAGE_FLASH_PAGE_SIZE - + (cmd_end_of_storage_address % PSTORAGE_FLASH_PAGE_SIZE)) / + sizeof(uint32_t); + } +} + + +/**@brief Function for executing the clear operation. + */ +static void clear_operation_execute(void) +{ + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + const pstorage_block_t cmd_block_id = p_cmd->storage_addr.block_id; + + const pstorage_size_t block_size = m_app_table[p_cmd->storage_addr.module_id].block_size; + const pstorage_size_t block_count = m_app_table[p_cmd->storage_addr.module_id].block_count; + const pstorage_block_t block_base_id = m_app_table[p_cmd->storage_addr.module_id].base_id; + + const bool is_start_address_page_aligned = (cmd_block_id % PSTORAGE_FLASH_PAGE_SIZE) == 0; + + // Calculate the end (1 beyond allocated area) for complete storage area and to the area only + // within scope of this command. + const pstorage_block_t end_of_storage_address = block_base_id + (block_size * block_count); + const pstorage_block_t cmd_end_of_storage_address = cmd_block_id + p_cmd->size + p_cmd->offset; + + // Zero tail to make sure no extra erase is done erroneously. + m_tail_word_size = 0; + + // If the following is true no swap access is needed: + // - 1st logical test covers the case of: clear/update 1 complete single page. + // - 2nd logical test covers the case of: + // 1) Clear/update last allocated page and page is not full (page can't be shared between + // multiple clients so the end of the page is unused area). + // 2) Clear/update all allocated storage. + if ((is_start_address_page_aligned && (p_cmd->size == PSTORAGE_FLASH_PAGE_SIZE)) || + (is_start_address_page_aligned && (cmd_end_of_storage_address == end_of_storage_address) && + (p_cmd->offset == 0)) || (p_cmd->storage_addr.module_id == RAW_MODE_APP_ID)) + { + // Nothing to put to the swap and we can just erase the pages(s). + + m_current_page_id = cmd_block_id / PSTORAGE_FLASH_PAGE_SIZE; + + sm_state_change(STATE_DATA_ERASE); + } + else + { + // Not all the blocks for the module can be cleared, we need to use swap page for storing + // data temporarily. + + m_head_word_size = ((cmd_block_id + p_cmd->offset) % PSTORAGE_FLASH_PAGE_SIZE) / + sizeof(uint32_t); + + const bool is_cmd_end_address_page_aligned = ((cmd_end_of_storage_address % + PSTORAGE_FLASH_PAGE_SIZE) == 0); + if ((cmd_end_of_storage_address != end_of_storage_address) && + !is_cmd_end_address_page_aligned) + { + // When command area is not equal to end of the storage allocation area and not ending + // to page boundary there is a need to restore the tail area. + tail_word_size_calculate(cmd_end_of_storage_address, end_of_storage_address); + } + + sm_state_change(STATE_DATA_ERASE_WITH_SWAP); + } +} + + +/**@brief Function for executing the store operation. + */ +static void store_operation_execute(void) +{ + sm_state_change(STATE_STORE); +} + + +/**@brief Function for executing the update operation. + */ +static void update_operation_execute(void) +{ + clear_operation_execute(); +} + + +/**@brief Function for dispatching the flash access operation. + */ +static void cmd_process(void) +{ + const cmd_queue_element_t * p_cmd = &m_cmd_queue.cmd[m_cmd_queue.rp]; + m_app_data_size = p_cmd->size; + + switch (p_cmd->op_code) + { + case PSTORAGE_STORE_OP_CODE: + store_operation_execute(); + break; + + case PSTORAGE_CLEAR_OP_CODE: + clear_operation_execute(); + break; + + case PSTORAGE_UPDATE_OP_CODE: + update_operation_execute(); + break; + + default: + // No action required. + break; + } +} + + +uint32_t pstorage_init(void) +{ + cmd_queue_init(); + + m_next_app_instance = 0; + m_next_page_addr = PSTORAGE_DATA_START_ADDR; + m_current_page_id = 0; + + for (uint32_t index = 0; index < PSTORAGE_NUM_OF_PAGES; index++) + { + m_app_table[index].cb = NULL; + m_app_table[index].block_size = 0; + m_app_table[index].block_count = 0; + } + +#ifdef PSTORAGE_RAW_MODE_ENABLE + m_raw_app_table.cb = NULL; +#endif //PSTORAGE_RAW_MODE_ENABLE + + m_state = STATE_IDLE; + m_num_of_command_retries = 0; + m_flags = 0; + m_num_of_bytes_written = 0; + m_flags |= MASK_MODULE_INITIALIZED; + + return NRF_SUCCESS; +} + + +uint32_t pstorage_register(pstorage_module_param_t * p_module_param, + pstorage_handle_t * p_block_id) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_module_param); + NULL_PARAM_CHECK(p_block_id); + NULL_PARAM_CHECK(p_module_param->cb); + BLOCK_SIZE_CHECK(p_module_param->block_size); + BLOCK_COUNT_CHECK(p_module_param->block_count, p_module_param->block_size); + + if (!((p_module_param->block_size % sizeof(uint32_t)) == 0)) + { + return NRF_ERROR_INVALID_PARAM; + } + + if (m_next_app_instance == PSTORAGE_NUM_OF_PAGES) + { + return NRF_ERROR_NO_MEM; + } + + p_block_id->module_id = m_next_app_instance; + p_block_id->block_id = m_next_page_addr; + + m_app_table[m_next_app_instance].base_id = p_block_id->block_id; + m_app_table[m_next_app_instance].cb = p_module_param->cb; + m_app_table[m_next_app_instance].block_size = p_module_param->block_size; + m_app_table[m_next_app_instance].block_count = p_module_param->block_count; + + // Calculate number of flash pages allocated for the device and adjust next free page address. + /*lint -save -e666 */ + const uint32_t page_count = CEIL_DIV((p_module_param->block_size * p_module_param->block_count), + PSTORAGE_FLASH_PAGE_SIZE); + /*lint -restore */ + m_next_page_addr += page_count * PSTORAGE_FLASH_PAGE_SIZE; + + ++m_next_app_instance; + + return NRF_SUCCESS; +} + + +uint32_t pstorage_block_identifier_get(pstorage_handle_t * p_base_id, + pstorage_size_t block_num, + pstorage_handle_t * p_block_id) +{ + pstorage_handle_t temp_id; + + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_base_id); + NULL_PARAM_CHECK(p_block_id); + MODULE_ID_RANGE_CHECK(p_base_id); + + temp_id = (*p_base_id); + temp_id.block_id += (block_num * MODULE_BLOCK_SIZE(p_base_id)); + + BLOCK_ID_RANGE_CHECK(&temp_id); + + (*p_block_id) = temp_id; + + return NRF_SUCCESS; +} + + +uint32_t pstorage_store(pstorage_handle_t * p_dest, + uint8_t * p_src, + pstorage_size_t size, + pstorage_size_t offset) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_src); + NULL_PARAM_CHECK(p_dest); + MODULE_ID_RANGE_CHECK(p_dest); + BLOCK_ID_RANGE_CHECK(p_dest); + SIZE_CHECK(p_dest, size); + OFFSET_CHECK(p_dest, offset, size); + + if ((!is_word_aligned(p_src)) || + (!is_word_aligned((void *)(uint32_t)offset)) || + (!is_word_aligned((uint32_t *)p_dest->block_id))) + { + return NRF_ERROR_INVALID_ADDR; + } + + return cmd_queue_enqueue(PSTORAGE_STORE_OP_CODE, p_dest, p_src, size, offset); +} + + +uint32_t pstorage_update(pstorage_handle_t * p_dest, + uint8_t * p_src, + pstorage_size_t size, + pstorage_size_t offset) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_src); + NULL_PARAM_CHECK(p_dest); + MODULE_ID_RANGE_CHECK(p_dest); + BLOCK_ID_RANGE_CHECK(p_dest); + SIZE_CHECK(p_dest, size); + OFFSET_CHECK(p_dest, offset, size); + + if ((!is_word_aligned(p_src)) || + (!is_word_aligned((void *)(uint32_t)offset)) || + (!is_word_aligned((uint32_t *)p_dest->block_id))) + { + return NRF_ERROR_INVALID_ADDR; + } + + return cmd_queue_enqueue(PSTORAGE_UPDATE_OP_CODE, p_dest, p_src, size, offset); +} + + +uint32_t pstorage_load(uint8_t * p_dest, + pstorage_handle_t * p_src, + pstorage_size_t size, + pstorage_size_t offset) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_src); + NULL_PARAM_CHECK(p_dest); + MODULE_ID_RANGE_CHECK(p_src); + BLOCK_ID_RANGE_CHECK(p_src); + SIZE_CHECK(p_src, size); + OFFSET_CHECK(p_src, offset, size); + + if ((!is_word_aligned(p_dest)) || + (!is_word_aligned((void *)(uint32_t)offset)) || + (!is_word_aligned((uint32_t *)p_src->block_id))) + { + return NRF_ERROR_INVALID_ADDR; + } + + memcpy(p_dest, (((uint8_t *)p_src->block_id) + offset), size); + + m_app_table[p_src->module_id].cb(p_src, PSTORAGE_LOAD_OP_CODE, NRF_SUCCESS, p_dest, size); + + return NRF_SUCCESS; +} + + +uint32_t pstorage_clear(pstorage_handle_t * p_dest, pstorage_size_t size) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_dest); + MODULE_ID_RANGE_CHECK(p_dest); + BLOCK_ID_RANGE_CHECK(p_dest); + + if ((!is_word_aligned((uint32_t *)p_dest->block_id))) + { + return NRF_ERROR_INVALID_ADDR; + } + + // Check is the area starting from block_id multiple of block_size. + if ( + !( + ((p_dest->block_id - m_app_table[p_dest->module_id].base_id) % + m_app_table[p_dest->module_id].block_size) == 0 + ) + ) + { + return NRF_ERROR_INVALID_PARAM; + } + + // Check is requested size multiple of registered block size or 0. + if (((size % m_app_table[p_dest->module_id].block_size) != 0) || (size == 0)) + { + return NRF_ERROR_INVALID_PARAM; + } + + const uint32_t registered_allocation_size = m_app_table[p_dest->module_id].block_size * + m_app_table[p_dest->module_id].block_count; + + const pstorage_block_t clear_request_end_address = p_dest->block_id + size; + const pstorage_block_t allocation_end_address = m_app_table[p_dest->module_id].base_id + + registered_allocation_size; + // Check if request would lead to a buffer overrun. + if (clear_request_end_address > allocation_end_address) + { + return NRF_ERROR_INVALID_PARAM; + } + + return cmd_queue_enqueue(PSTORAGE_CLEAR_OP_CODE, p_dest, NULL, size, 0); +} + + +uint32_t pstorage_access_status_get(uint32_t * p_count) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_count); + + (*p_count) = m_cmd_queue.count; + + return NRF_SUCCESS; +} + +#ifdef PSTORAGE_RAW_MODE_ENABLE + +uint32_t pstorage_raw_register(pstorage_module_param_t * p_module_param, + pstorage_handle_t * p_block_id) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_module_param); + NULL_PARAM_CHECK(p_block_id); + NULL_PARAM_CHECK(p_module_param->cb); + + if (m_raw_app_table.cb != NULL) + { + return NRF_ERROR_NO_MEM; + } + + p_block_id->module_id = RAW_MODE_APP_ID; + m_raw_app_table.cb = p_module_param->cb; + + return NRF_SUCCESS; +} + + +uint32_t pstorage_raw_store(pstorage_handle_t * p_dest, + uint8_t * p_src, + pstorage_size_t size, + pstorage_size_t offset) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_src); + NULL_PARAM_CHECK(p_dest); + MODULE_RAW_HANDLE_CHECK(p_dest); + + if (size == 0) + { + return NRF_ERROR_INVALID_PARAM; + } + + // Verify word alignment. + if ((!is_word_aligned(p_src)) || + (!is_word_aligned((void *)(uint32_t)size)) || + (!is_word_aligned((void *)(uint32_t)offset)) || + (!is_word_aligned((void *)(p_dest->block_id)))) + { + return NRF_ERROR_INVALID_ADDR; + } + + return cmd_queue_enqueue(PSTORAGE_STORE_OP_CODE, p_dest, p_src, size, offset); +} + + +uint32_t pstorage_raw_clear(pstorage_handle_t * p_dest, pstorage_size_t size) +{ + VERIFY_MODULE_INITIALIZED(); + NULL_PARAM_CHECK(p_dest); + MODULE_RAW_HANDLE_CHECK(p_dest); + + if ((!is_word_aligned((uint32_t *)p_dest->block_id))) + { + return NRF_ERROR_INVALID_ADDR; + } + + return cmd_queue_enqueue(PSTORAGE_CLEAR_OP_CODE, p_dest, NULL, size, 0); +} + +#endif // PSTORAGE_RAW_MODE_ENABLE diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pstorage.h b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pstorage.h new file mode 100644 index 0000000..2380460 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/pstorage.h @@ -0,0 +1,418 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup persistent_storage Persistent Storage Interface + * @{ + * @ingroup app_common + * @brief Abstracted flash interface. + * + * @details An abstracted interface is provided by the module to easily port the application and + * SDK modules to an alternate option. This ensures that the SDK and application are moved + * to alternate persistent storage instead of the one provided by default. + */ + +#ifndef PSTORAGE_H__ +#define PSTORAGE_H__ + +#include "pstorage_platform.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@defgroup ps_opcode Persistent Storage Access Operation Codes + * @{ + * @brief Persistent Storage Access Operation Codes. + * + * @details Persistent Storage Access Operation Codes are used by Persistent storage operation + * completion callback @ref pstorage_ntf_cb_t to identify the operation type requested by + * the application. + */ +#define PSTORAGE_STORE_OP_CODE 0x01 /**< Store Operation type. */ +#define PSTORAGE_LOAD_OP_CODE 0x02 /**< Load Operation type. */ +#define PSTORAGE_CLEAR_OP_CODE 0x03 /**< Clear Operation type. */ +#define PSTORAGE_UPDATE_OP_CODE 0x04 /**< Update Operation type. */ + +/**@} */ + +/**@defgroup pstorage_data_types Persistent Memory Interface Data Types + * @{ + * @brief Data Types needed for interfacing with persistent memory. + * + * @details Data Types needed for interfacing with persistent memory. + */ + +/**@brief Persistent storage operation completion callback function type. + * + * @details The persistent storage operation completion callback is used by the interface to report + * success or failure of a flash operation. Since data is not copied for a store operation, + * a callback is an indication that the resident memory can now be reused or freed. + * + * @param[in] handle Identifies the module and block for the callback that is received. + * @param[in] op_code Identifies the operation for the event that is notified. + * @param[in] result Identifies the result of a flash access operation. NRF_SUCCESS implies + * operation succeeded. + * + * @note Unmanaged (abnormal behaviour) error codes from the SoftDevice flash + * access API are forwarded as is and are expected to be handled by the + * application. For details refer to the implementation file and corresponding + * SoftDevice flash API documentation. + * + * @param[in] p_data Identifies the application data pointer. For a store operation, this points + * to the resident source of application memory that the application can now + * free or reuse. When there is a clear operation, this is NULL since no + * application pointer is needed for this operation. + * @param[in] data_len Length data the application provided for the operation. + */ +typedef void (*pstorage_ntf_cb_t)(pstorage_handle_t * p_handle, + uint8_t op_code, + uint32_t result, + uint8_t * p_data, + uint32_t data_len); + +/**@brief Struct containing module registration context. */ +typedef struct +{ + pstorage_ntf_cb_t cb; /**< Persistent storage operation completion callback function @ref pstorage_ntf_cb_t. */ + pstorage_size_t block_size; /**< Desired block size for persistent memory storage. For example, if a module has a table with 10 entries, and each entry is 64 bytes in size, + * it can request 10 blocks with a block size of 64 bytes. The module can also request one block that is 640 bytes depending + * on how it would like to access or alter the memory in persistent memory. + * The first option is preferred when it is a single entry that needs to be updated often and doesn't impact the other entries. + * The second option is preferred when table entries are not changed individually but have a common point of loading and storing + * data. */ + pstorage_size_t block_count; /** Number of blocks requested by the module; minimum values is 1. */ +} pstorage_module_param_t; + +/**@} */ + +/**@defgroup pstorage_routines Persistent Storage Access Routines + * @{ + * @brief Functions/Interface SDK modules used to persistently store data. + * + * @details Interface for the Application and SDK modules to load/store information persistently. + * Note: While implementation of each of the persistent storage access functions + * depends on the system and is specific to system/solution, the signature of the + * interface routines should not be altered. + */ + +/**@brief Function for initializing the module. + * + * @details Function for initializing the module. This function is called once before any other APIs + * of the module are used. + * + * @retval NRF_SUCCESS Operation success. + */ +uint32_t pstorage_init(void); + +/**@brief Function for registering with persistent storage interface. + * + * @param[in] p_module_param Module registration parameter. + * @param[out] p_block_id Block identifier to identify persistent memory blocks when + * registration succeeds. Application is expected to use the block IDs + * for subsequent operations on requested persistent memory. Maximum + * registrations permitted is determined by the configuration of the + * parameter PSTORAGE_NUM_OF_PAGES. If more than one memory block is + * requested, the identifier provided here is the base identifier for the + * first block and used to identify the subsequent block. The application + * uses \@ref pstorage_block_identifier_get with this base identifier and + * block number. Therefore if 10 blocks of size 64 are requested and the + * application wishes to store memory in the 6th block, it shall use + * \@ref pstorage_block_identifier_get with the base ID and provide a + * block number of 5. This way the application is only expected to + * remember the base block identifier. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_NO_MEM Operation failure. Additional registrations can't be + * supported. + */ +uint32_t pstorage_register(pstorage_module_param_t * p_module_param, + pstorage_handle_t * p_block_id); + +/**@brief Function for getting block ID with reference to base block identifier provided at the time + * of registration. + * + * @details Function to get the block ID with reference to base block identifier provided at the + * time of registration. + * If more than one memory block was requested when registering, the identifier provided + * here is the base identifier for the first block which is used to identify subsequent + * blocks. The application shall use this routine to get the block identifier, providing + * input as base identifier and block number. Therefore, if 10 blocks of size 64 are + * requested and the application wishes to store memory in the 6th block, it shall use + * \@ref pstorage_block_identifier_get with the base ID and provide a block number of 5. + * This way the application is only expected to remember the base block identifier. + * + * @param[in] p_base_id Base block ID received at the time of registration. + * @param[in] block_num Block Number, with first block numbered zero. + * @param[out] p_block_id Block identifier for the block number requested when the API succeeds. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + */ +uint32_t pstorage_block_identifier_get(pstorage_handle_t * p_base_id, + pstorage_size_t block_num, + pstorage_handle_t * p_block_id); + +/**@brief Function for persistently storing data of length 'size' contained in the 'p_src' address + * in the storage module at 'p_dest' address. Equivalent to Storage Write. + * + * @param[in] p_dest Destination address where data is to be stored persistently. + * @param[in] p_src Source address containing data to be stored. API assumes this to be resident + * memory and no intermediate copy of data is made by the API. Must be word + * aligned. + * @param[in] size Size of data to be stored expressed in bytes. Must be word aligned and size + + * offset must be <= block size. + * @param[in] offset Offset in bytes to be applied when writing to the block. + * For example, if within a block of 100 bytes, the application wishes to + * write 20 bytes at an offset of 12, then this field should be set to 12. + * Must be word aligned. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + * + * @warning No copy of the data is made, meaning memory provided for the data source that is to + * be written to flash cannot be freed or reused by the application until this procedure + * is complete. The application is notified when the procedure is finished using the + * notification callback registered by the application. + */ +uint32_t pstorage_store(pstorage_handle_t * p_dest, + uint8_t * p_src, + pstorage_size_t size, + pstorage_size_t offset); + +/**@brief Function for updating persistently stored data of length 'size' contained in the 'p_src' + * address in the storage module at 'p_dest' address. + * + * @param[in] p_dest Destination address where data is to be updated. + * @param[in] p_src Source address containing data to be stored. API assumes this to be resident + * memory and no intermediate copy of data is made by the API. + * @param[in] size Size of data to be stored expressed in bytes. Must be word aligned and size + + * offset must be <= block size. + * @param[in] offset Offset in bytes to be applied when writing to the block. + * For example, if within a block of 100 bytes, the application wishes to + * write 20 bytes at an offset of 12 bytes, then this field should be set to 12. + * Must be word aligned. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + * + * @warning No copy of the data is made, meaning memory provided for the data source that is to + * be written to flash cannot be freed or reused by the application until this procedure + * is complete. The application is notified when the procedure is finished using the + * notification callback registered by the application. + */ +uint32_t pstorage_update(pstorage_handle_t * p_dest, + uint8_t * p_src, + pstorage_size_t size, + pstorage_size_t offset); + +/**@brief Function for loading persistently stored data of length 'size' from 'p_src' address + * to 'p_dest' address. Equivalent to Storage Read. + * + * @param[in] p_dest Destination address where persistently stored data is to be loaded. + * @param[in] p_src Source where data is loaded from persistent memory. + * @param[in] size Size of data to be loaded from persistent memory expressed in bytes. + * Should be word aligned. + * @param[in] offset Offset in bytes, to be applied when loading from the block. + * For example, if within a block of 100 bytes, the application wishes to + * load 20 bytes from offset of 12 bytes, then this field should be set to 12. + * Should be word aligned. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + */ +uint32_t pstorage_load(uint8_t * p_dest, + pstorage_handle_t * p_src, + pstorage_size_t size, + pstorage_size_t offset); + +/**@brief Function for clearing data in persistent memory. + * + * @param[in] p_base_id Base block identifier in persistent memory that needs to be cleared; + * equivalent to an Erase Operation. + * @param[in] size Size of data to be cleared from persistent memory expressed in bytes. + * This parameter is to provision for clearing of certain blocks + * of memory, or all memory blocks in a registered module. If the total size + * of the application module is used (blocks * block size) in combination with + * the identifier for the first block in the module, all blocks in the + * module will be erased. Must be multiple of block size. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + * + * @note Clear operations may take time. This API however, does not block until the clear + * procedure is complete. The application is notified of procedure completion using + * a notification callback registered by the application. The 'result' parameter of the + * callback indicates if the procedure was successful or not. + */ +uint32_t pstorage_clear(pstorage_handle_t * p_base_id, pstorage_size_t size); + +/**@brief Function for getting the number of pending operations with the module. + * + * @param[out] p_count Number of storage operations pending with the module. If 0, there are no + * outstanding requests. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + */ +uint32_t pstorage_access_status_get(uint32_t * p_count); + +#ifdef PSTORAGE_RAW_MODE_ENABLE + +/**@brief Function for registering with the persistent storage interface. + * + * @param[in] p_module_param Module registration parameter. + * @param[out] p_block_id Block identifier used to identify persistent memory blocks upon + * successful registration. The application is expected to use the block + * IDs for subsequent operations on requested persistent memory. When + * more than one memory block is requested, this identifier is the base + * identifier for the first block and used to identify subsequent blocks. + * The application shall use \@ref pstorage_block_identifier_get with + * this base identifier and block number. Therefore if 10 blocks of size + * 64 are requested and the application wishes to store memory in the 6th + * block, it shall use \@ref pstorage_block_identifier_get with the base + * ID and provide a block number of 5. Therefore, the application is only + * expected to remember the base block identifier. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + */ +uint32_t pstorage_raw_register(pstorage_module_param_t * p_module_param, + pstorage_handle_t * p_block_id); + +/**@brief Function for persistently storing data of length 'size' contained in 'p_src' address in + * storage module at 'p_dest' address. Equivalent to Storage Write. + * + * @param[in] p_dest Destination address where data is to be stored persistently. + * @param[in] p_src Source address containing data to be stored. The API assumes this is resident + * memory and no intermediate copy of data is made by the API. Must be word + * aligned. + * @param[in] size Size of data to be stored expressed in bytes. Must be word aligned. + * @param[in] offset Offset in bytes to be applied when writing to the block. + * For example, if within a block of 100 bytes, the application wishes to + * write 20 bytes at an offset of 12 bytes, this field should be set to 12. + * Must be word aligned. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + * + * @warning No copy of the data is made, meaning memory provided for data source that is to be + * written to flash cannot be freed or reused by the application until this procedure + * is complete. The application is notified when the procedure is finished using the + * notification callback registered by the application. + */ +uint32_t pstorage_raw_store(pstorage_handle_t * p_dest, + uint8_t * p_src, + pstorage_size_t size, + pstorage_size_t offset); + +/**@brief Function for clearing data in persistent memory in raw mode. + * + * @param[in] p_dest Base block identifier in persistent memory that needs to be cleared. + * Equivalent to an Erase Operation. + * @param[in] size Size of data to be cleared from persistent memory expressed in bytes. + * Not used. + * + * @retval NRF_SUCCESS Operation success. + * @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module + * initialization. + * @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed. + * @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed. + * @retval NRF_ERROR_NO_MEM Operation failure. No storage space available. + * + * @note Clear operations may take time. This API, however, does not block until the clear + * procedure is complete. The application is notified of procedure completion using + * a notification callback registered by the application. The 'result' parameter of the + * callback indicates if the procedure was successful or not. + */ +uint32_t pstorage_raw_clear(pstorage_handle_t * p_dest, pstorage_size_t size); + +#endif // PSTORAGE_RAW_MODE_ENABLE + +/**@} */ +/**@} */ + + +#ifdef __cplusplus +} +#endif + +#endif // PSTORAGE_H__ + diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/version.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/version.c new file mode 100644 index 0000000..4bcd8a9 --- /dev/null +++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/examples/dfu/experimental/ant_bootloader/version.c @@ -0,0 +1,73 @@ +/** + * This software is subject to the ANT+ Shared Source License + * www.thisisant.com/swlicenses + * Copyright (c) Dynastream Innovations, Inc. 2013 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * 1) Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2) Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3) Neither the name of Dynastream nor the names of its + * contributors may be used to endorse or promote products + * derived from this software without specific prior + * written permission. + * + * The following actions are prohibited: + * 1) Redistribution of source code containing the ANT+ Network + * Key. The ANT+ Network Key is available to ANT+ Adopters. + * Please refer to http://thisisant.com to become an ANT+ + * Adopter and access the key. + * + * 2) Reverse engineering, decompilation, and/or disassembly of + * software provided in binary form under this license. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW + * THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE + * ABOVE LIMITATIONS MAY NOT APPLY TO YOU. + * + */ + +/* + * NOTES: + * + * version "AAA#.##B##" + * + * SW_VER_MAJOR - Increases on any released applicaion major feature update/changes or new features + * SW_VER_MINOR - Increases on any release application minor feature update i.e. Bug fixing and minor features. + * SW_VER_PREFIX - Is fixed on this firmware. + * SW_VER_POSTFIX - Increases on any internal development builds. OR might be used for tagging special builds. OR might be used on branch build + */ + + + #define SW_VER_MAJOR "1." + #define SW_VER_MINOR "00" // last change was merging in antfs updates + + #define SW_VER_PREFIX "BFD" // N548 Reference Design Bootloader + #define SW_VER_POSTFIX "B00" + + +/*************************************************************************** +*/ +const char ac_bootloader_version[] = SW_VER_PREFIX SW_VER_MAJOR SW_VER_MINOR SW_VER_POSTFIX; // Max 11 characters including null |