1 files changed, 153 insertions, 0 deletions
diff --git a/thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/ARM/nrf52/port.c b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/ARM/nrf52/port.c
new file mode 100644
index 0000000..5a09444
--- /dev/null
+++ b/thirdparty/nRF5_SDK_15.0.0_a53641a/external/freertos/portable/ARM/nrf52/port.c
@@ -0,0 +1,153 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*-----------------------------------------------------------
+ * Implementation of functions defined in portable.h for the ARM CM4F port.
+ *----------------------------------------------------------*/
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+
+/*
+ * Start first task is a separate function so it can be tested in isolation.
+ */
+void vPortStartFirstTask( void );
+
+/*
+ * Exception handlers.
+ */
+void xPortPendSVHandler( void );
+void vPortSVCHandler( void );
+
+
+/*-----------------------------------------------------------*/
+
+__asm void vPortSVCHandler( void )
+{
+    PRESERVE8
+
+    /* Get the location of the current TCB. */
+    ldr r3, =pxCurrentTCB
+    ldr r1, [r3]
+    ldr r0, [r1]
+    /* Pop the core registers. */
+    ldmia r0!, {r4-r11, r14}
+    msr psp, r0
+    isb
+    mov r0, #0
+    msr basepri, r0
+    bx r14
+}
+/*-----------------------------------------------------------*/
+
+__asm void vPortStartFirstTask( void )
+{
+    PRESERVE8
+    EXTERN __Vectors
+
+    /* Use the NVIC offset register to locate the stack. */
+    ldr r0, =__Vectors
+    ldr r0, [r0]
+    /* Set the msp back to the start of the stack. */
+    msr msp, r0
+    /* Globally enable interrupts. */
+    cpsie i
+    cpsie f
+    dsb
+    isb
+#ifdef SOFTDEVICE_PRESENT
+    /* Block kernel interrupts only (PendSV) before calling SVC */
+    mov r0, #(configKERNEL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+    msr basepri, r0
+#endif
+    /* Call SVC to start the first task. */
+    svc 0
+
+    ALIGN
+}
+/*-----------------------------------------------------------*/
+
+__asm void xPortPendSVHandler( void )
+{
+    extern uxCriticalNesting;
+    extern pxCurrentTCB;
+    extern vTaskSwitchContext;
+
+    PRESERVE8
+
+    mrs r0, psp
+    isb
+    /* Get the location of the current TCB. */
+    ldr r3, =pxCurrentTCB
+    ldr r2, [r3]
+
+    /* Is the task using the FPU context?  If so, push high vfp registers. */
+    tst r14, #0x10
+    it eq
+    vstmdbeq r0!, {s16-s31}
+
+    /* Save the core registers. */
+    stmdb r0!, {r4-r11, r14}
+
+    /* Save the new top of stack into the first member of the TCB. */
+    str r0, [r2]
+
+    stmdb sp!, {r3}
+    mov r0, #(configMAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+    msr basepri, r0
+    dsb
+    isb
+    bl vTaskSwitchContext
+    mov r0, #0
+    msr basepri, r0
+    ldmia sp!, {r3}
+
+    /* The first item in pxCurrentTCB is the task top of stack. */
+    ldr r1, [r3]
+    ldr r0, [r1]
+
+    /* Pop the core registers. */
+    ldmia r0!, {r4-r11, r14}
+
+    /* Is the task using the FPU context?  If so, pop the high vfp registers
+    too. */
+    tst r14, #0x10
+    it eq
+    vldmiaeq r0!, {s16-s31}
+
+    msr psp, r0
+    isb
+
+    bx r14
+
+    ALIGN
+}
+/*-----------------------------------------------------------*/
+