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authorTrygve Laugstøl <trygvis@inamo.no>2018-08-20 23:28:00 +0200
committerTrygve Laugstøl <trygvis@inamo.no>2018-08-20 23:28:00 +0200
commitec429f152cf1d32a86f5783ed87453b42f7ef190 (patch)
treee872b07b9c59fc911dff06c0fe9abcc69f763405
parent61bbddad93ada8f877c26b8d748c8326085d3e3a (diff)
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o Better STM32 setup.HEADmaster
-rw-r--r--.gitignore3
-rw-r--r--dodo.py43
-rw-r--r--requirements.txt4
-rw-r--r--rules/.gitignore2
-rw-r--r--rules/pom.xml72
-rw-r--r--rules/src/main/java/io/trygvis/semantic/Main.java88
-rw-r--r--rules/src/main/resources/log4j2.xml26
-rw-r--r--stm32/__init__.py87
-rw-r--r--stm32/csv/STM32 High Performance MCUs.csv288
-rw-r--r--stm32/csv/STM32 Mainstream MCUs.csv237
-rw-r--r--stm32/csv/STM32 Ultra Low Power MCUs.csv286
-rw-r--r--stm32/csv/STM32 Wireless MCUs.csv4
-rw-r--r--stm32/owl/STM32 High Performance MCUs.owl13771
-rw-r--r--stm32/owl/STM32 Mainstream MCUs.owl11121
-rw-r--r--stm32/owl/STM32 Ultra Low Power MCUs.owl13392
-rw-r--r--stm32/owl/STM32 Wireless MCUs.owl403
-rwxr-xr-xstm32/run.py76
-rw-r--r--stm32/stm32.rules22
18 files changed, 39905 insertions, 20 deletions
diff --git a/.gitignore b/.gitignore
index 63cf315..39d49cc 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1,4 @@
.~*
+env
+__pycache__
+.doit.db
diff --git a/dodo.py b/dodo.py
new file mode 100644
index 0000000..1215454
--- /dev/null
+++ b/dodo.py
@@ -0,0 +1,43 @@
+import glob
+import shutil
+from collections import namedtuple
+from pathlib import Path
+import stm32
+
+File = namedtuple("File", "xlsx, csv, owl")
+
+files = [File(Path(xlsx), Path("stm32/csv/{}.csv".format(xlsx[6:-5])), Path("stm32/owl/{}.owl".format(xlsx[6:-5])))
+ for xlsx in list(glob.glob("stm32/*.xlsx"))]
+
+def make_parent(path):
+ d = path.parent
+ if not d.is_dir():
+ d.mkdir()
+
+def task_stm32_csv():
+ def action(xlsx, csv):
+ # print("xlsx={}, csv={}".format(xlsx, csv))
+ make_parent(csv)
+ stm32.xlsx_to_csv(xlsx, csv)
+
+ for f in files:
+ yield dict(
+ name=f.csv,
+ actions=[(action, [f.xlsx, f.csv])],
+ file_dep=[f.xlsx],
+ targets=[f.csv],
+ clean=True)
+
+def task_stm32_owl():
+ def action(csv, owl):
+ # print("csv={}, owl={}".format(csv, owl))
+ make_parent(owl)
+ stm32.csv_to_owl(csv, owl)
+
+ for f in files:
+ yield dict(
+ name=f.owl,
+ actions=[(action, [f.csv, f.owl])],
+ file_dep=[f.csv],
+ targets=[f.owl],
+ clean=True)
diff --git a/requirements.txt b/requirements.txt
new file mode 100644
index 0000000..419da55
--- /dev/null
+++ b/requirements.txt
@@ -0,0 +1,4 @@
+jinja2
+openpyxl
+owlready2
+doit
diff --git a/rules/.gitignore b/rules/.gitignore
new file mode 100644
index 0000000..3a247a3
--- /dev/null
+++ b/rules/.gitignore
@@ -0,0 +1,2 @@
+logs
+target
diff --git a/rules/pom.xml b/rules/pom.xml
new file mode 100644
index 0000000..ff7b8b3
--- /dev/null
+++ b/rules/pom.xml
@@ -0,0 +1,72 @@
+<project xmlns="http://maven.apache.org/POM/4.0.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 http://maven.apache.org/xsd/maven-4.0.0.xsd">
+ <modelVersion>4.0.0</modelVersion>
+
+ <groupId>io.trygvis.semantic</groupId>
+ <artifactId>semantic-sandbox</artifactId>
+ <version>0.0.1-SNAPSHOT</version>
+
+ <properties>
+ <project.build.sourceEncoding>UTF-8</project.build.sourceEncoding>
+ <maven.compiler.source>1.8</maven.compiler.source>
+ <maven.compiler.target>1.8</maven.compiler.target>
+ </properties>
+
+ <dependencies>
+ <dependency>
+ <groupId>org.apache.logging.log4j</groupId>
+ <artifactId>log4j-api</artifactId>
+ <version>2.6.2</version>
+ </dependency>
+ <dependency>
+ <groupId>org.apache.logging.log4j</groupId>
+ <artifactId>log4j-core</artifactId>
+ <version>2.6.2</version>
+ </dependency>
+ <dependency>
+ <groupId>org.apache.logging.log4j</groupId>
+ <artifactId>log4j-slf4j-impl</artifactId>
+ <version>2.6.2</version>
+ </dependency>
+ <dependency>
+ <groupId>junit</groupId>
+ <artifactId>junit</artifactId>
+ <version>4.12</version>
+ <scope>test</scope>
+ </dependency>
+ <!-- https://mvnrepository.com/artifact/org.apache.jena/apache-jena-libs -->
+ <dependency>
+ <groupId>org.apache.jena</groupId>
+ <artifactId>apache-jena-libs</artifactId>
+ <version>3.8.0</version>
+ <type>pom</type>
+ </dependency>
+ </dependencies>
+
+ <build>
+ <plugins>
+ <plugin>
+ <groupId>org.codehaus.mojo</groupId>
+ <artifactId>appassembler-maven-plugin</artifactId>
+ <version>1.10</version>
+ <executions>
+ <execution>
+ <id>assemble</id>
+ <phase>package</phase>
+ <goals>
+ <goal>assemble</goal>
+ </goals>
+ </execution>
+ </executions>
+ <configuration>
+ <programs>
+ <program>
+ <mainClass>io.trygvis.semantic.Main</mainClass>
+ <id>rules</id>
+ </program>
+ </programs>
+ </configuration>
+ </plugin>
+ </plugins>
+ </build>
+</project>
diff --git a/rules/src/main/java/io/trygvis/semantic/Main.java b/rules/src/main/java/io/trygvis/semantic/Main.java
new file mode 100644
index 0000000..9c8e9c6
--- /dev/null
+++ b/rules/src/main/java/io/trygvis/semantic/Main.java
@@ -0,0 +1,88 @@
+package io.trygvis.semantic;
+
+import java.nio.file.Path;
+import java.nio.file.Paths;
+import java.util.List;
+import java.util.Iterator;
+
+import org.apache.jena.dboe.base.file.Location;
+import org.apache.jena.query.Dataset;
+import org.apache.jena.query.QueryExecution;
+import org.apache.jena.query.QueryExecutionFactory;
+import org.apache.jena.query.QuerySolution;
+import org.apache.jena.query.ReadWrite;
+import org.apache.jena.query.ResultSet;
+import org.apache.jena.rdf.model.InfModel;
+import org.apache.jena.rdf.model.Model;
+import org.apache.jena.rdf.model.ModelFactory;
+import org.apache.jena.rdf.model.Property;
+import org.apache.jena.rdf.model.RDFNode;
+import org.apache.jena.rdf.model.Resource;
+import org.apache.jena.rdf.model.Statement;
+import org.apache.jena.rdf.model.StmtIterator;
+import org.apache.jena.reasoner.Derivation;
+import org.apache.jena.reasoner.Reasoner;
+import org.apache.jena.reasoner.rulesys.Builtin;
+import org.apache.jena.reasoner.rulesys.BuiltinRegistry;
+import org.apache.jena.reasoner.rulesys.GenericRuleReasoner;
+import org.apache.jena.reasoner.rulesys.MapBuiltinRegistry;
+import org.apache.jena.reasoner.rulesys.Rule;
+import org.apache.jena.riot.RDFDataMgr;
+import org.apache.jena.riot.RDFFormat;
+import org.apache.jena.tdb2.TDB2Factory;
+import org.apache.jena.update.UpdateExecutionFactory;
+import org.apache.jena.update.UpdateFactory;
+import org.apache.jena.update.UpdateProcessor;
+import org.apache.jena.update.UpdateRequest;
+import org.apache.jena.util.PrintUtil;
+import org.slf4j.Logger;
+import org.slf4j.LoggerFactory;
+import org.slf4j.Marker;
+import org.slf4j.MarkerFactory;
+
+public class Main {
+ private static Logger logger = LoggerFactory.getLogger(Main.class);
+ // Why This Failure marker
+ private static final Marker WTF_MARKER = MarkerFactory.getMarker("WTF");
+
+ public static void main(String[] args) {
+ try {
+ Path path = Paths.get(".").toAbsolutePath().normalize();
+
+ // Load RDF data
+ String data = Paths.get(args[0]).toUri().toString(); // path.toFile().getAbsolutePath() + "/src/main/resources/data1.ttl";
+ Model model = ModelFactory.createDefaultModel();
+ model.read(data);
+
+ // Load rules
+ String rules = args[1]; // path.toFile().getAbsolutePath() + "/src/main/resources/student1.rules";
+ Reasoner reasoner = new GenericRuleReasoner(Rule.rulesFromURL(rules));
+
+ InfModel infModel = ModelFactory.createInfModel(reasoner, model);
+ infModel.setDerivationLogging(true);
+ infModel.validate();
+ List<Statement> stmts = infModel.listStatements().toList();
+
+ Model dm = infModel.getDeductionsModel();
+
+ /*
+ if (true) {
+ logger.info("# statements = " + stmts.size());
+ logger.info("dm.size() = " + dm.size());
+ } else {
+ for (StmtIterator i = infModel.listStatements(); i.hasNext(); ) {
+ Statement stmt = i.nextStatement();
+ logger.trace("Statememt = " + PrintUtil.print(stmt));
+ }
+ }
+ */
+ logger.info("Inferred data");
+ for (StmtIterator i = dm.listStatements(); i.hasNext(); ) {
+ Statement stmt = i.nextStatement();
+ logger.trace("Statememt = " + PrintUtil.print(stmt));
+ }
+ } catch (Throwable t) {
+ logger.error(WTF_MARKER, t.getMessage(), t);
+ }
+ }
+}
diff --git a/rules/src/main/resources/log4j2.xml b/rules/src/main/resources/log4j2.xml
new file mode 100644
index 0000000..e4f29d0
--- /dev/null
+++ b/rules/src/main/resources/log4j2.xml
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Configuration package="log4j.test" status="WARN">
+<Appenders>
+ <Console name="Console" target="SYSTEM_OUT">
+ <PatternLayout pattern="%markerSimpleName %-5p %C.%M():%L - %msg %ex{full}%n"/>
+ </Console>
+ <File name="Log" fileName="./logs/App.log">
+ <PatternLayout>
+ <Pattern>%markerSimpleName %-5p %C.%M():%L - %msg %ex{full}%n</Pattern>
+ </PatternLayout>
+ </File>
+</Appenders>
+<Loggers>
+ <Root level="trace">
+ <AppenderRef ref="Console"/>
+ <AppenderRef ref="Log"/>
+ </Root>
+ <!--<Logger name="root" level="trace" additivity="false">
+ <AppenderRef ref="Console"/>
+ </Logger>
+ <Logger name="root" level="trace" additivity="false">
+ <AppenderRef ref="Console"/>
+ <AppenderRef ref="Log"/>
+ </Logger>-->
+</Loggers>
+</Configuration>
diff --git a/stm32/__init__.py b/stm32/__init__.py
new file mode 100644
index 0000000..ee5b63a
--- /dev/null
+++ b/stm32/__init__.py
@@ -0,0 +1,87 @@
+import csv
+import os
+import owlready2 as owl
+import types
+import urllib
+from openpyxl import load_workbook
+
+BASE_URL = "https://trygvis.io/owl/stm32"
+SHARED_URL = "{}/shared.owl".format(BASE_URL)
+
+def xlsx_to_csv(xlsx_path, csv_path):
+ wb = load_workbook(filename=xlsx_path)
+ ws = wb.active
+
+ header = [cell.value.strip() for cell in ws[6]]
+
+ with open(csv_path, "w", newline="") as f:
+ w = csv.writer(f, lineterminator=os.linesep)
+ w.writerow(header)
+ for row in ws.iter_rows(min_row=7):
+ w.writerow([cell.value.strip() for cell in row])
+
+def csv_to_owl(csv_path, owl_path):
+ data = []
+ with open(csv_path, "r") as f:
+ def fixup(s):
+ return s.replace(u"\u00b5", "u").\
+ replace(u"\u00b0", "o")
+ for row in csv.reader(f):
+ data.append([fixup(cell) for cell in row])
+
+ header = data[0]
+ chips = data[1:]
+
+ line = owl_path.name[0:-4]
+ url = "{}/{}.owl".format(BASE_URL, urllib.parse.quote(line))
+ onto = owl.get_ontology(url)
+ shared = onto.get_namespace(SHARED_URL)
+
+ class Chip(owl.Thing):
+ namespace = shared
+ Chip.label = "Chip"
+
+ class ChipLine(owl.Thing):
+ namespace = shared
+ ChipLine.label = "ChipLine"
+
+ class HasChipLine(owl.ObjectProperty):
+ namespace = shared
+ domain = [Chip]
+ range = [ChipLine]
+ python_name = "chip_line"
+ HasChipLine.label = "Has Chip Line"
+
+ with onto:
+ chip_line = ChipLine(urllib.parse.quote(line))
+ chip_line.label = line
+ properties = []
+ for field in header:
+ class_name = field
+ class_name = class_name.lower()
+ class_name = class_name.replace(" ", "-")
+ class_name = class_name.replace("/", "")
+ class_name = class_name.replace("(", "")
+ class_name = class_name.replace(")", "")
+ class_name = urllib.parse.quote(class_name)
+ cls = types.new_class(class_name, (owl.DataProperty,))
+ cls.label = "Has {}".format(field)
+ cls.domain = [Chip]
+ cls.namespace = onto
+ python_name = class_name
+ python_name = python_name.replace(" ", "_")
+ python_name = python_name.replace("-", "_")
+ cls.python_name = python_name
+ properties.append(cls)
+
+ for row in chips:
+ chip = Chip(row[0])
+ chip.label = row[0]
+ chip.chip_line = [chip_line]
+
+ for idx, value in enumerate(row):
+ prop = properties[idx]
+ chip.__setattr__(prop.python_name, [value])
+
+ with open(owl_path, "wb") as f:
+ onto.save(f)
diff --git a/stm32/csv/STM32 High Performance MCUs.csv b/stm32/csv/STM32 High Performance MCUs.csv
new file mode 100644
index 0000000..6079744
--- /dev/null
+++ b/stm32/csv/STM32 High Performance MCUs.csv
@@ -0,0 +1,288 @@
+Part Number,General Description,Marketing Status,Package,Core,Operating Frequency (MHz) (Processor speed),Co-Processor type,Co-Processor frequency (MHz) max,FLASH Size (kB) (Prog),Data E2PROM (B) nom,RAM Size (kB),Timers (16 bit) typ,Timers (32 bit) typ,Other timer functions,A/D Converters (12-bit channels),A/D Converters (16-bit channels),D/A Converters (12 bit) typ,Comparator,I/Os (High Current),Display controller,CAN typ,CAN FD typ,I2C typ,SPI typ,I2S typ,USB Type,USART typ,UART typ,Connectivity supported,Integrated op-amps,Additional Serial Interfaces,Parallel Interfaces,Crypto-HASH,TRNG typ,SMPS,Supply Voltage (V) min,Supply Voltage (V) max,Supply Current (µA) (Lowest power mode) typ,Supply Current (µA) (Run mode (per Mhz)) typ,Operating Temperature (°C) min,Operating Temperature (°C) max
+STM32F411VE,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 100 MHz CPU, ART Accelerator",Active,"LQFP 100 14x14x1.4,UFBGA 100 7x7x0.6",Arm Cortex-M4,100,-,-,512,-,128,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,81,-,-,-,3,5,5,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,100,-40,85
+STM32F413VG,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 1 MByte Flash, 100 MHz CPU, ART Accelerator, DFSDM",Active,"LQFP 100 14x14x1.4,UFBGA 100 7x7x0.6",Arm Cortex-M4,100,-,-,1024,-,320,13,2,"2xWDG,SysTick,RTC",16,-,2,-,81,-,3,-,3,5,5,USB OTG FS,4,6,-,-,SAI,"DFSDM,FSMC,Quad SPI,SD/MMC,SDIO",-,true,-,1.7,3.6,1.1,112,-40,"125,85"
+STM32F730I8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbytes of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto, SDRAM",Active,BGA 176,Arm Cortex-M7,216,-,-,64,-,256,12,2,"24-bit downcounter,2xWDG,RTC",16,-,2,-,138,-,1,-,4,5,3,"USB OTG FS,USB OTG FS + USB OTG FS/HS",4,4,-,-,SAI,"Dual Quad SPI,FMC,SDIO",AES,true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F730R8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbytes of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto,SDRAM",Active,LQFP 64 10x10x1.4,Arm Cortex-M7,216,-,-,64,-,256,12,2,"24-bit downcounter,2xWDG,RTC",16,-,2,-,50,-,1,-,4,4,3,"USB OTG FS,USB OTG FS + USB OTG FS/HS",4,4,-,-,SAI,"Dual Quad SPI,FMC,SDIO",AES,true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F730V8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbytes of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto, SDRAM",Active,LQFP 100 14x14x1.4,Arm Cortex-M7,216,-,-,64,-,256,12,2,"24-bit downcounter,2xWDG,RTC",16,-,2,-,82,-,1,-,4,4,3,"USB OTG FS,USB OTG FS + USB OTG FS/HS",4,4,-,-,SAI,"Dual Quad SPI,FMC,SDIO",AES,true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F730Z8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbytes of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto, SDRAM",Active,LQFP 144 20x20x1.4,Arm Cortex-M7,216,-,-,64,-,256,12,2,"24-bit downcounter,2xWDG,RTC",16,-,2,-,112,-,1,-,4,5,3,"USB OTG FS,USB OTG FS + USB OTG FS/HS",4,4,-,-,SAI,"Dual Quad SPI,FMC,SDIO",AES,true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F745IE,"High-performance and DSP with FPU, ARM Cortex-M7 MCU with 512 Kbytes Flash, 216 MHz CPU, Art Accelerator, L1 cache, SDRAM",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M7,216,-,-,512,-,320,12,2,"24-bit downcounter,2xWDG,RTC",24,-,2,-,140,-,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,Dual Quad SPI,FMC,SDIO",-,true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F746NG,"High-performance and DSP with FPU, ARM Cortex-M7 MCU with 1 Mbyte Flash, 216 MHz CPU, Art Accelerator, L1 cache, SDRAM, TFT",Active,TFBGA 13X13X1.2 216L P 0.8 MM,Arm Cortex-M7,216,-,-,1024,-,320,12,2,"24-bit downcounter,2xWDG,RTC",24,-,2,-,168,LCD TFT Controller up to 1024x728,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,Dual Quad SPI,FMC,SDIO",-,true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F750N8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbyte of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto, SDRAM, TFT",Active,TFBGA 13X13X1.2 216L P 0.8 MM,Arm Cortex-M7,216,-,-,64,-,320,12,2,"24-bit downcounter,2xWDG,RTC",24,-,2,-,168,LCD TFT Controller up to 1024x728,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,DFSDM,Dual Quad SPI,FMC,SDIO","AES,DES/TDES,HMAC,MD5,SHA",true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F750V8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbyte of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto, SDRAM, TFT",Active,LQFP 100 14x14x1.4,Arm Cortex-M7,216,-,-,64,-,320,12,2,"24-bit downcounter,2xWDG,RTC",16,-,2,-,82,LCD TFT Controller up to 1024x728,2,-,4,4,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,DFSDM,Dual Quad SPI,FMC,SDIO","AES,DES/TDES,HMAC,MD5,SHA",true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F750Z8,"High-performance and DSP with FPU, Arm Cortex-M7 MCU with 64 Kbyte of Flash memory, 216 MHz CPU, Art Accelerator, L1 cache, HW crypto, SDRAM, TFT",Active,LQFP 144 20x20x1.4,Arm Cortex-M7,216,-,-,64,-,320,12,2,"24-bit downcounter,2xWDG,RTC",24,-,2,-,114,LCD TFT Controller up to 1024x728,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,DFSDM,Dual Quad SPI,FMC,SDIO","AES,DES/TDES,HMAC,MD5,SHA",true,-,1.7,3.6,1.7,472,-40,"105,85"
+STM32F765NI,"High-performance and DSP with FPU, ARM Cortex-M7 MCU with 2 Mbytes Flash, 216 MHz CPU, Art Accelerator, L1 cache, SDRAM, DFSDM",Active,TFBGA 13X13X1.2 216L P 0.8 MM,Arm Cortex-M7,216,-,-,2048,-,512,12,2,"24-bit downcounter,2xWDG,RTC",24,-,2,-,168,-,3,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,DFSDM,Dual Quad SPI,FMC,SDIO",-,true,-,1.7,3.6,2.5,420,-40,"105,85"
+STM32F765ZG,"High-performance and DSP with FPU, ARM Cortex-M7 MCU with 1 Mbyte Flash, 216 MHz CPU, Art Accelerator, L1 cache, SDRAM, DFSDM",Active,LQFP 144 20x20x1.4,Arm Cortex-M7,216,-,-,1024,-,512,12,2,"24-bit downcounter,2xWDG,RTC",24,-,2,-,114,-,3,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,4,-,-,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DCMI,DFSDM,Dual Quad SPI,FMC,SDIO",-,true,-,1.7,3.6,2.5,420,-40,"105,85"
+STM32H750IB,"High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 128Kbytes of Flash memory, 1MB RAM, 400 MHz CPU, L1 cache, external memory interface, JPEG codec, HW crypto, large set of peripherals",Active,BGA 176,Arm Cortex-M7,400,-,-,128,-,1024,18,-,"24-bit downcounter,2xWDG,HR Timer,LP timer,RTC",-,20,2,2,140,LCD TFT Controller up to 1024x728,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,5,-,2,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DFSDM,Dual Quad SPI,FMC,SD/MMC,SDIO","AES,DES/TDES,HMAC,MD5,SHA",true,-,1.62,3.6,4,270,-40,"105,85"
+STM32H750VB,"High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 128 Kbytes of Flash memory, 1MB RAM, 400 MHz CPU, L1 cache, external memory interface, JPEG codec, HW crypto, large set of peripherals",Active,LQFP 100 14x14x1.4,Arm Cortex-M7,400,-,-,128,-,1024,18,-,"24-bit downcounter,2xWDG,HR Timer,LP timer,RTC",-,20,2,2,82,LCD TFT Controller up to 1024x728,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,5,-,2,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DFSDM,Dual Quad SPI,FMC,SD/MMC,SDIO","AES,DES/TDES,HMAC,MD5,SHA",true,-,1.71,3.6,4,270,-40,"105,85"
+STM32H750XB,"High-performance and DSP with DP-FPU, Arm Cortex-M7 MCU with 128KBytes of Flash memory, 1MB RAM, 400 MHz CPU, L1 cache, external memory interface, JPEG codec, HW crypto, large set of peripherals",Active,TFBGA 14X14X1.2 P 0.8 240+25L,Arm Cortex-M7,400,-,-,128,-,1024,18,-,"24-bit downcounter,2xWDG,HR Timer,LP timer,RTC",-,20,2,2,168,LCD TFT Controller up to 1024x728,2,-,4,6,3,USB OTG FS + USB OTG FS/HS,4,5,-,2,"Ethernet,HDMI CEC,S/PDIF,SAI","Camera IF,DFSDM,Dual Quad SPI,FMC,SD/MMC,SDIO","AES,DES/TDES,HMAC,MD5,SHA",true,-,1.62,3.6,4,270,-40,"105,85"
+STM32F205RB,"High-performance Arm Cortex-M3 MCU with 128 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M3,120,-,-,128,-,64,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205RC,"High-performance Arm Cortex-M3 MCU with 256 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M3,120,-,-,256,-,96,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205RE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,"LQFP 64 10x10x1.4,WLCSP 66L R9X9 PITCH 0.4 MM",Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205RF,"High-performance Arm Cortex-M3 MCU with 768 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M3,120,-,-,768,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F205RG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator",Active,"EWLCSP 66L DIE 411 P 0.4 MM,LQFP 64 10x10x1.4,WLCSP 66L R9X9 PITCH 0.4 MM",Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205VB,"High-performance Arm Cortex-M3 MCU with 128 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,128,-,64,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F205VC,"High-performance Arm Cortex-M3 MCU with 256 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,256,-,96,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205VE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205VF,"High-performance Arm Cortex-M3 MCU with 768 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,768,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F205VG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205ZC,"High-performance Arm Cortex-M3 MCU with 256 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,256,-,96,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205ZE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F205ZF,"High-performance Arm Cortex-M3 MCU with 768 Kbytes Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,768,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F205ZG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F207IC,"High-performance Arm Cortex-M3 MCU with 256 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M3,120,-,-,256,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207IE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207IF,"High-performance Arm Cortex-M3 MCU with 768 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M3,120,-,-,768,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207IG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F207VC,"High-performance Arm Cortex-M3 MCU with 256 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,256,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F207VE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207VF,"High-performance Arm Cortex-M3 MCU with 768 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,768,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207VG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F207ZC,"High-performance Arm Cortex-M3 MCU with 256 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,256,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F207ZE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207ZF,"High-performance Arm Cortex-M3 MCU with 768 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,768,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,85
+STM32F207ZG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,-,-,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F215RE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, HW crypto",Active,LQFP 64 10x10x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F215RG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, HW crypto",Active,LQFP 64 10x10x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F215VE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, HW crypto",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F215VG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, HW crypto",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F215ZE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, HW crypto",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F215ZG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, HW crypto",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F217IE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F217IG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F217VE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F217VG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto",Active,LQFP 100 14x14x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F217ZE,"High-performance Arm Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,512,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,"105,85"
+STM32F217ZG,"High-performance Arm Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto",Active,LQFP 144 20x20x1.4,Arm Cortex-M3,120,-,-,1024,-,128,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,2,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,SDIO,"AES,DES/TDES,MD5,SHA",true,-,1.8,3.6,2.5,188,-40,85
+STM32F401CB,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 128 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,UFQFPN 48 7x7x0.55,Arm Cortex-M4,84,-,-,128,-,64,6,2,"24-bit downcounter,2xWDG,RTC",10,-,-,-,36,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,-,-,-,-,1.7,3.6,1.8,128,-40,"105,125,85"
+STM32F401CC,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 256 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"THIN WLCSP 49L DIE 423 PITCH 0.4,UFQFPN 48 7x7x0.55,WLCSP 49L DIE 423 R 7X7 P 0.4 MM",Arm Cortex-M4,84,-,-,256,-,64,6,2,"24-bit downcounter,2xWDG,RTC",10,-,-,-,36,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,-,-,-,-,1.7,3.6,1.8,128,-40,"105,85"
+STM32F401CD,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 384 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"UFQFPN 48 7x7x0.55,WLCSP 49L DIE 433 P 0.4 MM",Arm Cortex-M4,84,-,-,384,-,96,6,2,"24-bit downcounter,2xWDG,RTC",10,-,-,-,36,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,-,-,-,-,1.7,3.6,1.8,137,-40,85
+STM32F401CE,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"UFQFPN 48 7x7x0.55,WLCSP 49L DIE 433 P 0.4 MM",Arm Cortex-M4,84,-,-,512,-,96,6,2,"24-bit downcounter,2xWDG,RTC",10,-,-,-,36,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,-,-,-,-,1.7,3.6,1.8,137,-40,85
+STM32F401RB,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 128 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M4,84,-,-,128,-,64,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,50,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,"1.7,1.8",128,-40,85
+STM32F401RC,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 256 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M4,84,-,-,256,-,64,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,50,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,128,-40,"105,85"
+STM32F401RD,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 384 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M4,84,-,-,384,-,96,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,50,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,137,-40,85
+STM32F401RE,"STM32 Dynamic Efficiency MCU, ARM Cortex-M4 core with DSP and FPU, up to 512 Kbytes Flash, 84 MHz CPU, Art Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M4,84,-,-,512,-,96,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,50,-,-,-,3,3,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,137,-40,"105,85"
+STM32F401VB,"High-performance access line, Arm Cortex-M4 core with DSP and FPU, 128 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"LQFP 100 14x14x1.4,UFBGA 100 7x7x0.6",Arm Cortex-M4,84,-,-,128,-,64,6,2,"24-bit downcounter,2xWDG,RTC",16,-,2,-,81,-,-,-,3,4,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,128,-40,"125,85"
+STM32F401VC,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 256 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"LQFP 100 14x14x1.4,UFBGA 100 7x7x0.6",Arm Cortex-M4,84,-,-,256,-,64,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,81,-,-,-,3,4,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,128,-40,"105,85"
+STM32F401VD,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 384 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"LQFP 100 14x14x1.4,UFBGA 100 7x7x0.6",Arm Cortex-M4,84,-,-,384,-,96,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,81,-,-,-,3,4,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,137,-40,85
+STM32F401VE,"High-performance access line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 84 MHz CPU, ART Accelerator",Active,"LQFP 100 14x14x1.4,UFBGA 100 7x7x0.6",Arm Cortex-M4,84,-,-,512,-,96,6,2,"24-bit downcounter,2xWDG,RTC",16,-,-,-,81,-,-,-,3,4,2,USB OTG FS,3,-,-,-,-,SDIO,-,-,-,1.7,3.6,1.8,137,-40,85
+STM32F405OE,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 168 MHz CPU, ART Accelerator, FSMC",Active,WLCSP 90 BALLS DIE 413 P 0.4 MM,Arm Cortex-M4,168,-,-,512,-,192,12,2,"2 x WDG,24-bit down counter,RTC",13,-,2,-,72,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,85
+STM32F405OG,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 1 Mbyte Flash, 168 MHz CPU, ART Accelerator, FSMC",Active,WLCSP 90 BALLS DIE 413 P 0.4 MM,Arm Cortex-M4,168,-,-,1024,-,192,12,2,"2 x WDG,24-bit down counter,RTC",13,-,2,-,72,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,85
+STM32F405RG,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 1 Mbyte Flash, 168 MHz CPU, ART Accelerator",Active,LQFP 64 10x10x1.4,Arm Cortex-M4,168,-,-,1024,-,192,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,51,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,"105,85"
+STM32F405VG,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 1 Mbyte Flash, 168 MHz CPU, ART Accelerator, FSMC",Active,LQFP 100 14x14x1.4,Arm Cortex-M4,168,-,-,1024,-,192,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,"105,85"
+STM32F405ZG,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 1 Mbyte Flash, 168 MHz CPU, ART Accelerator, FSMC",Active,LQFP 144 20x20x1.4,Arm Cortex-M4,168,-,-,1024,-,192,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,114,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,-,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,"105,85"
+STM32F407IE,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 168 MHz CPU, ART Accelerator, Ethernet, FSMC",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M4,168,-,-,512,-,192,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,"105,85"
+STM32F407IG,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 1 Mbyte Flash, 168 MHz CPU, ART Accelerator, Ethernet, FSMC",Active,"BGA 176,LQFP 176 24x24x1.4",Arm Cortex-M4,168,-,-,1024,-,192,12,2,"2 x WDG,24-bit down counter,RTC",24,-,2,-,140,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,"105,85"
+STM32F407VE,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 168 MHz CPU, ART Accelerator, Ethernet, FSMC",Active,LQFP 100 14x14x1.4,Arm Cortex-M4,168,-,-,512,-,192,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,85
+STM32F407VG,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 1 Mbyte Flash, 168 MHz CPU, ART Accelerator, Ethernet, FSMC",Active,LQFP 100 14x14x1.4,Arm Cortex-M4,168,-,-,1024,-,192,12,2,"2 x WDG,24-bit down counter,RTC",16,-,2,-,82,-,2,-,3,3,2,USB OTG FS + USB OTG FS/HS,4,2,-,-,Ethernet,"FSMC,SD/MMC",-,true,-,1.8,3.6,1.7,215,-40,"105,85"
+STM32F407ZE,"High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 168 MHz CPU, ART Accelerator, Ethernet, FSMC",Active,LQFP 144 20x20x1.4,Arm Cortex-M4,168,-,-,512,-,192,12,2,"2 x WDG,24-bit down counter,