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| author | Trygve Laugstøl <trygvis@inamo.no> | 2018-08-15 13:55:44 +0200 |
|---|---|---|
| committer | Trygve Laugstøl <trygvis@inamo.no> | 2018-08-15 13:55:44 +0200 |
| commit | abb3a34a0557733a7c3754291ea689e44f9a9689 (patch) | |
| tree | 7c5d44596e40418e0439bcd18de68dd96b6a5492 /Artix-7/mw | |
| parent | 5b53ca0700189ebb98278a8081bdabf527f1bb12 (diff) | |
| download | semantic-sandbox-abb3a34a0557733a7c3754291ea689e44f9a9689.tar.gz semantic-sandbox-abb3a34a0557733a7c3754291ea689e44f9a9689.tar.bz2 semantic-sandbox-abb3a34a0557733a7c3754291ea689e44f9a9689.tar.xz semantic-sandbox-abb3a34a0557733a7c3754291ea689e44f9a9689.zip | |
o Adding pages for Kintex-7.
Diffstat (limited to 'Artix-7/mw')
| -rw-r--r-- | Artix-7/mw/Chip:XC7A100T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A12T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A15T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A200T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A25T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A35T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A50T.mw | 2 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A75T.mw | 2 |
8 files changed, 8 insertions, 8 deletions
diff --git a/Artix-7/mw/Chip:XC7A100T.mw b/Artix-7/mw/Chip:XC7A100T.mw index 078246e..a0fc091 100644 --- a/Artix-7/mw/Chip:XC7A100T.mw +++ b/Artix-7/mw/Chip:XC7A100T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;8]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;240]] diff --git a/Artix-7/mw/Chip:XC7A12T.mw b/Artix-7/mw/Chip:XC7A12T.mw index 2ac72ac..90ae0e9 100644 --- a/Artix-7/mw/Chip:XC7A12T.mw +++ b/Artix-7/mw/Chip:XC7A12T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;2]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;40]] diff --git a/Artix-7/mw/Chip:XC7A15T.mw b/Artix-7/mw/Chip:XC7A15T.mw index 82d7e18..da7f216 100644 --- a/Artix-7/mw/Chip:XC7A15T.mw +++ b/Artix-7/mw/Chip:XC7A15T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;45]] diff --git a/Artix-7/mw/Chip:XC7A200T.mw b/Artix-7/mw/Chip:XC7A200T.mw index 293e07e..f86b49d 100644 --- a/Artix-7/mw/Chip:XC7A200T.mw +++ b/Artix-7/mw/Chip:XC7A200T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;16]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;740]] diff --git a/Artix-7/mw/Chip:XC7A25T.mw b/Artix-7/mw/Chip:XC7A25T.mw index e60ea9d..3b898da 100644 --- a/Artix-7/mw/Chip:XC7A25T.mw +++ b/Artix-7/mw/Chip:XC7A25T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;80]] diff --git a/Artix-7/mw/Chip:XC7A35T.mw b/Artix-7/mw/Chip:XC7A35T.mw index f04f0a2..ca5238d 100644 --- a/Artix-7/mw/Chip:XC7A35T.mw +++ b/Artix-7/mw/Chip:XC7A35T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;90]] diff --git a/Artix-7/mw/Chip:XC7A50T.mw b/Artix-7/mw/Chip:XC7A50T.mw index 45469ab..1c48103 100644 --- a/Artix-7/mw/Chip:XC7A50T.mw +++ b/Artix-7/mw/Chip:XC7A50T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;120]] diff --git a/Artix-7/mw/Chip:XC7A75T.mw b/Artix-7/mw/Chip:XC7A75T.mw index 6f943bc..fbee874 100644 --- a/Artix-7/mw/Chip:XC7A75T.mw +++ b/Artix-7/mw/Chip:XC7A75T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;8]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;180]] |