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| author | Marc Pignat <marc.pignat@hevs.ch> | 2010-05-11 07:58:57 +0200 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-05-11 20:01:18 +0200 |
| commit | 4cf13101e5a75ffa0a84070133c2a5f764315d53 (patch) | |
| tree | 4ac60a3438d6b508c8218a6360708f01d7eba662 | |
| parent | 3650981de7e5854b5023fddeb1a4656794a0aae0 (diff) | |
| download | openocd+libswd-4cf13101e5a75ffa0a84070133c2a5f764315d53.tar.gz openocd+libswd-4cf13101e5a75ffa0a84070133c2a5f764315d53.tar.bz2 openocd+libswd-4cf13101e5a75ffa0a84070133c2a5f764315d53.tar.xz openocd+libswd-4cf13101e5a75ffa0a84070133c2a5f764315d53.zip | |
Documentation : arm920t implements armv4
There is a small typo in the cpu list, arm920t is armv4.
| -rw-r--r-- | doc/openocd.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index a4c4de29..5e703f1f 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -3432,7 +3432,7 @@ At this writing, the supported CPU types and variants are: @item @code{arm11} -- this is a generation of ARMv6 cores @item @code{arm720t} -- this is an ARMv4 core with an MMU @item @code{arm7tdmi} -- this is an ARMv4 core -@item @code{arm920t} -- this is an ARMv5 core with an MMU +@item @code{arm920t} -- this is an ARMv4 core with an MMU @item @code{arm926ejs} -- this is an ARMv5 core with an MMU @item @code{arm966e} -- this is an ARMv5 core @item @code{arm9tdmi} -- this is an ARMv4 core |