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| author | Thomas Kindler <mail+ocd@t-kindler.de> | 2009-11-10 09:16:12 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-10 09:16:12 -0800 |
| commit | 85944d4144a1df0647e4324d1cf8ae9a276b70e5 (patch) | |
| tree | 3ed4bc352d4c95f72f7699af76f48f3edb3fa820 | |
| parent | 627bd197689d71f7beb3e9cd11e2993fe0d4d880 (diff) | |
| download | openocd+libswd-85944d4144a1df0647e4324d1cf8ae9a276b70e5.tar.gz openocd+libswd-85944d4144a1df0647e4324d1cf8ae9a276b70e5.tar.bz2 openocd+libswd-85944d4144a1df0647e4324d1cf8ae9a276b70e5.tar.xz openocd+libswd-85944d4144a1df0647e4324d1cf8ae9a276b70e5.zip | |
stm32.cfg: remove reset_config
Here's a patch for the double-reset problem on STM32. I've tested
downloading and debugging with GDB and Eclipse, and everything seems
to work fine.
This effectively sets reset_config to none. trst_only would also
be ok, but that's better left to a board configuration file since
not all boards wire it up.
The NVIC is used to trigger reset, which at least on this chip also
pulses nSRST so the whole system does get rest -- exactly once.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| -rw-r--r-- | tcl/target/stm32.cfg | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg index 619824c5..242bbbee 100644 --- a/tcl/target/stm32.cfg +++ b/tcl/target/stm32.cfg @@ -26,9 +26,6 @@ jtag_khz 1000 jtag_nsrst_delay 100 jtag_ntrst_delay 100 -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst - #jtag scan chain if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID |