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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-29 06:56:03 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-29 06:56:03 +0000 |
| commit | 8acafd1710d84c80e20156381cca54b3b5699275 (patch) | |
| tree | e3c05335b507392688006d9d5412040952f525d3 | |
| parent | f2e10a60506a04b811ac52e85084986d9ae46725 (diff) | |
| download | openocd+libswd-8acafd1710d84c80e20156381cca54b3b5699275.tar.gz openocd+libswd-8acafd1710d84c80e20156381cca54b3b5699275.tar.bz2 openocd+libswd-8acafd1710d84c80e20156381cca54b3b5699275.tar.xz openocd+libswd-8acafd1710d84c80e20156381cca54b3b5699275.zip | |
- updated cortex_m3 docs regarding luminary reset behaviour
git-svn-id: svn://svn.berlios.de/openocd/trunk@625 b42882b7-edfa-0310-969c-e2dbd0fdcd60
| -rw-r--r-- | doc/openocd.texi | 7 | ||||
| -rw-r--r-- | src/target/cortex_m3.c | 2 | ||||
| -rw-r--r-- | src/target/target/lm3s6965.cfg | 2 | ||||
| -rw-r--r-- | src/target/target/lm3s811.cfg | 2 |
4 files changed, 10 insertions, 3 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index a2a06251..7859e9a6 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -596,6 +596,13 @@ ARM920t options are similar to ARM9TDMI options. @cindex arm966e options ARM966e options are similar to ARM9TDMI options. +@subsection cortex_m3 options +@cindex cortex_m3 options +use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause +openocd to use a software reset rather than asserting SRST to avoid a issue with clearing +the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will +be detected and the normal reset behaviour used. + @subsection xscale options @cindex xscale options Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x}, diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 1f9674fa..ec385166 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -710,7 +710,7 @@ int cortex_m3_assert_reset(target_t *target) * when srst is asserted the luminary device seesm to also clear the debug registers * which does not match the armv7 debug TRM */ - if (strcmp(cortex_m3->variant, "luminary") == 0) + if (strcmp(cortex_m3->variant, "lm3s") == 0) { /* this causes the luminary device to reset using the watchdog */ ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ ); diff --git a/src/target/target/lm3s6965.cfg b/src/target/target/lm3s6965.cfg index ffef12e0..9b21cba0 100644 --- a/src/target/target/lm3s6965.cfg +++ b/src/target/target/lm3s6965.cfg @@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe # the luminary variant causes a software reset rather than asserting SRST # this stops the debug registers from being cleared # this will be fixed in later revisions of silicon -target cortex_m3 little reset_halt 0 luminary +target cortex_m3 little reset_halt 0 lm3s # 4k working area at base of ram working_area 0 0x20000000 0x4000 nobackup diff --git a/src/target/target/lm3s811.cfg b/src/target/target/lm3s811.cfg index 56d6410f..9d13d7b1 100644 --- a/src/target/target/lm3s811.cfg +++ b/src/target/target/lm3s811.cfg @@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe # the luminary variant causes a software reset rather than asserting SRST # this stops the debug registers from being cleared # this will be fixed in later revisions of silicon -target cortex_m3 little reset_halt 0 luminary +target cortex_m3 little reset_halt 0 lm3s # 2k working area at base of ram working_area 0 0x20000000 0x2000 nobackup |