ARM: rename armv4_5_algorithm as arm_algorithm

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

11 files changed, 27 insertions, 27 deletions

diff --git a/src/flash/arm_nandio.c b/src/flash/arm_nandio.c
index 12c4b2f9..67619d54 100644
--- a/src/flash/arm_nandio.c
+++ b/src/flash/arm_nandio.c
@@ -93,7 +93,7 @@ int arm_code_to_working_area(struct target *target,
 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
 {
 	struct target		*target = nand->target;
-	struct armv4_5_algorithm	algo;
+	struct arm_algorithm	algo;
 	struct arm		*armv4_5 = target->arch_info;
 	struct reg_param	reg_params[3];
 	uint32_t		target_buf;
@@ -177,7 +177,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
 int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 {
 	struct target *target = nand->target;
-	struct armv4_5_algorithm algo;
+	struct arm_algorithm algo;
 	struct arm *armv4_5 = target->arch_info;
 	struct reg_param reg_params[3];
 	uint32_t target_buf;
diff --git a/src/flash/nor/aduc702x.c b/src/flash/nor/aduc702x.c
index de362cb8..57018bb1 100644
--- a/src/flash/nor/aduc702x.c
+++ b/src/flash/nor/aduc702x.c
@@ -165,7 +165,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
 	struct working_area *source;
 	uint32_t address = bank->base + offset;
 	struct reg_param reg_params[6];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	int retval = ERROR_OK;
 
 	if (((count%2)!=0)||((offset%2)!=0))
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index cffc22a0..1ab93418 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -1012,7 +1012,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct target *target = bank->target;
 	struct reg_param reg_params[7];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	struct working_area *source;
 	uint32_t buffer_size = 32768;
 	uint32_t write_command_val, busy_pattern_val, error_pattern_val;
@@ -1257,7 +1257,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui
 	struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
 	struct target *target = bank->target;
 	struct reg_param reg_params[10];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	struct working_area *source;
 	uint32_t buffer_size = 32768;
 	uint32_t status;
diff --git a/src/flash/nor/ecos.c b/src/flash/nor/ecos.c
index b2169039..b51e0a03 100644
--- a/src/flash/nor/ecos.c
+++ b/src/flash/nor/ecos.c
@@ -209,7 +209,7 @@ static int runCode(struct ecosflash_flash_bank *info,
 	struct target *target = info->target;
 
 	struct reg_param reg_params[3];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	armv4_5_info.common_magic = ARM_COMMON_MAGIC;
 	armv4_5_info.core_mode = ARM_MODE_SVC;
 	armv4_5_info.core_state = ARM_STATE_ARM;
diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c
index 6888b768..0caf3e09 100644
--- a/src/flash/nor/lpc2000.c
+++ b/src/flash/nor/lpc2000.c
@@ -242,7 +242,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, int code, uint32_t param_ta
 	struct target *target = bank->target;
 	struct mem_param mem_params[2];
 	struct reg_param reg_params[5];
-	struct armv4_5_algorithm armv4_5_info; /* for LPC2000 */
+	struct arm_algorithm armv4_5_info; /* for LPC2000 */
 	struct armv7m_algorithm armv7m_info;   /* for LPC1700 */
  	uint32_t status_code;
 	uint32_t iap_entry_point = 0; /* to make compiler happier */
diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c
index 1ef759e2..ce74bbba 100644
--- a/src/flash/nor/lpc2900.c
+++ b/src/flash/nor/lpc2900.c
@@ -1302,7 +1302,7 @@ static int lpc2900_write(struct flash_bank *bank, uint8_t *buffer,
 	if( warea )
 	{
 		struct reg_param reg_params[5];
-		struct armv4_5_algorithm armv4_5_info;
+		struct arm_algorithm armv4_5_info;
 
 		/* We can use target mode. Download the algorithm. */
 		retval = target_write_buffer( target,
diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c
index 45aa6574..ef693e95 100644
--- a/src/flash/nor/str7x.c
+++ b/src/flash/nor/str7x.c
@@ -318,7 +318,7 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
 	struct working_area *source;
 	uint32_t address = bank->base + offset;
 	struct reg_param reg_params[6];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	int retval = ERROR_OK;
 
 	uint32_t str7x_flash_write_code[] = {
diff --git a/src/flash/nor/str9x.c b/src/flash/nor/str9x.c
index 95da3e24..9cddb506 100644
--- a/src/flash/nor/str9x.c
+++ b/src/flash/nor/str9x.c
@@ -356,7 +356,7 @@ static int str9x_write_block(struct flash_bank *bank,
 	struct working_area *source;
 	uint32_t address = bank->base + offset;
 	struct reg_param reg_params[4];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	int retval = ERROR_OK;
 
 	uint32_t str9x_flash_write_code[] = {
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 68005c01..25f8cb32 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2693,7 +2693,7 @@ int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t c
 		}
 	}
 
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	struct reg_param reg_params[1];
 
 	armv4_5_info.common_magic = ARM_COMMON_MAGIC;
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 6941c161..e07f6067 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -1037,7 +1037,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 				int timeout_ms, void *arch_info))
 {
 	struct arm *armv4_5 = target_to_arm(target);
-	struct armv4_5_algorithm *armv4_5_algorithm_info = arch_info;
+	struct arm_algorithm *arm_algorithm_info = arch_info;
 	enum arm_state core_state = armv4_5->core_state;
 	uint32_t context[17];
 	uint32_t cpsr;
@@ -1047,7 +1047,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 
 	LOG_DEBUG("Running algorithm");
 
-	if (armv4_5_algorithm_info->common_magic != ARM_COMMON_MAGIC)
+	if (arm_algorithm_info->common_magic != ARM_COMMON_MAGIC)
 	{
 		LOG_ERROR("current target isn't an ARMV4/5 target");
 		return ERROR_TARGET_INVALID;
@@ -1077,10 +1077,10 @@ int armv4_5_run_algorithm_inner(struct target *target,
 		struct reg *r;
 
 		r = &ARMV4_5_CORE_REG_MODE(armv4_5->core_cache,
-				armv4_5_algorithm_info->core_mode, i);
+				arm_algorithm_info->core_mode, i);
 		if (!r->valid)
 			armv4_5->read_core_reg(target, r, i,
-					armv4_5_algorithm_info->core_mode);
+					arm_algorithm_info->core_mode);
 		context[i] = buf_get_u32(r->value, 0, 32);
 	}
 	cpsr = buf_get_u32(armv4_5->cpsr->value, 0, 32);
@@ -1114,7 +1114,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 		}
 	}
 
-	armv4_5->core_state = armv4_5_algorithm_info->core_state;
+	armv4_5->core_state = arm_algorithm_info->core_state;
 	if (armv4_5->core_state == ARM_STATE_ARM)
 		exit_breakpoint_size = 4;
 	else if (armv4_5->core_state == ARM_STATE_THUMB)
@@ -1125,12 +1125,12 @@ int armv4_5_run_algorithm_inner(struct target *target,
 		return ERROR_INVALID_ARGUMENTS;
 	}
 
-	if (armv4_5_algorithm_info->core_mode != ARM_MODE_ANY)
+	if (arm_algorithm_info->core_mode != ARM_MODE_ANY)
 	{
 		LOG_DEBUG("setting core_mode: 0x%2.2x",
-				armv4_5_algorithm_info->core_mode);
+				arm_algorithm_info->core_mode);
 		buf_set_u32(armv4_5->cpsr->value, 0, 5,
-				armv4_5_algorithm_info->core_mode);
+				arm_algorithm_info->core_mode);
 		armv4_5->cpsr->dirty = 1;
 		armv4_5->cpsr->valid = 1;
 	}
@@ -1193,13 +1193,13 @@ int armv4_5_run_algorithm_inner(struct target *target,
 	for (i = 0; i <= 16; i++)
 	{
 		uint32_t regvalue;
-		regvalue = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32);
+		regvalue = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, arm_algorithm_info->core_mode, i).value, 0, 32);
 		if (regvalue != context[i])
 		{
-			LOG_DEBUG("restoring register %s with value 0x%8.8" PRIx32 "", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]);
-			buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32, context[i]);
-			ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).valid = 1;
-			ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).dirty = 1;
+			LOG_DEBUG("restoring register %s with value 0x%8.8" PRIx32 "", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, arm_algorithm_info->core_mode, i).name, context[i]);
+			buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, arm_algorithm_info->core_mode, i).value, 0, 32, context[i]);
+			ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, arm_algorithm_info->core_mode, i).valid = 1;
+			ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, arm_algorithm_info->core_mode, i).dirty = 1;
 		}
 	}
 
@@ -1225,7 +1225,7 @@ int arm_checksum_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t *checksum)
 {
 	struct working_area *crc_algorithm;
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	struct reg_param reg_params[2];
 	int retval;
 	uint32_t i;
@@ -1320,7 +1320,7 @@ int arm_blank_check_memory(struct target *target,
 {
 	struct working_area *check_algorithm;
 	struct reg_param reg_params[3];
-	struct armv4_5_algorithm armv4_5_info;
+	struct arm_algorithm armv4_5_info;
 	int retval;
 	uint32_t i;
 
diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index b56a1f16..0b283013 100644
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -160,7 +160,7 @@ static inline bool is_arm(struct arm *arm)
 	return arm && arm->common_magic == ARM_COMMON_MAGIC;
 }
 
-struct armv4_5_algorithm
+struct arm_algorithm
 {
 	int common_magic;