Streamline Capture-IR handling and integrity test.

Change the handling of the "-ircapture" and "-irmask" parameters
to be slightly more sensible, given that the JTAG spec describes
what is required, and that we already require that conformance in
one place.  IR scan returns some bitstring with LSBs "01".

 - First, provide and use default values that satisfy the IEEE spec.
   Existing TAP configs will override the defaults, but those parms
   are no longer required.

 - Second, warn if any TAP gets set up to violate the JTAG spec.
   It's likely a bug, but maybe not; else this should be an error.
   Improve the related diagnostics to say which TAP is affected.

And associated minor fixes/cleanups to comments and diagnostics.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2758 b42882b7-edfa-0310-969c-e2dbd0fdcd60

1 files changed, 12 insertions, 10 deletions

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 35c1b0d3..e4609e40 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2309,19 +2309,9 @@ a JTAG TAP; that TAP should be named @code{sdma}.
 Every TAP requires at least the following @var{configparams}:
 
 @itemize @bullet
-@item @code{-ircapture} @var{NUMBER}
-@*The bit pattern loaded by the TAP into the JTAG shift register
-on entry to the @sc{ircapture} state, such as 0x01.
-JTAG requires the two LSBs of this value to be 01.
-The value is used to verify that instruction scans work correctly.
 @item @code{-irlen} @var{NUMBER}
 @*The length in bits of the
 instruction register, such as 4 or 5 bits.
-@item @code{-irmask} @var{NUMBER}
-@*A mask for the IR register.
-For some devices, there are bits in the IR that aren't used.
-This lets OpenOCD mask them off when doing IDCODE comparisons.
-In general, this should just be all ones for the size of the IR.
 @end itemize
 
 A TAP may also provide optional @var{configparams}:
@@ -2340,6 +2330,18 @@ found when the JTAG chain is examined.
 These codes are not required by all JTAG devices.
 @emph{Repeat the option} as many times as required if more than one
 ID code could appear (for example, multiple versions).
+@item @code{-ircapture} @var{NUMBER}
+@*The bit pattern loaded by the TAP into the JTAG shift register
+on entry to the @sc{ircapture} state, such as 0x01.
+JTAG requires the two LSBs of this value to be 01.
+By default, @code{-ircapture} and @code{-irmask} are set
+up to verify that two-bit value; but you may provide
+additional bits, if you know them.
+@item @code{-irmask} @var{NUMBER}
+@*A mask used with @code{-ircapture}
+to verify that instruction scans work correctly.
+Such scans are not used by OpenOCD except to verify that
+there seems to be no problems with JTAG scan chain operations.
 @end itemize
 @end deffn