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authorDavid Brownell <dbrownell@users.sourceforge.net>2010-12-24 18:50:41 -0800
committerDavid Brownell <db@helium.(none)>2010-12-24 18:50:41 -0800
commit7cd2617384f4ac620c468343c1f2009fbfa2fc79 (patch)
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initial SWD transport (SWD infrastructure #2)
This piggy backs on JTAG so it's not yet pretty, but that seems unavoidable so far given today's OpenOCD internals. SWD init and data transfer are unfinished and untested, but that should cause no regressions, and will be addressed by the time drivers start using this infrastructure. Checking in whould get the code working better sooner, and turn up any structural/architectural issues while they're easier to fix. The debug adapter drivers will provide simple SWD driver structs with methods that kick in as needed (instead of JTAG). So far just one adapter driver has been updated (not yet ready to use or circulate). The biggest issues are probably - fault handling, where the ARM Debug Interface V5 pipelining needs work in both JTAG and SWD modes and - missing rewrite of block I/O code to work on both of our Cortex-ready transports (Current code is hard-wired to JTAG); relates also to the pipelining issue. - omitted support to activate/deactivate SWO/SWV trace (this is technically trivial, but configuring what to trace is NOT. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> ---- doc/openocd.texi | 17 ++ src/jtag/core.c | 3 src/jtag/interface.h | 4 src/jtag/jtag.h | 2 src/jtag/swd.h | 114 +++++++++++++++++++ src/jtag/tcl.c | 2 src/target/adi_v5_swd.c | 281 ++++++++++++++++++++++++++++++++++++++++++++++-- src/target/arm_adi_v5.c | 8 + src/target/arm_adi_v5.h | 3 9 files changed, 425 insertions(+), 9 deletions(-)
Diffstat (limited to 'doc')
-rw-r--r--doc/openocd.texi17
1 files changed, 17 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi
index a65244a6..8ee328bd 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2462,6 +2462,7 @@ No arguments: print status.
@end deffn
@section Transport Configuration
+@cindex Transport
As noted earlier, depending on the version of OpenOCD you use,
and the debug adapter you are using,
several transports may be available to
@@ -2479,6 +2480,7 @@ No arguments: returns name of session's selected transport.
@end deffn
@subsection JTAG Transport
+@cindex JTAG
JTAG is the original transport supported by OpenOCD, and most
of the OpenOCD commands support it.
JTAG transports expose a chain of one or more Test Access Points (TAPs),
@@ -2486,13 +2488,28 @@ each of which must be explicitly declared.
JTAG supports both debugging and boundary scan testing.
Flash programming support is built on top of debug support.
@subsection SWD Transport
+@cindex SWD
+@cindex Serial Wire Debug
SWD (Serial Wire Debug) is an ARM-specific transport which exposes one
Debug Access Point (DAP, which must be explicitly declared.
(SWD uses fewer signal wires than JTAG.)
SWD is debug-oriented, and does not support boundary scan testing.
Flash programming support is built on top of debug support.
(Some processors support both JTAG and SWD.)
+@deffn Command {swd newdap} ...
+Declares a single DAP which uses SWD transport.
+Parameters are currently the same as "jtag newtap" but this is
+expected to change.
+@end deffn
+@deffn Command {swd wcr trn prescale}
+Updates TRN (turnaraound delay) and prescaling.fields of the
+Wire Control Register (WCR).
+No parameters: displays current settings.
+@end deffn
+
@subsection SPI Transport
+@cindex SPI
+@cindex Serial Peripheral Interface
The Serial Peripheral Interface (SPI) is a general purpose transport
which uses four wire signaling. Some processors use it as part of a
solution for flash programming.