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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-12-27 12:16:55 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-12-27 12:16:55 -0800
commit3ace333663628d00795fd0b5ab80c91e6025b4dc (patch)
tree0d466dfa71d9484e9856cf7c79c7b96833878cde /src/flash/nand
parent155a6a2c0bacdd4752e944ffd579d441361883db (diff)
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create tcl/board/dm365evm.cfg
This config is only lightly tested, and doesn't work well yet; but it's a start. * Notably missing is PLL configuration, since each DaVinci does that just a bit differently; and thus DDR2 setup. * The SRST workaround needed for the goof in the CPLD's VHDL depends on at least the not-yet-merged patch letting ARM9 (and ARM7) chips perform resets that don't use SRST. So this isn't yet suitable for debugging U-Boot. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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