diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:28:53 -0800 |
---|---|---|
committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:28:53 -0800 |
commit | ce1feaa7322affd3b979c9fe93dd8f7462ea9eca (patch) | |
tree | 60758943030509a05a6dba71e554c8a019243b7f /src/flash/nor/at91sam7.h | |
parent | b853b9dbc0ba3d68a501d8badc4491f8108cd11b (diff) | |
download | openocd+libswd-ce1feaa7322affd3b979c9fe93dd8f7462ea9eca.tar.gz openocd+libswd-ce1feaa7322affd3b979c9fe93dd8f7462ea9eca.tar.bz2 openocd+libswd-ce1feaa7322affd3b979c9fe93dd8f7462ea9eca.tar.xz openocd+libswd-ce1feaa7322affd3b979c9fe93dd8f7462ea9eca.zip |
ARMv7-M: start using "struct arm"
This sets up a few of the core "struct arm" data structures so they
can be used with ARMv7-M cores. Specifically, it:
- defines new ARM core_modes to match the microcontroller modes
(e.g. HANDLER not IRQ, and two types of thread mode);
- Establishes a new microcontroller "core_type", which can be
used to make sure v7-M (and v6-M) cores are handled right;
- adds "struct arm" to "struct armv7m" and arranges for the
target_to_armv7m() converter to use it;
- sets up the arm.core_cache and arm.cpsr values
- makes the Cortex-M3 code maintain arm.map and arm.core_mode.
This is currently set up as a parallel data structure, primarily to
minimize special cases for the semihosting support with microcontroller
profile cores.
Later patches can rip out the duplicative ARMv7-M support and start
reusing core ARM code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/flash/nor/at91sam7.h')
0 files changed, 0 insertions, 0 deletions