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authorThomas Schmid <thomas.schmid@gmail.com>2011-01-25 08:15:30 -0800
committerSpencer Oliver <ntfreak@users.sourceforge.net>2011-01-26 12:38:27 +0000
commit4df93cb95fd6ba7b8272b36ea7445657bbb66338 (patch)
tree2bca9730a013dcdf2f9a9eef3cb47785a9bef7be /src/flash/nor
parent9629adcbde2bfac67296ad954c2233f725e1570e (diff)
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Fixed small mistakes in at91sam3 info command
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/flash/nor')
-rw-r--r--src/flash/nor/at91sam3.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 0915ba70..f895935f 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -1464,7 +1464,7 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
LOG_USER("(main osc bypass: %s)",
_yes_or_no(v));
- rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 2, 1);
+ rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1);
LOG_USER("(onchip RC-OSC enabled: %s)",
_yes_or_no(rcen));
v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
@@ -1476,6 +1476,7 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
switch (v) {
default:
pChip->cfg.rc_freq = 0;
+ break;
case 0:
pChip->cfg.rc_freq = 4 * 1000 * 1000;
break;
@@ -1628,6 +1629,7 @@ sam3_explain_mckr(struct sam3_chip *pChip)
case 0:
pdiv = 1;
cp = "selected clock";
+ break;
case 1:
pdiv = 2;
cp = "clock/2";