summaryrefslogtreecommitdiff
path: root/src/flash/ocl/at91sam7x
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-19 19:03:02 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-19 19:03:02 -0800
commitd7760352e8044e8eb8cd9b381574e34093e1f26f (patch)
tree0261aca075d8918e7b86d23efbc95af1e2fe8b5f /src/flash/ocl/at91sam7x
parent71cde5e359f273585880ea8986709b950ba85b08 (diff)
downloadopenocd+libswd-d7760352e8044e8eb8cd9b381574e34093e1f26f.tar.gz
openocd+libswd-d7760352e8044e8eb8cd9b381574e34093e1f26f.tar.bz2
openocd+libswd-d7760352e8044e8eb8cd9b381574e34093e1f26f.tar.xz
openocd+libswd-d7760352e8044e8eb8cd9b381574e34093e1f26f.zip
Cortex-A8: mode support
We *should* be able to read and write registers in any core mode, instead of being stuck with whatever mode the core was when we entered debug state. This patch makes them work. Note that the current restore_context() only handles the current mode; writing to other-mode registers is a NOP without a followup patch fixing that. Also, that SPSR access needed some bugfixes; it was confused with CPSR. Secure monitor mode also seems dubious; there's probably more to be done before that's sufficiently understood by the debugger. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/flash/ocl/at91sam7x')
0 files changed, 0 insertions, 0 deletions