- add support for the majority of the Samsung ARM SoC family, S3C2410, S3C2412, S3C2413, S3C2440 and S3C2443 (thanks to Ben Dooks for this patch)

git-svn-id: svn://svn.berlios.de/openocd/trunk@311 b42882b7-edfa-0310-969c-e2dbd0fdcd60

1 files changed, 133 insertions, 0 deletions

diff --git a/src/flash/s3c24xx_nand.c b/src/flash/s3c24xx_nand.c
new file mode 100644
index 00000000..6bde224f
--- /dev/null
+++ b/src/flash/s3c24xx_nand.c
@@ -0,0 +1,133 @@
+/* src/flash/s3c24xx_nand.c
+ *
+ * S3C24XX Series OpenOCD NAND Flash controller support.
+ *
+ * Copyright 2007,2008 Ben Dooks <ben@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Many thanks to Simtec Electronics for sponsoring this work.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+#include "log.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "nand.h"
+#include "s3c24xx_nand.h"
+#include "target.h"
+
+s3c24xx_nand_controller_t *
+s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+			    char **args, int argc,
+			    struct nand_device_s *device)
+{
+	s3c24xx_nand_controller_t *s3c24xx_info;
+	
+	s3c24xx_info = malloc(sizeof(s3c24xx_nand_controller_t));
+	if (s3c24xx_info == NULL) {
+		ERROR("no memory for nand controller\n");
+		return NULL;
+	}
+
+	device->controller_priv = s3c24xx_info;
+
+	s3c24xx_info->target = get_target_by_num(strtoul(args[1], NULL, 0));
+	if (s3c24xx_info->target == NULL) {
+		ERROR("no target '%s' configured", args[1]);
+		return NULL;
+	}
+		
+	return s3c24xx_info;
+}
+
+int s3c24xx_register_commands(struct command_context_s *cmd_ctx)
+{
+	return ERROR_OK;
+}
+
+int s3c24xx_reset(struct nand_device_s *device)
+{
+	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+	target_t *target = s3c24xx_info->target;
+
+	if (target->state != TARGET_HALTED) {
+		ERROR("target must be halted to use S3C24XX NAND flash controller");
+		return ERROR_NAND_OPERATION_FAILED;
+	}
+	
+	target_write_u32(target, s3c24xx_info->cmd, 0xff);
+	
+	return ERROR_OK;
+}
+
+int s3c24xx_command(struct nand_device_s *device, u8 command)
+{
+	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+	target_t *target = s3c24xx_info->target;
+	
+	if (target->state != TARGET_HALTED) {
+		ERROR("target must be halted to use S3C24XX NAND flash controller");
+		return ERROR_NAND_OPERATION_FAILED;
+	}
+
+	target_write_u16(target, s3c24xx_info->cmd, command);
+	return ERROR_OK;
+}
+
+
+int s3c24xx_address(struct nand_device_s *device, u8 address)
+{
+	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+	target_t *target = s3c24xx_info->target;
+	
+	if (target->state != TARGET_HALTED) {
+		ERROR("target must be halted to use S3C24XX NAND flash controller");
+		return ERROR_NAND_OPERATION_FAILED;
+	}
+	
+	target_write_u16(target, s3c24xx_info->addr, address);
+	return ERROR_OK;
+}
+
+int s3c24xx_write_data(struct nand_device_s *device, u16 data)
+{
+	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+	target_t *target = s3c24xx_info->target;
+
+	if (target->state != TARGET_HALTED) {
+		ERROR("target must be halted to use S3C24XX NAND flash controller");
+		return ERROR_NAND_OPERATION_FAILED;
+	}
+	
+	target_write_u8(target, s3c24xx_info->data, data);
+	return ERROR_OK;
+}
+
+int s3c24xx_read_data(struct nand_device_s *device, void *data)
+{
+	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+	target_t *target = s3c24xx_info->target;
+	
+	if (target->state != TARGET_HALTED) {
+		ERROR("target must be halted to use S3C24XX NAND flash controller");
+		return ERROR_NAND_OPERATION_FAILED;
+	}
+
+	target_read_u8(target, s3c24xx_info->data, data);
+	return ERROR_OK;
+}
+
+int s3c24xx_controller_ready(struct nand_device_s *device, int timeout)
+{
+	return 1;
+}