- remove target specific variant and use target->variant member

- fix build warning in cortex_m3
- code cleanup - remove trailing lf and convert c++ comments

git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60

16 files changed, 338 insertions, 371 deletions

diff --git a/src/flash/cfi.h b/src/flash/cfi.h
index 3e3e6fe5..ae6ae28e 100644
--- a/src/flash/cfi.h
+++ b/src/flash/cfi.h
@@ -148,10 +148,10 @@ typedef struct cfi_fixup_s
 } cfi_fixup_t;
 
 #define CFI_MFR_AMD		0x0001
-#define CFI_MFR_FUJITSU		0x0004
+#define CFI_MFR_FUJITSU	0x0004
 #define CFI_MFR_ATMEL	0x001F
 #define CFI_MFR_ST		0x0020	/* STMicroelectronics */
-#define CFI_MFR_AMIC		0x0037
+#define CFI_MFR_AMIC	0x0037
 #define CFI_MFR_SST		0x00BF
 #define CFI_MFR_MX		0x00C2
 
diff --git a/src/flash/ecos.c b/src/flash/ecos.c
index 452e86cb..6b8637c5 100644
--- a/src/flash/ecos.c
+++ b/src/flash/ecos.c
@@ -25,7 +25,6 @@
 
 #include "replacements.h"
 
-
 #include "flash.h"
 
 #include "target.h"
@@ -37,8 +36,6 @@
 #include "../target/embeddedice.h"
 #include "types.h"
 
-
-
 int ecosflash_register_commands(struct command_context_s *cmd_ctx);
 int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
 int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
@@ -99,42 +96,41 @@ flash_errmsg(int err);
 #define FLASH_ERR_DRV_WRONG_PART  0x0d  /* Driver does not support device */
 #define FLASH_ERR_LOW_VOLTAGE     0x0e  /* Not enough juice to complete job */
 
-
 char *
 flash_errmsg(int err)
 {
-    switch (err) {
-    case FLASH_ERR_OK:
-        return "No error - operation complete";
-    case FLASH_ERR_ERASE_SUSPEND:
-        return "Device is in erase suspend state";
-    case FLASH_ERR_PROGRAM_SUSPEND:
-        return "Device is in program suspend state";
-    case FLASH_ERR_INVALID:
-        return "Invalid FLASH address";
-    case FLASH_ERR_ERASE:
-        return "Error trying to erase";
-    case FLASH_ERR_LOCK:
-        return "Error trying to lock/unlock";
-    case FLASH_ERR_PROGRAM:
-        return "Error trying to program";
-    case FLASH_ERR_PROTOCOL:
-        return "Generic error";
-    case FLASH_ERR_PROTECT:
-        return "Device/region is write-protected";
-    case FLASH_ERR_NOT_INIT:
-        return "FLASH sub-system not initialized";
-    case FLASH_ERR_DRV_VERIFY:
-        return "Data verify failed after operation";
-    case FLASH_ERR_DRV_TIMEOUT:
-        return "Driver timed out waiting for device";
-    case FLASH_ERR_DRV_WRONG_PART:
-        return "Driver does not support device";
-    case FLASH_ERR_LOW_VOLTAGE:
-        return "Device reports low voltage";
-    default:
-        return "Unknown error";
-    }
+	switch (err) {
+	case FLASH_ERR_OK:
+		return "No error - operation complete";
+	case FLASH_ERR_ERASE_SUSPEND:
+		return "Device is in erase suspend state";
+	case FLASH_ERR_PROGRAM_SUSPEND:
+		return "Device is in program suspend state";
+	case FLASH_ERR_INVALID:
+		return "Invalid FLASH address";
+	case FLASH_ERR_ERASE:
+		return "Error trying to erase";
+	case FLASH_ERR_LOCK:
+		return "Error trying to lock/unlock";
+	case FLASH_ERR_PROGRAM:
+		return "Error trying to program";
+	case FLASH_ERR_PROTOCOL:
+		return "Generic error";
+	case FLASH_ERR_PROTECT:
+		return "Device/region is write-protected";
+	case FLASH_ERR_NOT_INIT:
+		return "FLASH sub-system not initialized";
+	case FLASH_ERR_DRV_VERIFY:
+		return "Data verify failed after operation";
+	case FLASH_ERR_DRV_TIMEOUT:
+		return "Driver timed out waiting for device";
+	case FLASH_ERR_DRV_WRONG_PART:
+		return "Driver does not support device";
+	case FLASH_ERR_LOW_VOLTAGE:
+		return "Device reports low voltage";
+	default:
+		return "Unknown error";
+	}
 }
 #endif
 
@@ -185,7 +181,6 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c
 	return ERROR_OK;
 }
 
-
 int loadDriver(ecosflash_flash_bank_t *info)
 {
 	u32 buf_cnt;
@@ -228,7 +223,6 @@ int loadDriver(ecosflash_flash_bank_t *info)
 	return ERROR_OK;
 }
 
-
 static int const OFFSET_ERASE=0x0;
 static int const OFFSET_ERASE_SIZE=0x8;
 static int const OFFSET_FLASH=0xc;
@@ -236,7 +230,6 @@ static int const OFFSET_FLASH_SIZE=0x8;
 static int const OFFSET_GET_WORKAREA=0x18;
 static int const OFFSET_GET_WORKAREA_SIZE=0x4;
 
-
 int runCode(ecosflash_flash_bank_t *info,
 		u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2,
 		u32 *result,
@@ -334,8 +327,8 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l
 
 
 	int i;
-    for (i=0; i<len; i+=chunk)
-    {
+	for (i=0; i<len; i+=chunk)
+	{
 		int t=len-i;
 		if (t>chunk)
 		{
@@ -343,38 +336,36 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l
 		}
 
 		int retval;
-    	retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i);
-    	if (retval != ERROR_OK)
-    		return retval;
-
-    	u32 flashErr;
-    	retval=runCode(info,
-    			info->start_address+OFFSET_FLASH,
-    			info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE,
-    			buffer,
-    			address+i,
-    			t,
-    			&flashErr,
-    			timeout);
-    	if (retval != ERROR_OK)
-    		return retval;
+		retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i);
+		if (retval != ERROR_OK)
+			return retval;
+
+		u32 flashErr;
+		retval=runCode(info,
+				info->start_address+OFFSET_FLASH,
+				info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE,
+				buffer,
+				address+i,
+				t,
+				&flashErr,
+				timeout);
+		if (retval != ERROR_OK)
+			return retval;
 
 		if (flashErr != 0x0)
 		{
 			LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr));
 			return ERROR_FAIL;
 		}
-    }
+	}
 	return ERROR_OK;
 }
 
-
 int ecosflash_probe(struct flash_bank_s *bank)
 {
 	return ERROR_OK;
 }
 
-
 int ecosflash_register_commands(struct command_context_s *cmd_ctx)
 {
 	register_command(cmd_ctx, NULL, "ecosflash", NULL, COMMAND_ANY, NULL);
@@ -382,7 +373,7 @@ int ecosflash_register_commands(struct command_context_s *cmd_ctx)
 	return ERROR_OK;
 }
 
-/*
+#if 0
 static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
 {
 	ecosflash_flash_bank_t *info = bank->driver_priv;
@@ -403,7 +394,7 @@ static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
 		}
 	}
 }
-*/
+#endif
 
 u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
 {
@@ -421,7 +412,6 @@ u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
 	return retval + bank->base;
 }
 
-
 int ecosflash_erase(struct flash_bank_s *bank, int first, int last)
 {
 	struct flash_bank_s *c=bank;
@@ -434,7 +424,6 @@ int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last)
 	return ERROR_OK;
 }
 
-
 int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 {
 	ecosflash_flash_bank_t *info = bank->driver_priv;
@@ -442,7 +431,6 @@ int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
 	return eCosBoard_flash(info, buffer, c->base+offset, count);
 }
 
-
 int ecosflash_protect_check(struct flash_bank_s *bank)
 {
 	return ERROR_OK;
@@ -455,7 +443,6 @@ int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size)
 	return ERROR_OK;
 }
 
-
 u32 ecosflash_get_flash_status(flash_bank_t *bank)
 {
 	return ERROR_OK;
@@ -475,7 +462,3 @@ int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd,
 {
 	return ERROR_OK;
 }
-
-
-
-
diff --git a/src/flash/flash.c b/src/flash/flash.c
index e3e9365e..c5cf757f 100644
--- a/src/flash/flash.c
+++ b/src/flash/flash.c
@@ -466,7 +466,6 @@ int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cm
 						j, p->sectors[j].offset, p->sectors[j].size, p->sectors[j].size>>10,
 						erase_state);
 		}
-
 	}
 
 	return ERROR_OK;
@@ -658,7 +657,6 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm
 		command_print(cmd_ctx, "auto erase enabled");
 	}
 
-
 	if (argc < 1)
 	{
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -743,7 +741,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char
 	if(count == 0)
 		return ERROR_OK;
 
-
 	switch(cmd[4])
 	{
 	case 'w':
@@ -804,7 +801,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char
 		return retval;
 	}
 
-
 	if(err == ERROR_OK)
 	{
 		float speed;
diff --git a/src/flash/lpc2000.c b/src/flash/lpc2000.c
index 830e380a..ea8c5b69 100644
--- a/src/flash/lpc2000.c
+++ b/src/flash/lpc2000.c
@@ -577,7 +577,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 			break;
 		
 		if (bytes_remaining >= thisrun_bytes)
-		{                      
+		{
 			if ((retval = target_write_buffer(bank->target, download_area->address, thisrun_bytes, buffer + bytes_written)) != ERROR_OK)
 			{
 				retval = ERROR_FLASH_OPERATION_FAILED;
diff --git a/src/flash/lpc288x.c b/src/flash/lpc288x.c
index 8c438f8e..a0becf5b 100644
--- a/src/flash/lpc288x.c
+++ b/src/flash/lpc288x.c
@@ -126,7 +126,6 @@ flash_driver_t lpc288x_flash =
 	.info = lpc288x_info
 };
 
-
 int lpc288x_register_commands(struct command_context_s *cmd_ctx)
 {
 	return ERROR_OK;
@@ -204,7 +203,7 @@ int lpc288x_read_part_info(struct flash_bank_s *bank)
 
 int lpc288x_protect_check(struct flash_bank_s *bank)
 {
-    return ERROR_OK;
+	return ERROR_OK;
 }
 
 /* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */
diff --git a/src/flash/lpc3180_nand_controller.c b/src/flash/lpc3180_nand_controller.c
index 8c7b6cbc..7bcbeee0 100644
--- a/src/flash/lpc3180_nand_controller.c
+++ b/src/flash/lpc3180_nand_controller.c
@@ -69,7 +69,7 @@ nand_flash_controller_t lpc3180_nand_controller =
 int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device)
 {
 	lpc3180_nand_controller_t *lpc3180_info;
-		
+	
 	if (argc < 3)
 	{
 		LOG_WARNING("incomplete 'lpc3180' nand flash configuration");
@@ -126,7 +126,7 @@ int lpc3180_pll(int fclkin, u32 pll_ctrl)
 	
 	if (bypass && !direct)	/* bypass mode */
 		return fclkin / (2 * p);
-		
+	
 	if (bypass & direct)	/* direct bypass mode */
 		return fclkin;
 	
@@ -273,7 +273,7 @@ int lpc3180_init(struct nand_device_s *device)
 		trhz = ((30 / cycle) + 1);
 		trbwb = ((100 / cycle) + 1);
 		tcea = ((45 / cycle) + 1);
-				
+		
 		/* MLC_LOCK = 0xa25e (unlock protected registers) */
 		target_write_u32(target, 0x200b8044, 0xa25e);
 	
diff --git a/src/flash/mflash.c b/src/flash/mflash.c
index 9bc94adf..340a9f56 100644
--- a/src/flash/mflash.c
+++ b/src/flash/mflash.c
@@ -80,7 +80,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio)
 	target_t *target = mflash_bank->target;
 	int ret;
 
-	// remove alternate function.
+	/* remove alternate function. */
 	mask = 0x3u << (gpio.num & 0xF)*2;
 
 	addr = PXA270_GAFR0_L + (gpio.num >> 4) * 4;
@@ -95,7 +95,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio)
 	if ((ret = target_write_u32(target, addr, value)) != ERROR_OK)
 		return ret;
 
-	// set direction to output
+	/* set direction to output */
 	mask = 0x1u << (gpio.num & 0x1F);
 
 	addr = PXA270_GPDR0 + (gpio.num >> 5) * 4;
@@ -261,75 +261,75 @@ static int mg_dsk_wait(mg_io_type_wait wait, u32 time)
 
 	duration_start_measure(&duration);
 
-    while (time) {
-
-    	target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status);
-
-    	if (status & mg_io_rbit_status_busy)
-	    {
-    		if (wait == mg_io_wait_bsy)
-	               return ERROR_OK;
-	    } else {
-	        switch(wait)
-	        {
-	            case mg_io_wait_not_bsy:
-	                return ERROR_OK;
-	            case mg_io_wait_rdy_noerr:
-	                if (status & mg_io_rbit_status_ready)
-	                    return ERROR_OK;
-	                break;
-	            case mg_io_wait_drq_noerr:
-	                if (status & mg_io_rbit_status_data_req)
-	                    return ERROR_OK;
-	                break;
-	            default:
-	                break;
-	        }
-
-	        // Now we check the error condition!
-	        if (status & mg_io_rbit_status_error)
-	        {
-	            target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error);
-
-                if (error & mg_io_rbit_err_bad_sect_num) {
-                	LOG_ERROR("sector not found");
-                    return ERROR_FAIL;
-                }
-                else if (error & (mg_io_rbit_err_bad_block | mg_io_rbit_err_uncorrectable)) {
-                	LOG_ERROR("bad block");
-                    return ERROR_FAIL;
-                } else {
-                	LOG_ERROR("disk operation fail");
-	                return ERROR_FAIL;
-	            }
-	        }
-
-	        switch (wait)
-	        {
-	            case mg_io_wait_rdy:
-	                if (status & mg_io_rbit_status_ready)
-	                    return ERROR_OK;
-
-	            case mg_io_wait_drq:
-	                if (status & mg_io_rbit_status_data_req)
-	                    return ERROR_OK;
-
-	            default:
-	            	break;
-	        }
-	    }
-
-    	duration_stop_measure(&duration, NULL);
-
-  		t=duration.duration.tv_usec/1000;
-   		t+=duration.duration.tv_sec*1000;
+	while (time) {
+
+		target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status);
+
+		if (status & mg_io_rbit_status_busy)
+		{
+			if (wait == mg_io_wait_bsy)
+				return ERROR_OK;
+		} else {
+			switch(wait)
+			{
+				case mg_io_wait_not_bsy:
+					return ERROR_OK;
+				case mg_io_wait_rdy_noerr:
+					if (status & mg_io_rbit_status_ready)
+						return ERROR_OK;
+					break;
+				case mg_io_wait_drq_noerr:
+					if (status & mg_io_rbit_status_data_req)
+						return ERROR_OK;
+					break;
+				default:
+					break;
+			}
+
+			/* Now we check the error condition! */
+			if (status & mg_io_rbit_status_error)
+			{
+				target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error);
+
+				if (error & mg_io_rbit_err_bad_sect_num) {
+					LOG_ERROR("sector not found");
+					return ERROR_FAIL;
+				}
+				else if (error & (mg_io_rbit_err_bad_block | mg_io_rbit_err_uncorrectable)) {
+					LOG_ERROR("bad block");
+					return ERROR_FAIL;
+				} else {
+					LOG_ERROR("disk operation fail");
+					return ERROR_FAIL;
+				}
+			}
+
+			switch (wait)
+			{
+				case mg_io_wait_rdy:
+					if (status & mg_io_rbit_status_ready)
+						return ERROR_OK;
+
+				case mg_io_wait_drq:
+					if (status & mg_io_rbit_status_data_req)
+						return ERROR_OK;
+
+				default:
+					break;
+			}
+		}
+
+		duration_stop_measure(&duration, NULL);
+
+		t=duration.duration.tv_usec/1000;
+		t+=duration.duration.tv_sec*1000;
 
 		if (t > time)
-            break;
-    }
+			break;
+	}
 
-    LOG_ERROR("timeout occured");
-    return ERROR_FAIL;
+	LOG_ERROR("timeout occured");
+	return ERROR_FAIL;
 }
 
 static int mg_dsk_srst(u8 on)
@@ -634,7 +634,6 @@ static int mg_mflash_read (u32 addr, u8 *buff, u32 len)
 			LOG_DEBUG("copies %u byte", end_addr - cur_addr);
 
 		}
-
 	}
 
 	free(sect_buff);
@@ -671,7 +670,6 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len)
 		}
 
 		mg_mflash_write_sects(sect_buff, sect_num, 1);
-
 	}
 
 	if (cur_addr < end_addr) {
@@ -697,9 +695,7 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len)
 			memcpy(sect_buff, buff_ptr, end_addr - cur_addr);
 			LOG_DEBUG("copies %u byte", end_addr - cur_addr);
 			mg_mflash_write_sects(sect_buff, sect_num, 1);
-
 		}
-
 	}
 
 	free(sect_buff);
@@ -711,7 +707,7 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch
 {
 	u32 address, buf_cnt;
 	u8 *buffer;
-	// TODO : multi-bank support, large file support
+	/* TODO : multi-bank support, large file support */
 	fileio_t fileio;
 	duration_t duration;
 	char *duration_text;
@@ -727,7 +723,6 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch
 		mg_mflash_probe();
 	}
 
-
 	if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) {
 		return ERROR_FAIL;
 	}
@@ -764,7 +759,7 @@ static int mflash_dump_command(struct command_context_s *cmd_ctx, char *cmd, cha
 {
 	u32 address, size_written, size;
 	u8 *buffer;
-	// TODO : multi-bank support
+	/* TODO : multi-bank support */
 	fileio_t fileio;
 	duration_t duration;
 	char *duration_text;
diff --git a/src/flash/mflash.h b/src/flash/mflash.h
index 7e7e7c64..4f9e0a00 100644
--- a/src/flash/mflash.h
+++ b/src/flash/mflash.h
@@ -39,79 +39,79 @@ typedef struct mflash_gpio_drv_s
 
 typedef struct _mg_io_type_drv_info {
 
-    mg_io_uint16 general_configuration;            // 00
-    mg_io_uint16 number_of_cylinders;               // 01
-    mg_io_uint16 reserved1;                       // 02
-    mg_io_uint16 number_of_heads;                   // 03
-    mg_io_uint16 unformatted_bytes_per_track;        // 04
-    mg_io_uint16 unformatted_bytes_per_sector;       // 05
-    mg_io_uint16 sectors_per_track;                 // 06
-    mg_io_uint8  vendor_unique1[6];                // 07/08/09
-
-    mg_io_uint8  serial_number[20];                // 10~19
-
-    mg_io_uint16 buffer_type;                      // 20
-    mg_io_uint16 buffer_sector_size;                // 21
-    mg_io_uint16 number_of_ecc_bytes;                // 22
-
-    mg_io_uint8  firmware_revision[8];             // 23~26
-    mg_io_uint8  model_number[40];                 // 27
-
-    mg_io_uint8  maximum_block_transfer;            // 47 low byte
-    mg_io_uint8  vendor_unique2;                   // 47 high byte
-    mg_io_uint16 dword_io;                    // 48
-
-    mg_io_uint16 capabilities;                    // 49
-    mg_io_uint16 reserved2;                       // 50
-
-    mg_io_uint8  vendor_unique3;                   // 51 low byte
-    mg_io_uint8  pio_cycle_timing_mode;              // 51 high byte
-    mg_io_uint8  vendor_unique4;                   // 52 low byte
-    mg_io_uint8  dma_cycle_timing_mode;              // 52 high byte
-    mg_io_uint16 translation_fields_valid;          // 53 (low bit)
-    mg_io_uint16 number_of_current_cylinders;        // 54
-    mg_io_uint16 number_of_current_heads;            // 55
-    mg_io_uint16 current_sectors_per_track;          // 56
-    mg_io_uint16 current_sector_capacity_lo;      // 57 & 58
-    mg_io_uint16 current_sector_capacity_hi;     // 57 & 58
-    mg_io_uint8  multi_sector_count;                // 59 low
-    mg_io_uint8  multi_sector_setting_valid;         // 59 high (low bit)
-
-    mg_io_uint16 total_user_addressable_sectors_lo;     // 60 & 61
-    mg_io_uint16 total_user_addressable_sectors_hi;     // 60 & 61
-
-    mg_io_uint8  single_dma_modes_supported;         // 62 low byte
-    mg_io_uint8  single_dma_transfer_active;         // 62 high byte
-    mg_io_uint8  multi_dma_modes_supported;          // 63 low byte
-    mg_io_uint8  multi_dma_transfer_active;          // 63 high byte
-    mg_io_uint16 adv_pio_mode;
-    mg_io_uint16 min_dma_cyc;
-    mg_io_uint16 recommend_dma_cyc;
-    mg_io_uint16 min_pio_cyc_no_iordy;
-    mg_io_uint16 min_pio_cyc_with_iordy;
-    mg_io_uint8  reserved3[22];
-    mg_io_uint16 major_ver_num;
-    mg_io_uint16 minor_ver_num;
-    mg_io_uint16 feature_cmd_set_suprt0;
-    mg_io_uint16 feature_cmd_set_suprt1;
-    mg_io_uint16 feature_cmd_set_suprt2;
-    mg_io_uint16 feature_cmd_set_en0;
-    mg_io_uint16 feature_cmd_set_en1;
-    mg_io_uint16 feature_cmd_set_en2;
-    mg_io_uint16 reserved4;
-    mg_io_uint16 req_time_for_security_er_done;
-    mg_io_uint16 req_time_for_enhan_security_er_done;
-    mg_io_uint16 adv_pwr_mgm_lvl_val;
-    mg_io_uint16 reserved5;
-    mg_io_uint16 re_of_hw_rst;
-    mg_io_uint8  reserved6[68];
-    mg_io_uint16 security_stas;
-    mg_io_uint8  vendor_uniq_bytes[62];
-    mg_io_uint16 cfa_pwr_mode;
-    mg_io_uint8  reserved7[186];
-
-    mg_io_uint16 scts_per_secure_data_unit;
-    mg_io_uint16 integrity_word;
+	mg_io_uint16 general_configuration;				/* 00 */
+	mg_io_uint16 number_of_cylinders;				/* 01 */
+	mg_io_uint16 reserved1;							/* 02 */
+	mg_io_uint16 number_of_heads;					/* 03 */
+	mg_io_uint16 unformatted_bytes_per_track;		/* 04 */
+	mg_io_uint16 unformatted_bytes_per_sector;		/* 05 */
+	mg_io_uint16 sectors_per_track;					/* 06 */
+	mg_io_uint8  vendor_unique1[6];					/* 07/08/09 */
+
+	mg_io_uint8  serial_number[20];					/* 10~19 */
+
+	mg_io_uint16 buffer_type;						/* 20 */
+	mg_io_uint16 buffer_sector_size;				/* 21 */
+	mg_io_uint16 number_of_ecc_bytes;				/* 22 */
+
+	mg_io_uint8  firmware_revision[8];				/* 23~26 */
+	mg_io_uint8  model_number[40];					/* 27 */
+
+	mg_io_uint8  maximum_block_transfer;			/* 47 low byte */
+	mg_io_uint8  vendor_unique2;					/* 47 high byte */
+	mg_io_uint16 dword_io;							/* 48 */
+
+	mg_io_uint16 capabilities;						/* 49 */
+	mg_io_uint16 reserved2;							/* 50 */
+
+	mg_io_uint8  vendor_unique3;					/* 51 low byte */
+	mg_io_uint8  pio_cycle_timing_mode;				/* 51 high byte */
+	mg_io_uint8  vendor_unique4;					/* 52 low byte */
+	mg_io_uint8  dma_cycle_timing_mode;				/* 52 high byte */
+	mg_io_uint16 translation_fields_valid;			/* 53 (low bit) */
+	mg_io_uint16 number_of_current_cylinders;		/* 54 */
+	mg_io_uint16 number_of_current_heads;			/* 55 */
+	mg_io_uint16 current_sectors_per_track;			/* 56 */
+	mg_io_uint16 current_sector_capacity_lo;		/* 57 & 58 */
+	mg_io_uint16 current_sector_capacity_hi;		/* 57 & 58 */
+	mg_io_uint8  multi_sector_count;				/* 59 low */
+	mg_io_uint8  multi_sector_setting_valid;		/* 59 high (low bit) */
+
+	mg_io_uint16 total_user_addressable_sectors_lo;	/* 60 & 61 */
+	mg_io_uint16 total_user_addressable_sectors_hi;	/* 60 & 61 */
+
+	mg_io_uint8  single_dma_modes_supported;		/* 62 low byte */
+	mg_io_uint8  single_dma_transfer_active;		/* 62 high byte */
+	mg_io_uint8  multi_dma_modes_supported;			/* 63 low byte */
+	mg_io_uint8  multi_dma_transfer_active;			/* 63 high byte */
+	mg_io_uint16 adv_pio_mode;
+	mg_io_uint16 min_dma_cyc;
+	mg_io_uint16 recommend_dma_cyc;
+	mg_io_uint16 min_pio_cyc_no_iordy;
+	mg_io_uint16 min_pio_cyc_with_iordy;
+	mg_io_uint8  reserved3[22];
+	mg_io_uint16 major_ver_num;
+	mg_io_uint16 minor_ver_num;
+	mg_io_uint16 feature_cmd_set_suprt0;
+	mg_io_uint16 feature_cmd_set_suprt1;
+	mg_io_uint16 feature_cmd_set_suprt2;
+	mg_io_uint16 feature_cmd_set_en0;
+	mg_io_uint16 feature_cmd_set_en1;
+	mg_io_uint16 feature_cmd_set_en2;
+	mg_io_uint16 reserved4;
+	mg_io_uint16 req_time_for_security_er_done;
+	mg_io_uint16 req_time_for_enhan_security_er_done;
+	mg_io_uint16 adv_pwr_mgm_lvl_val;
+	mg_io_uint16 reserved5;
+	mg_io_uint16 re_of_hw_rst;
+	mg_io_uint8  reserved6[68];
+	mg_io_uint16 security_stas;
+	mg_io_uint8  vendor_uniq_bytes[62];
+	mg_io_uint16 cfa_pwr_mode;
+	mg_io_uint8  reserved7[186];
+
+	mg_io_uint16 scts_per_secure_data_unit;
+	mg_io_uint16 integrity_word;
 
 } mg_io_type_drv_info;
 
@@ -140,105 +140,105 @@ typedef struct mflash_bank_s
 extern int mflash_register_commands(struct command_context_s *cmd_ctx);
 extern int mflash_init_drivers(struct command_context_s *cmd_ctx);
 
-#define MG_MFLASH_SECTOR_SIZE       (0x200)        //512Bytes = 2^9
-#define MG_MFLASH_SECTOR_SIZE_MASK  (0x200-1)
-#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
+#define MG_MFLASH_SECTOR_SIZE		(0x200)		/* 512Bytes = 2^9 */
+#define MG_MFLASH_SECTOR_SIZE_MASK	(0x200-1)
+#define MG_MFLASH_SECTOR_SIZE_SHIFT	(9)
 
-#define MG_BUFFER_OFFSET    0x8000
+#define MG_BUFFER_OFFSET	0x8000
 #define MG_REG_OFFSET		0xC000
-#define MG_REG_FEATURE		0x2 // write case
-#define MG_REG_ERROR		0x2 // read case
+#define MG_REG_FEATURE		0x2		/* write case */
+#define MG_REG_ERROR		0x2		/* read case */
 #define MG_REG_SECT_CNT		0x4
 #define MG_REG_SECT_NUM		0x6
 #define MG_REG_CYL_LOW		0x8
 #define MG_REG_CYL_HIGH		0xA
 #define MG_REG_DRV_HEAD		0xC
-#define MG_REG_COMMAND		0xE // write case
-#define MG_REG_STATUS		0xE // read  case
+#define MG_REG_COMMAND		0xE		/* write case */
+#define MG_REG_STATUS		0xE		/* read  case */
 #define MG_REG_DRV_CTRL		0x10
 #define MG_REG_BURST_CTRL	0x12
 
-#define MG_OEM_DISK_WAIT_TIME_LONG   15000 // msec
-#define MG_OEM_DISK_WAIT_TIME_NORMAL  3000 // msec
-#define MG_OEM_DISK_WAIT_TIME_SHORT   1000 // msec
+#define MG_OEM_DISK_WAIT_TIME_LONG		15000	/* msec */
+#define MG_OEM_DISK_WAIT_TIME_NORMAL	3000	/* msec */
+#define MG_OEM_DISK_WAIT_TIME_SHORT		1000	/* msec */
 
 typedef enum _mg_io_type_wait{
 
-    mg_io_wait_bsy       = 1,
-    mg_io_wait_not_bsy   = 2,
-    mg_io_wait_rdy       = 3,
-    mg_io_wait_drq       = 4,  // wait for data request
-    mg_io_wait_drq_noerr = 5,  // wait for DRQ but ignore the error status bit
-    mg_io_wait_rdy_noerr = 6   // wait for ready, but ignore error status bit
+	mg_io_wait_bsy       = 1,
+	mg_io_wait_not_bsy   = 2,
+	mg_io_wait_rdy       = 3,
+	mg_io_wait_drq       = 4,	/* wait for data request */
+	mg_io_wait_drq_noerr = 5,	/* wait for DRQ but ignore the error status bit */
+	mg_io_wait_rdy_noerr = 6	/* wait for ready, but ignore error status bit */
 
 } mg_io_type_wait;
 
-//= "Status Register" bit masks.
+/*= "Status Register" bit masks. */
 typedef enum _mg_io_type_rbit_status{
 
-    mg_io_rbit_status_error            = 0x01, // error bit in status register
-    mg_io_rbit_status_corrected_error  = 0x04, // corrected error in status register
-    mg_io_rbit_status_data_req         = 0x08, // data request bit in status register
-    mg_io_rbit_status_seek_done        = 0x10, // DSC - Drive Seek Complete
-    mg_io_rbit_status_write_fault      = 0x20, // DWF - Drive Write Fault
-    mg_io_rbit_status_ready            = 0x40,
-    mg_io_rbit_status_busy             = 0x80
+	mg_io_rbit_status_error            = 0x01, /* error bit in status register */
+	mg_io_rbit_status_corrected_error  = 0x04, /* corrected error in status register */
+	mg_io_rbit_status_data_req         = 0x08, /* data request bit in status register */
+	mg_io_rbit_status_seek_done        = 0x10, /* DSC - Drive Seek Complete */
+	mg_io_rbit_status_write_fault      = 0x20, /* DWF - Drive Write Fault */
+	mg_io_rbit_status_ready            = 0x40,
+	mg_io_rbit_status_busy             = 0x80
 
 } mg_io_type_rbit_status;
 
-//= "Error Register" bit masks.
+/*= "Error Register" bit masks. */
 typedef enum _mg_io_type_rbit_error{
 
-    mg_io_rbit_err_general          = 0x01,
-    mg_io_rbit_err_aborted          = 0x04,
-    mg_io_rbit_err_bad_sect_num     = 0x10,
-    mg_io_rbit_err_uncorrectable    = 0x40,
-    mg_io_rbit_err_bad_block        = 0x80
+	mg_io_rbit_err_general          = 0x01,
+	mg_io_rbit_err_aborted          = 0x04,
+	mg_io_rbit_err_bad_sect_num     = 0x10,
+	mg_io_rbit_err_uncorrectable    = 0x40,
+	mg_io_rbit_err_bad_block        = 0x80
 
 } mg_io_type_rbit_error;
 
-//= "Device Control Register" bit.
+/* = "Device Control Register" bit. */
 typedef enum _mg_io_type_rbit_devc{
 
-    mg_io_rbit_devc_intr      = 0x02,//  interrupt enable bit (1:disable, 0:enable)
-    mg_io_rbit_devc_srst      = 0x04  // softwrae reset bit (1:assert, 0:de-assert)
+	mg_io_rbit_devc_intr      = 0x02,	/* interrupt enable bit (1:disable, 0:enable) */
+	mg_io_rbit_devc_srst      = 0x04	/* softwrae reset bit (1:assert, 0:de-assert) */
 
 } mg_io_type_rbit_devc;
 
-// "Drive Select/Head Register" values.
+/* "Drive Select/Head Register" values. */
 typedef enum _mg_io_type_rval_dev{
 
-    mg_io_rval_dev_must_be_on      =   0x80, // These 1 bits are always on
-    mg_io_rval_dev_drv_master      =  (0x00 | mg_io_rval_dev_must_be_on),// Master
-    mg_io_rval_dev_drv_slave0      =  (0x10 | mg_io_rval_dev_must_be_on),// Slave0
-    mg_io_rval_dev_drv_slave1      =  (0x20 | mg_io_rval_dev_must_be_on),// Slave1
-    mg_io_rval_dev_drv_slave2      =  (0x30 | mg_io_rval_dev_must_be_on),// Slave2
-    mg_io_rval_dev_lba_mode        =  (0x40 | mg_io_rval_dev_must_be_on)
+	mg_io_rval_dev_must_be_on      =   0x80, /* These 1 bits are always on */
+	mg_io_rval_dev_drv_master      =  (0x00 | mg_io_rval_dev_must_be_on), /* Master */
+	mg_io_rval_dev_drv_slave0      =  (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
+	mg_io_rval_dev_drv_slave1      =  (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
+	mg_io_rval_dev_drv_slave2      =  (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
+	mg_io_rval_dev_lba_mode        =  (0x40 | mg_io_rval_dev_must_be_on)
 
 } mg_io_type_rval_dev;
 
 typedef enum _mg_io_type_cmd
 {
-    mg_io_cmd_read             =0x20,
-    mg_io_cmd_write            =0x30,
+	mg_io_cmd_read             =0x20,
+	mg_io_cmd_write            =0x30,
 
-    mg_io_cmd_setmul           =0xC6,
-    mg_io_cmd_readmul          =0xC4,
-    mg_io_cmd_writemul         =0xC5,
+	mg_io_cmd_setmul           =0xC6,
+	mg_io_cmd_readmul          =0xC4,
+	mg_io_cmd_writemul         =0xC5,
 
-    mg_io_cmd_idle             =0x97,//0xE3
-    mg_io_cmd_idle_immediate   =0x95,//0xE1
+	mg_io_cmd_idle             =0x97, /* 0xE3 */
+	mg_io_cmd_idle_immediate   =0x95, /* 0xE1 */
 
-    mg_io_cmd_setsleep         =0x99,//0xE6
-    mg_io_cmd_stdby            =0x96,//0xE2
-    mg_io_cmd_stdby_immediate  =0x94,//0xE0
+	mg_io_cmd_setsleep         =0x99, /* 0xE6 */
+	mg_io_cmd_stdby            =0x96, /* 0xE2 */
+	mg_io_cmd_stdby_immediate  =0x94, /* 0xE0 */
 
-    mg_io_cmd_identify         =0xEC,
-    mg_io_cmd_set_feature      =0xEF,
+	mg_io_cmd_identify         =0xEC,
+	mg_io_cmd_set_feature      =0xEF,
 
-    mg_io_cmd_confirm_write    =0x3C,
-    mg_io_cmd_confirm_read     =0x40,
-    mg_io_cmd_wakeup           =0xC3
+	mg_io_cmd_confirm_write    =0x3C,
+	mg_io_cmd_confirm_read     =0x40,
+	mg_io_cmd_wakeup           =0xC3
 
 } mg_io_type_cmd;
 
diff --git a/src/flash/nand.c b/src/flash/nand.c
index f55a81bb..971956e8 100644
--- a/src/flash/nand.c
+++ b/src/flash/nand.c
@@ -1524,4 +1524,3 @@ int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd,
 	
 	return ERROR_OK;
 }
-
diff --git a/src/flash/s3c24xx_regs_nand.h b/src/flash/s3c24xx_regs_nand.h
index 7d295d80..31d9a856 100644
--- a/src/flash/s3c24xx_regs_nand.h
+++ b/src/flash/s3c24xx_regs_nand.h
@@ -85,11 +85,11 @@
 #define S3C2440_NFCONT_SPARE_ECCLOCK	(1<<6)
 #define S3C2440_NFCONT_MAIN_ECCLOCK	(1<<5)
 #define S3C2440_NFCONT_INITECC		(1<<4)
-#define S3C2440_NFCONT_nFCE		(1<<1)
+#define S3C2440_NFCONT_nFCE			(1<<1)
 #define S3C2440_NFCONT_ENABLE		(1<<0)
 
 #define S3C2440_NFSTAT_READY		(1<<0)
-#define S3C2440_NFSTAT_nCE		(1<<1)
+#define S3C2440_NFSTAT_nCE			(1<<1)
 #define S3C2440_NFSTAT_RnB_CHANGE	(1<<2)
 #define S3C2440_NFSTAT_ILLEGAL_ACCESS	(1<<3)
 
@@ -114,13 +114,13 @@
 #define S3C2412_NFSTAT_RnB_CHANGE	(1<<4)
 #define S3C2412_NFSTAT_nFCE1		(1<<3)
 #define S3C2412_NFSTAT_nFCE0		(1<<2)
-#define S3C2412_NFSTAT_Res1		(1<<1)
+#define S3C2412_NFSTAT_Res1			(1<<1)
 #define S3C2412_NFSTAT_READY		(1<<0)
 
 #define S3C2412_NFECCERR_SERRDATA(x)	(((x) >> 21) & 0xf)
-#define S3C2412_NFECCERR_SERRBIT(x)	(((x) >> 18) & 0x7)
+#define S3C2412_NFECCERR_SERRBIT(x)		(((x) >> 18) & 0x7)
 #define S3C2412_NFECCERR_MERRDATA(x)	(((x) >> 7) & 0x3ff)
-#define S3C2412_NFECCERR_MERRBIT(x)	(((x) >> 4) & 0x7)
+#define S3C2412_NFECCERR_MERRBIT(x)		(((x) >> 4) & 0x7)
 #define S3C2412_NFECCERR_SPARE_ERR(x)	(((x) >> 2) & 0x3)
 #define S3C2412_NFECCERR_MAIN_ERR(x)	(((x) >> 2) & 0x3)
 #define S3C2412_NFECCERR_NONE		(0)
diff --git a/src/flash/stellaris.h b/src/flash/stellaris.h
index 4ea1fe5a..2bf4aa6c 100644
--- a/src/flash/stellaris.h
+++ b/src/flash/stellaris.h
@@ -83,7 +83,6 @@ typedef struct stellaris_flash_bank_s
 #define AMASK	1
 #define PMASK	2
 
-
 /* Flash Controller Command bits */
 #define FMC_WRKEY	(0xA442<<16)
 #define FMC_COMT	(1<<3)
diff --git a/src/flash/stm32x.h b/src/flash/stm32x.h
index 04f813aa..1357162c 100644
--- a/src/flash/stm32x.h
+++ b/src/flash/stm32x.h
@@ -100,4 +100,3 @@ typedef struct stm32x_mem_layout_s {
 } stm32x_mem_layout_t;
 
 #endif /* STM32X_H */
-
diff --git a/src/flash/str7x.c b/src/flash/str7x.c
index 09d3b817..ec73f646 100644
--- a/src/flash/str7x.c
+++ b/src/flash/str7x.c
@@ -717,4 +717,3 @@ int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *c
 	
 	return ERROR_OK;
 }
-
diff --git a/src/flash/str7x.h b/src/flash/str7x.h
index 7e48f4a4..b602498c 100644
--- a/src/flash/str7x.h
+++ b/src/flash/str7x.h
@@ -109,4 +109,3 @@ typedef struct str7x_mem_layout_s {
 } str7x_mem_layout_t;
 
 #endif /* STR7X_H */
-
diff --git a/src/flash/str9x.h b/src/flash/str9x.h
index a2a67ef2..5e36e48d 100644
--- a/src/flash/str9x.h
+++ b/src/flash/str9x.h
@@ -50,7 +50,7 @@ enum str9x_status_codes
 	STR9X_BUSY = 11
 };
 
-/*  Flash registers */
+/* Flash registers */
 
 #define FLASH_BBSR		0x54000000		/* Boot Bank Size Register                */
 #define FLASH_NBBSR		0x54000004		/* Non-Boot Bank Size Register            */
@@ -61,4 +61,3 @@ enum str9x_status_codes
 #define FLASH_BCE5ADDR	0x54000020		/* BC Fifth Entry Target Address Register */
 
 #endif /* STR9X_H */
-
diff --git a/src/flash/tms470.c b/src/flash/tms470.c
index 0c992a1e..eed5aa63 100644
--- a/src/flash/tms470.c
+++ b/src/flash/tms470.c
@@ -73,7 +73,7 @@ const flash_sector_t TMS470R1A256_SECTORS[] = {
 };
 
 #define TMS470R1A256_NUM_SECTORS \
-  (sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0]))
+	(sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0]))
 
 const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = {
 	{0x00000000, 0x00002000, -1, -1},
@@ -83,7 +83,7 @@ const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = {
 };
 
 #define TMS470R1A288_BANK0_NUM_SECTORS \
-  (sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0]))
+	(sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0]))
 
 const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = {
 	{0x00040000, 0x00010000, -1, -1},
@@ -93,43 +93,43 @@ const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = {
 };
 
 #define TMS470R1A288_BANK1_NUM_SECTORS \
-  (sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0]))
+	(sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0]))
 
 const flash_sector_t TMS470R1A384_BANK0_SECTORS[] = {
-    {0x00000000, 0x00002000, -1, -1},
-    {0x00002000, 0x00002000, -1, -1},
-    {0x00004000, 0x00004000, -1, -1},
-    {0x00008000, 0x00004000, -1, -1},
-    {0x0000C000, 0x00004000, -1, -1},
-    {0x00010000, 0x00004000, -1, -1},
-    {0x00014000, 0x00004000, -1, -1},
-    {0x00018000, 0x00002000, -1, -1},
-    {0x0001C000, 0x00002000, -1, -1},
-    {0x0001E000, 0x00002000, -1, -1},
+	{0x00000000, 0x00002000, -1, -1},
+	{0x00002000, 0x00002000, -1, -1},
+	{0x00004000, 0x00004000, -1, -1},
+	{0x00008000, 0x00004000, -1, -1},
+	{0x0000C000, 0x00004000, -1, -1},
+	{0x00010000, 0x00004000, -1, -1},
+	{0x00014000, 0x00004000, -1, -1},
+	{0x00018000, 0x00002000, -1, -1},
+	{0x0001C000, 0x00002000, -1, -1},
+	{0x0001E000, 0x00002000, -1, -1},
 };
 
 #define TMS470R1A384_BANK0_NUM_SECTORS \
-  (sizeof(TMS470R1A384_BANK0_SECTORS)/sizeof(TMS470R1A384_BANK0_SECTORS[0]))
+	(sizeof(TMS470R1A384_BANK0_SECTORS)/sizeof(TMS470R1A384_BANK0_SECTORS[0]))
 
 const flash_sector_t TMS470R1A384_BANK1_SECTORS[] = {
-    {0x00020000, 0x00008000, -1, -1},
-    {0x00028000, 0x00008000, -1, -1},
-    {0x00030000, 0x00008000, -1, -1},
-    {0x00038000, 0x00008000, -1, -1},
+	{0x00020000, 0x00008000, -1, -1},
+	{0x00028000, 0x00008000, -1, -1},
+	{0x00030000, 0x00008000, -1, -1},
+	{0x00038000, 0x00008000, -1, -1},
 };
 
 #define TMS470R1A384_BANK1_NUM_SECTORS \
-  (sizeof(TMS470R1A384_BANK1_SECTORS)/sizeof(TMS470R1A384_BANK1_SECTORS[0]))
+	(sizeof(TMS470R1A384_BANK1_SECTORS)/sizeof(TMS470R1A384_BANK1_SECTORS[0]))
 
 const flash_sector_t TMS470R1A384_BANK2_SECTORS[] = {
-    {0x00040000, 0x00008000, -1, -1},
-    {0x00048000, 0x00008000, -1, -1},
-    {0x00050000, 0x00008000, -1, -1},
-    {0x00058000, 0x00008000, -1, -1},
+	{0x00040000, 0x00008000, -1, -1},
+	{0x00048000, 0x00008000, -1, -1},
+	{0x00050000, 0x00008000, -1, -1},
+	{0x00058000, 0x00008000, -1, -1},
 };
 
 #define TMS470R1A384_BANK2_NUM_SECTORS \
-  (sizeof(TMS470R1A384_BANK2_SECTORS)/sizeof(TMS470R1A384_BANK2_SECTORS[0]))
+	(sizeof(TMS470R1A384_BANK2_SECTORS)/sizeof(TMS470R1A384_BANK2_SECTORS[0]))
 
 /* ---------------------------------------------------------------------- */
 
@@ -229,56 +229,56 @@ int tms470_read_part_info(struct flash_bank_s *bank)
 		}
 		break;
 
-    case 0x2d:
-        part_name = "TMS470R1A384";
-
-        if ((bank->base >= 0x00000000) && (bank->base < 0x00020000))
-        {
-            tms470_info->ordinal = 0;
-            bank->base = 0x00000000;
-            bank->size = 128 * 1024;
-            bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS;
-            bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS));
-            if (!bank->sectors)
-            {
-                return ERROR_FLASH_OPERATION_FAILED;
-            }
-            (void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, sizeof(TMS470R1A384_BANK0_SECTORS));
-        }
-        else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000))
-        {
-            tms470_info->ordinal = 1;
-            bank->base = 0x00020000;
-            bank->size = 128 * 1024;
-            bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS;
-            bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS));
-            if (!bank->sectors)
-            {
-                return ERROR_FLASH_OPERATION_FAILED;
-            }
-            (void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, sizeof(TMS470R1A384_BANK1_SECTORS));
-        }
-        else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000))
-        {
-            tms470_info->ordinal = 2;
-            bank->base = 0x00040000;
-            bank->size = 128 * 1024;
-            bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS;
-            bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS));
-            if (!bank->sectors)
-            {
-                return ERROR_FLASH_OPERATION_FAILED;
-            }
-            (void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS));
-        }
-        else
-        {
-            LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
-            return ERROR_FLASH_OPERATION_FAILED;
-        }
-        break;
-
-    default:
+	case 0x2d:
+		part_name = "TMS470R1A384";
+
+		if ((bank->base >= 0x00000000) && (bank->base < 0x00020000))
+		{
+			tms470_info->ordinal = 0;
+			bank->base = 0x00000000;
+			bank->size = 128 * 1024;
+			bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS;
+			bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS));
+			if (!bank->sectors)
+			{
+				return ERROR_FLASH_OPERATION_FAILED;
+			}
+			(void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, sizeof(TMS470R1A384_BANK0_SECTORS));
+		}
+		else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000))
+		{
+			tms470_info->ordinal = 1;
+			bank->base = 0x00020000;
+			bank->size = 128 * 1024;
+			bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS;
+			bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS));
+			if (!bank->sectors)
+			{
+				return ERROR_FLASH_OPERATION_FAILED;
+			}
+			(void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, sizeof(TMS470R1A384_BANK1_SECTORS));
+		}
+		else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000))
+		{
+			tms470_info->ordinal = 2;
+			bank->base = 0x00040000;
+			bank->size = 128 * 1024;
+			bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS;
+			bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS));
+			if (!bank->sectors)
+			{
+				return ERROR_FLASH_OPERATION_FAILED;
+			}
+			(void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS));
+		}
+		else
+		{
+			LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
+			return ERROR_FLASH_OPERATION_FAILED;
+		}
+		break;
+
+	default:
 		LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}