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authorZachary T Welch <zw@superlucidity.net>2009-11-13 10:11:13 -0800
committerZachary T Welch <zw@superlucidity.net>2009-11-13 11:58:14 -0800
commit0f1163e823c6ca3c2a81fa296157f5dde0635fea (patch)
tree60551098bba500cd8b7fc4bd669d64fd3ed8f061 /src/flash
parentd0dee7ccafcf87259fadf6c5de43df8583b0e885 (diff)
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target_t -> struct target
Remove misleading typedef and redundant suffix from struct target.
Diffstat (limited to 'src/flash')
-rw-r--r--src/flash/aduc702x.c14
-rw-r--r--src/flash/arm_nandio.c2
-rw-r--r--src/flash/arm_nandio.h2
-rw-r--r--src/flash/at91sam3.c6
-rw-r--r--src/flash/at91sam7.c22
-rw-r--r--src/flash/avrf.c8
-rw-r--r--src/flash/cfi.c50
-rw-r--r--src/flash/davinci_nand.c32
-rw-r--r--src/flash/ecos.c8
-rw-r--r--src/flash/faux.c2
-rw-r--r--src/flash/flash.c26
-rw-r--r--src/flash/flash.h8
-rw-r--r--src/flash/lpc2000.c4
-rw-r--r--src/flash/lpc288x.c16
-rw-r--r--src/flash/lpc2900.c18
-rw-r--r--src/flash/lpc3180_nand_controller.c24
-rw-r--r--src/flash/lpc3180_nand_controller.h2
-rw-r--r--src/flash/mflash.c26
-rw-r--r--src/flash/mflash.h2
-rw-r--r--src/flash/mx3_nand.c36
-rw-r--r--src/flash/mx3_nand.h2
-rw-r--r--src/flash/orion_nand.c10
-rw-r--r--src/flash/pic32mx.c26
-rw-r--r--src/flash/s3c2410_nand.c8
-rw-r--r--src/flash/s3c2412_nand.c2
-rw-r--r--src/flash/s3c2440_nand.c8
-rw-r--r--src/flash/s3c2443_nand.c2
-rw-r--r--src/flash/s3c24xx_nand.c10
-rw-r--r--src/flash/s3c24xx_nand.h2
-rw-r--r--src/flash/stellaris.c20
-rw-r--r--src/flash/stm32x.c34
-rw-r--r--src/flash/str7x.c16
-rw-r--r--src/flash/str9x.c12
-rw-r--r--src/flash/tms470.c22
34 files changed, 241 insertions, 241 deletions
diff --git a/src/flash/aduc702x.c b/src/flash/aduc702x.c
index 8011e933..76f38b56 100644
--- a/src/flash/aduc702x.c
+++ b/src/flash/aduc702x.c
@@ -30,8 +30,8 @@
static int aduc702x_build_sector_list(struct flash_bank_s *bank);
-static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
-static int aduc702x_set_write_enable(target_t *target, int enable);
+static int aduc702x_check_flash_completion(struct target* target, unsigned int timeout_ms);
+static int aduc702x_set_write_enable(struct target *target, int enable);
#define ADUC702x_FLASH 0xfffff800
#define ADUC702x_FLASH_FEESTA (0*4)
@@ -98,7 +98,7 @@ static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
int x;
int count;
//uint32_t v;
- target_t *target = bank->target;
+ struct target *target = bank->target;
aduc702x_set_write_enable(target, 1);
@@ -159,7 +159,7 @@ static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int l
static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct aduc702x_flash_bank *aduc702x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 7000;
struct working_area *source;
uint32_t address = bank->base + offset;
@@ -305,7 +305,7 @@ static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uin
{
uint32_t x;
uint8_t b;
- target_t *target = bank->target;
+ struct target *target = bank->target;
aduc702x_set_write_enable(target, 1);
@@ -379,7 +379,7 @@ static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
/* sets FEEMOD bit 3
* enable = 1 enables writes & erases, 0 disables them */
-static int aduc702x_set_write_enable(target_t *target, int enable)
+static int aduc702x_set_write_enable(struct target *target, int enable)
{
// don't bother to preserve int enable bit here
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
@@ -392,7 +392,7 @@ static int aduc702x_set_write_enable(target_t *target, int enable)
*
* this function sleeps 1ms between checks (after the first one),
* so in some cases may slow things down without a usleep after the first read */
-static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
+static int aduc702x_check_flash_completion(struct target* target, unsigned int timeout_ms)
{
uint8_t v = 4;
diff --git a/src/flash/arm_nandio.c b/src/flash/arm_nandio.c
index 4f04831f..63eb0413 100644
--- a/src/flash/arm_nandio.c
+++ b/src/flash/arm_nandio.c
@@ -41,7 +41,7 @@
*/
int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
{
- target_t *target = nand->target;
+ struct target *target = nand->target;
struct armv4_5_algorithm algo;
struct arm *armv4_5 = target->arch_info;
struct reg_param reg_params[3];
diff --git a/src/flash/arm_nandio.h b/src/flash/arm_nandio.h
index cb8df428..a1bed326 100644
--- a/src/flash/arm_nandio.h
+++ b/src/flash/arm_nandio.h
@@ -6,7 +6,7 @@
struct arm_nand_data {
/* target is proxy for some ARM core */
- struct target_s *target;
+ struct target *target;
/* copy_area holds write-to-NAND loop and data to write */
struct working_area *copy_area;
diff --git a/src/flash/at91sam3.c b/src/flash/at91sam3.c
index 335f8ab5..3caf96c8 100644
--- a/src/flash/at91sam3.c
+++ b/src/flash/at91sam3.c
@@ -215,7 +215,7 @@ struct sam3_chip {
// this is "initialized" from the global const structure
struct sam3_chip_details details;
- target_t *target;
+ struct target *target;
struct sam3_cfg cfg;
struct membuf *mbuf;
@@ -233,7 +233,7 @@ static struct sam3_chip *all_sam3_chips;
static struct sam3_chip *
get_current_sam3(struct command_context_s *cmd_ctx)
{
- target_t *t;
+ struct target *t;
static struct sam3_chip *p;
t = get_current_target(cmd_ctx);
@@ -1393,7 +1393,7 @@ sam3_explain_mckr(struct sam3_chip *pChip)
#if 0
static struct sam3_chip *
-target2sam3(target_t *pTarget)
+target2sam3(struct target *pTarget)
{
struct sam3_chip *pChip;
diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c
index c0b516c3..6c98953d 100644
--- a/src/flash/at91sam7.c
+++ b/src/flash/at91sam7.c
@@ -55,9 +55,9 @@
static int at91sam7_protect_check(struct flash_bank_s *bank);
static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
-static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number);
-static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
-static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
+static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number);
+static void at91sam7_set_flash_mode(struct flash_bank_s *bank, int mode);
+static uint32_t at91sam7_wait_status_busy(struct flash_bank_s *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
static uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
@@ -88,7 +88,7 @@ static long SRAMSIZ[16] = {
#endif
-static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number)
+static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number)
{
uint32_t fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
@@ -100,7 +100,7 @@ static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number)
static void at91sam7_read_clock_info(flash_bank_t *bank)
{
struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t mckr, mcfr, pllr, mor;
unsigned long tmp = 0, mainfreq;
@@ -180,7 +180,7 @@ static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
uint32_t fmr, fmcn = 0, fws = 0;
struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (mode && (mode != at91sam7_info->flashmode))
{
@@ -255,7 +255,7 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16
{
uint32_t fcr;
struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd;
target_write_u32(target, MC_FCR[bank->bank_number], fcr);
@@ -284,7 +284,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
struct at91sam7_flash_bank *at91sam7_info;
- target_t *target = t_bank->target;
+ struct target *target = t_bank->target;
uint16_t bnk, sec;
uint16_t arch;
@@ -597,7 +597,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
static int at91sam7_erase_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint16_t retval;
uint32_t blank;
uint16_t fast_check;
@@ -715,7 +715,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
{
flash_bank_t *t_bank = bank;
struct at91sam7_flash_bank *at91sam7_info;
- target_t *target = t_bank->target;
+ struct target *target = t_bank->target;
uint32_t base_address;
uint32_t bank_size;
@@ -949,7 +949,7 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o
{
int retval;
struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t dst_min_alignment, wcount, bytes_remaining = count;
uint32_t first_page, last_page, pagen, buffer_pos;
diff --git a/src/flash/avrf.c b/src/flash/avrf.c
index 91aedb85..f4a7d721 100644
--- a/src/flash/avrf.c
+++ b/src/flash/avrf.c
@@ -212,7 +212,7 @@ static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)
static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct avr_common *avr = target->arch_info;
uint32_t cur_size, cur_buffer_size, page_size;
@@ -263,7 +263,7 @@ static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offse
#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
static int avrf_probe(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct avrf_flash_bank *avrf_info = bank->driver_priv;
struct avr_common *avr = target->arch_info;
struct avrf_type *avr_info = NULL;
@@ -345,7 +345,7 @@ static int avrf_protect_check(struct flash_bank_s *bank)
static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct avr_common *avr = target->arch_info;
struct avrf_type *avr_info = NULL;
int i;
@@ -396,7 +396,7 @@ static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
static int avrf_mass_erase(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct avr_common *avr = target->arch_info;
if (target->state != TARGET_HALTED)
diff --git a/src/flash/cfi.c b/src/flash/cfi.c
index 6a193e2d..6ab84f1f 100644
--- a/src/flash/cfi.c
+++ b/src/flash/cfi.c
@@ -136,7 +136,7 @@ static void cfi_command(flash_bank_t *bank, uint8_t cmd, uint8_t *cmd_buf)
*/
static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
@@ -153,7 +153,7 @@ static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, uint32_t offset)
*/
static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
int i;
@@ -178,7 +178,7 @@ static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, uint32_t offset)
static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
uint8_t data[CFI_MAX_BUS_WIDTH * 2];
@@ -200,7 +200,7 @@ static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
uint8_t data[CFI_MAX_BUS_WIDTH * 4];
@@ -223,7 +223,7 @@ static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
static void cfi_intel_clear_status_register(flash_bank_t *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
if (target->state != TARGET_HALTED)
@@ -317,7 +317,7 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = malloc(sizeof(struct cfi_intel_pri_ext));
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
cfi_info->pri_ext = pri_ext;
@@ -383,7 +383,7 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
cfi_info->pri_ext = pri_ext;
@@ -449,7 +449,7 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank)
struct cfi_atmel_pri_ext atmel_pri_ext;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
/* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion,
@@ -656,7 +656,7 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
int i;
@@ -701,7 +701,7 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
int i;
@@ -802,7 +802,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
int retry = 0;
int i;
@@ -949,7 +949,7 @@ static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
/* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */
static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
{
- /* target_t *target = bank->target; */
+ /* struct target *target = bank->target; */
int i;
@@ -982,7 +982,7 @@ static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
/* Convert code image to target endian */
/* FIXME create general block conversion fcts in target.c?) */
-static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const uint32_t *src, uint32_t count)
+static void cfi_fix_code_endian(struct target *target, uint8_t *dest, const uint32_t *src, uint32_t count)
{
uint32_t i;
for (i = 0; i< count; i++)
@@ -995,7 +995,7 @@ static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const uint32_t
static uint32_t cfi_command_val(flash_bank_t *bank, uint8_t cmd)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t buf[CFI_MAX_BUS_WIDTH];
cfi_command(bank, cmd, buf);
@@ -1019,7 +1019,7 @@ static uint32_t cfi_command_val(flash_bank_t *bank, uint8_t cmd)
static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct reg_param reg_params[7];
struct armv4_5_algorithm armv4_5_info;
struct working_area *source;
@@ -1264,7 +1264,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct reg_param reg_params[10];
struct armv4_5_algorithm armv4_5_info;
struct working_area *source;
@@ -1563,7 +1563,7 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, uint32
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
cfi_intel_clear_status_register(bank);
@@ -1597,7 +1597,7 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, uint3
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
/* Calculate buffer size and boundary mask */
@@ -1691,7 +1691,7 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, uin
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
cfi_command(bank, 0xaa, command);
@@ -1736,7 +1736,7 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, ui
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
@@ -1869,7 +1869,7 @@ static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wo
int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t address = bank->base + offset; /* address of first byte to be programmed */
uint32_t write_p, copy_p;
int align; /* number of unaligned bytes */
@@ -2121,7 +2121,7 @@ static void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param)
static int cfi_query_string(struct flash_bank_s *bank, int address)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
int retval;
uint8_t command[8];
@@ -2159,7 +2159,7 @@ static int cfi_query_string(struct flash_bank_s *bank, int address)
static int cfi_probe(struct flash_bank_s *bank)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
int num_sectors = 0;
int i;
@@ -2449,7 +2449,7 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[CFI_MAX_BUS_WIDTH];
int i;
@@ -2482,7 +2482,7 @@ static int cfi_spansion_protect_check(struct flash_bank_s *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t command[8];
int i;
diff --git a/src/flash/davinci_nand.c b/src/flash/davinci_nand.c
index d4c16197..cc144206 100644
--- a/src/flash/davinci_nand.c
+++ b/src/flash/davinci_nand.c
@@ -38,7 +38,7 @@ enum ecc {
};
struct davinci_nand {
- target_t *target;
+ struct target *target;
uint8_t chipsel; /* chipselect 0..3 == CS2..CS5 */
uint8_t eccmode;
@@ -69,7 +69,7 @@ struct davinci_nand {
#define NANDERRADDR 0xd0 /* 4-bit ECC err addr, 1st of 2 */
#define NANDERRVAL 0xd8 /* 4-bit ECC err value, 1st of 2 */
-static int halted(target_t *target, const char *label)
+static int halted(struct target *target, const char *label)
{
if (target->state == TARGET_HALTED)
return true;
@@ -86,7 +86,7 @@ static int davinci_register_commands(struct command_context_s *cmd_ctx)
static int davinci_init(struct nand_device_s *nand)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
uint32_t nandfcr;
if (!halted(target, "init"))
@@ -116,7 +116,7 @@ static int davinci_reset(struct nand_device_s *nand)
static int davinci_nand_ready(struct nand_device_s *nand, int timeout)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
uint32_t nandfsr;
/* NOTE: return code is zero/error, else success; not ERROR_* */
@@ -139,7 +139,7 @@ static int davinci_nand_ready(struct nand_device_s *nand, int timeout)
static int davinci_command(struct nand_device_s *nand, uint8_t command)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
if (!halted(target, "command"))
return ERROR_NAND_OPERATION_FAILED;
@@ -151,7 +151,7 @@ static int davinci_command(struct nand_device_s *nand, uint8_t command)
static int davinci_address(struct nand_device_s *nand, uint8_t address)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
if (!halted(target, "address"))
return ERROR_NAND_OPERATION_FAILED;
@@ -163,7 +163,7 @@ static int davinci_address(struct nand_device_s *nand, uint8_t address)
static int davinci_write_data(struct nand_device_s *nand, uint16_t data)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
if (!halted(target, "write_data"))
return ERROR_NAND_OPERATION_FAILED;
@@ -175,7 +175,7 @@ static int davinci_write_data(struct nand_device_s *nand, uint16_t data)
static int davinci_read_data(struct nand_device_s *nand, void *data)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
if (!halted(target, "read_data"))
return ERROR_NAND_OPERATION_FAILED;
@@ -190,7 +190,7 @@ static int davinci_read_block_data(struct nand_device_s *nand,
uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
uint32_t nfdata = info->data;
uint32_t tmp;
@@ -223,7 +223,7 @@ static int davinci_write_block_data(struct nand_device_s *nand,
uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
uint32_t nfdata = info->data;
uint32_t tmp;
int status;
@@ -322,7 +322,7 @@ static int davinci_read_page(struct nand_device_s *nand, uint32_t page,
static void davinci_write_pagecmd(struct nand_device_s *nand, uint8_t cmd, uint32_t page)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
int page3 = nand->address_cycles - (nand->page_size == 512);
/* write command ({page,otp}x{read,program} */
@@ -346,7 +346,7 @@ static int davinci_writepage_tail(struct nand_device_s *nand,
uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
uint8_t status;
if (oob_size)
@@ -379,7 +379,7 @@ static int davinci_write_page_ecc1(struct nand_device_s *nand, uint32_t page,
{
unsigned oob_offset;
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
const uint32_t fcr_addr = info->aemif + NANDFCR;
const uint32_t ecc1_addr = info->aemif + NANDFECC + (4 * info->chipsel);
uint32_t fcr, ecc1;
@@ -467,7 +467,7 @@ static int davinci_write_page_ecc4(struct nand_device_s *nand, uint32_t page,
struct davinci_nand *info = nand->controller_priv;
const uint8_t *l;
- target_t *target = info->target;
+ struct target *target = info->target;
const uint32_t fcr_addr = info->aemif + NANDFCR;
const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
uint32_t fcr, ecc4;
@@ -547,7 +547,7 @@ static int davinci_write_page_ecc4infix(struct nand_device_s *nand, uint32_t pag
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
- target_t *target = info->target;
+ struct target *target = info->target;
const uint32_t fcr_addr = info->aemif + NANDFCR;
const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
uint32_t fcr, ecc4;
@@ -632,7 +632,7 @@ static int davinci_read_page_ecc4infix(struct nand_device_s *nand, uint32_t page
NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
{
struct davinci_nand *info;
- target_t *target;
+ struct target *target;
unsigned long chip, aemif;
enum ecc eccmode;
int chipsel;
diff --git a/src/flash/ecos.c b/src/flash/ecos.c
index 57df1e7f..ad27a45d 100644
--- a/src/flash/ecos.c
+++ b/src/flash/ecos.c
@@ -35,7 +35,7 @@ static int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, cha
struct ecosflash_flash_bank
{
- struct target_s *target;
+ struct target *target;
struct working_area *write_algorithm;
struct working_area *erase_check_algorithm;
char *driverPath;
@@ -157,7 +157,7 @@ static int loadDriver(struct ecosflash_flash_bank *info)
image.base_address_set = 0;
image.start_address_set = 0;
- target_t *target = info->target;
+ struct target *target = info->target;
int retval;
if ((retval = image_open(&image, info->driverPath, NULL)) != ERROR_OK)
@@ -204,7 +204,7 @@ static int runCode(struct ecosflash_flash_bank *info,
/* timeout in ms */
int timeout)
{
- target_t *target = info->target;
+ struct target *target = info->target;
struct reg_param reg_params[3];
struct armv4_5_algorithm armv4_5_info;
@@ -272,7 +272,7 @@ static int eCosBoard_erase(struct ecosflash_flash_bank *info, uint32_t address,
static int eCosBoard_flash(struct ecosflash_flash_bank *info, void *data, uint32_t address, uint32_t len)
{
- target_t *target = info->target;
+ struct target *target = info->target;
const int chunk = 8192;
int retval = ERROR_OK;
int timeout = (chunk / 20480 + 1) * 1000; /*asume 20 KB/s + 1 second*/
diff --git a/src/flash/faux.c b/src/flash/faux.c
index 52d37289..0a52f5f8 100644
--- a/src/flash/faux.c
+++ b/src/flash/faux.c
@@ -27,7 +27,7 @@
struct faux_flash_bank
{
- struct target_s *target;
+ struct target *target;
uint8_t *memory;
uint32_t start_address;
};
diff --git a/src/flash/flash.c b/src/flash/flash.c
index a8da5565..5374532c 100644
--- a/src/flash/flash.c
+++ b/src/flash/flash.c
@@ -31,7 +31,7 @@
#include "image.h"
#include "time_support.h"
-static int flash_write_unlock(target_t *target, struct image *image, uint32_t *written, int erase, bool unlock);
+static int flash_write_unlock(struct target *target, struct image *image, uint32_t *written, int erase, bool unlock);
/* flash drivers
*/
@@ -220,7 +220,7 @@ COMMAND_HANDLER(handle_flash_bank_command)
int retval;
int i;
int found = 0;
- target_t *target;
+ struct target *target;
if (argc < 6)
{
@@ -448,7 +448,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
int address;
int length;
- target_t *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(cmd_ctx);
if (argc != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -615,7 +615,7 @@ COMMAND_HANDLER(handle_flash_protect_command)
COMMAND_HANDLER(handle_flash_write_image_command)
{
- target_t *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(cmd_ctx);
struct image image;
uint32_t written;
@@ -714,7 +714,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
uint32_t wrote = 0;
uint32_t cur_size = 0;
uint32_t chunk_count;
- target_t *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(cmd_ctx);
uint32_t i;
uint32_t wordsize;
@@ -874,7 +874,7 @@ void flash_set_dirty(void)
}
/* lookup flash bank by address */
-flash_bank_t *get_flash_bank_by_addr(target_t *target, uint32_t addr)
+struct flash_bank_s *get_flash_bank_by_addr(struct target *target, uint32_t addr)
{
flash_bank_t *c;
@@ -898,7 +898,7 @@ flash_bank_t *get_flash_bank_by_addr(target_t *target, uint32_t addr)
}
/* erase given flash region, selects proper bank according to target and address */
-static int flash_iterate_address_range(target_t *target, uint32_t addr, uint32_t length,
+static int flash_iterate_address_range(struct target *target, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank_s *bank, int first, int last))
{
flash_bank_t *c;
@@ -949,7 +949,7 @@ static int flash_iterate_address_range(target_t *target, uint32_t addr, uint32_t
-int flash_erase_address_range(target_t *target, uint32_t addr, uint32_t length)
+int flash_erase_address_range(struct target *target, uint32_t addr, uint32_t length)
{
return flash_iterate_address_range(target, addr, length, &flash_driver_erase);
}
@@ -959,14 +959,14 @@ static int flash_driver_unprotect(struct flash_bank_s *bank, int first, int last
return flash_driver_protect(bank, 0, first, last);
}
-static int flash_unlock_address_range(target_t *target, uint32_t addr, uint32_t length)
+static int flash_unlock_address_range(struct target *target, uint32_t addr, uint32_t length)
{
return flash_iterate_address_range(target, addr, length, &flash_driver_unprotect);
}
/* write (optional verify) an image to flash memory of the given target */
-static int flash_write_unlock(target_t *target, struct image *image, uint32_t *written, int erase, bool unlock)
+static int flash_write_unlock(struct target *target, struct image *image, uint32_t *written, int erase, bool unlock)
{
int retval = ERROR_OK;
@@ -1125,14 +1125,14 @@ static int flash_write_unlock(target_t *target, struct image *image, uint32_t *w
return retval;
}
-int flash_write(target_t *target, struct image *image, uint32_t *written, int erase)
+int flash_write(struct target *target, struct image *image, uint32_t *written, int erase)
{
return flash_write_unlock(target, image, written, erase, false);
}
int default_flash_mem_blank_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint8_t buffer[1024];
int buffer_size = sizeof(buffer);
int i;
@@ -1179,7 +1179,7 @@ int default_flash_mem_blank_check(struct flash_bank_s *bank)
int default_flash_blank_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
int retval;
int fast_check = 0;
diff --git a/src/flash/flash.h b/src/flash/flash.h
index eeacc756..b5af7176 100644
--- a/src/flash/flash.h
+++ b/src/flash/flash.h
@@ -240,7 +240,7 @@ struct flash_driver
*/
typedef struct flash_bank_s
{
- struct target_s *target; /**< Target to which this bank belongs. */
+ struct target *target; /**< Target to which this bank belongs. */
struct flash_driver *driver; /**< Driver for this bank. */
void *driver_priv; /**< Private driver storage pointer */
@@ -273,7 +273,7 @@ int flash_init_drivers(struct command_context_s *cmd_ctx);
* Erases @a length bytes in the @a target flash, starting at @a addr.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
-int flash_erase_address_range(struct target_s *target,
+int flash_erase_address_range(struct target *target,
uint32_t addr, uint32_t length);
/**
* Writes @a image into the @a target flash. The @a written parameter
@@ -285,7 +285,7 @@ int flash_erase_address_range(struct target_s *target,
* erase the corresponding banks or sectors before programming.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
-int flash_write(struct target_s *target,
+int flash_write(struct target *target,
struct image *image, uint32_t *written, int erase);
/**
* Forces targets to re-examine their erase/protection state.
@@ -337,7 +337,7 @@ flash_bank_t *get_flash_bank_by_num_noprobe(int num);
* @param addr An address that is within the range of the bank.
* @returns The flash_bank_t located at @a addr, or NULL.
*/
-flash_bank_t *get_flash_bank_by_addr(struct target_s *target, uint32_t addr);
+struct flash_bank_s *get_flash_bank_by_addr(struct target *target, uint32_t addr);
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
diff --git a/src/flash/lpc2000.c b/src/flash/lpc2000.c
index 4ad3e0e5..20617269 100644
--- a/src/flash/lpc2000.c
+++ b/src/flash/lpc2000.c
@@ -238,7 +238,7 @@ static int lpc2000_iap_call(flash_bank_t *bank, int code, uint32_t param_table[5
{
int retval;
struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct mem_param mem_params[2];
struct reg_param reg_params[5];
struct armv4_5_algorithm armv4_5_info; /* for LPC2000 */
@@ -538,7 +538,7 @@ static int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int la
static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t dst_min_alignment;
uint32_t bytes_remaining = count;
uint32_t bytes_written = 0;
diff --git a/src/flash/lpc288x.c b/src/flash/lpc288x.c
index fd896001..dbd0dab5 100644
--- a/src/flash/lpc288x.c
+++ b/src/flash/lpc288x.c
@@ -84,15 +84,15 @@
/* F_CLK_TIME */
#define FCT_CLK_DIV_MASK 0x0FFF
-static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
-static void lpc288x_load_timer(int erase, struct target_s *target);
+static uint32_t lpc288x_wait_status_busy(struct flash_bank_s *bank, int timeout);
+static void lpc288x_load_timer(int erase, struct target *target);
static void lpc288x_set_flash_clk(struct flash_bank_s *bank);
static uint32_t lpc288x_system_ready(struct flash_bank_s *bank);
static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
{
uint32_t status;
- target_t *target = bank->target;
+ struct target *target = bank->target;
do
{
alive_sleep(1);
@@ -112,7 +112,7 @@ static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
static int lpc288x_read_part_info(struct flash_bank_s *bank)
{
struct lpc288x_flash_bank *lpc288x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t cidr;
int i = 0;
@@ -205,7 +205,7 @@ static void lpc288x_set_flash_clk(struct flash_bank_s *bank)
* LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
* = 23 (75) (AN10548 72 - is this wrong?)
* TODO: Sort out timing calcs ;) */
-static void lpc288x_load_timer(int erase, struct target_s *target)
+static void lpc288x_load_timer(int erase, struct target *target)
{
if (erase == LOAD_TIMER_ERASE)
{
@@ -249,7 +249,7 @@ static int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
{
uint32_t status;
int sector;
- target_t *target = bank->target;
+ struct target *target = bank->target;
status = lpc288x_system_ready(bank); /* probed? halted? */
if (status != ERROR_OK)
@@ -290,7 +290,7 @@ static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
{
uint8_t page_buffer[FLASH_PAGE_SIZE];
uint32_t status, source_offset,dest_offset;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t bytes_remaining = count;
uint32_t first_sector, last_sector, sector, page;
int i;
@@ -435,7 +435,7 @@ static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int la
{
int lockregion, status;
uint32_t value;
- target_t *target = bank->target;
+ struct target *target = bank->target;
/* probed? halted? */
status = lpc288x_system_ready(bank);
diff --git a/src/flash/lpc2900.c b/src/flash/lpc2900.c
index 5b6a5be4..49d02598 100644
--- a/src/flash/lpc2900.c
+++ b/src/flash/lpc2900.c
@@ -199,7 +199,7 @@ static uint32_t lpc2900_wait_status( flash_bank_t *bank,
int timeout )
{
uint32_t int_status;
- target_t *target = bank->target;
+ struct target *target = bank->target;
do
@@ -283,7 +283,7 @@ static uint32_t lpc2900_read_security_status( struct flash_bank_s *bank )
return status;
}
- target_t *target = bank->target;
+ struct target *target = bank->target;
/* Enable ISS access */
target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
@@ -361,7 +361,7 @@ static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
uint32_t addr_to,
uint32_t (*signature)[4] )
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
/* Clear END_OF_MISR interrupt status */
target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );
@@ -436,7 +436,7 @@ static int lpc2900_write_index_page( struct flash_bank_s *bank,
}
/* Get target, and check if it's halted */
- target_t *target = bank->target;
+ struct target *target = bank->target;
if( target->state != TARGET_HALTED )
{
LOG_ERROR( "Target not halted" );
@@ -597,7 +597,7 @@ COMMAND_HANDLER(lpc2900_handle_read_custom_command)
lpc2900_info->risky = 0;
/* Get target, and check if it's halted */
- target_t *target = bank->target;
+ struct target *target = bank->target;
if( target->state != TARGET_HALTED )
{
LOG_ERROR( "Target not halted" );
@@ -710,7 +710,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command)
lpc2900_info->risky = 0;
/* Get target, and check if it's halted */
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (target->state != TARGET_HALTED)
{
LOG_ERROR("Target not halted");
@@ -1075,7 +1075,7 @@ static int lpc2900_erase(struct flash_bank_s *bank, int first, int last)
uint32_t status;
int sector;
int last_unsecured_sector;
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@@ -1205,7 +1205,7 @@ static int lpc2900_write(struct flash_bank_s *bank, uint8_t *buffer,
uint8_t page[FLASH_PAGE_SIZE];
uint32_t status;
uint32_t num_bytes;
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
int sector;
int retval;
@@ -1551,7 +1551,7 @@ static int lpc2900_write(struct flash_bank_s *bank, uint8_t *buffer,
static int lpc2900_probe(struct flash_bank_s *bank)
{
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i = 0;
uint32_t offset;
diff --git a/src/flash/lpc3180_nand_controller.c b/src/flash/lpc3180_nand_controller.c
index 016fa70c..e4b0475f 100644
--- a/src/flash/lpc3180_nand_controller.c
+++ b/src/flash/lpc3180_nand_controller.c
@@ -37,7 +37,7 @@ NAND_DEVICE_COMMAND_HANDLER(lpc3180_nand_device_command)
return ERROR_FLASH_BANK_INVALID;
}
- target_t *target = get_target(args[1]);
+ struct target *target = get_target(args[1]);
if (NULL == target)
{
LOG_ERROR("target '%s' not defined", args[1]);
@@ -96,7 +96,7 @@ static int lpc3180_pll(int fclkin, uint32_t pll_ctrl)
static float lpc3180_cycle_time(struct lpc3180_nand_controller *lpc3180_info)
{
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
uint32_t sysclk_ctrl, pwr_ctrl, hclkdiv_ctrl, hclkpll_ctrl;
int sysclk;
int hclk;
@@ -147,7 +147,7 @@ static float lpc3180_cycle_time(struct lpc3180_nand_controller *lpc3180_info)
static int lpc3180_init(struct nand_device_s *nand)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
int bus_width = nand->bus_width ? : 8;
int address_cycles = nand->address_cycles ? : 3;
int page_size = nand->page_size ? : 512;
@@ -277,7 +277,7 @@ static int lpc3180_init(struct nand_device_s *nand)
static int lpc3180_reset(struct nand_device_s *nand)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
@@ -319,7 +319,7 @@ static int lpc3180_reset(struct nand_device_s *nand)
static int lpc3180_command(struct nand_device_s *nand, uint8_t command)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
@@ -349,7 +349,7 @@ static int lpc3180_command(struct nand_device_s *nand, uint8_t command)
static int lpc3180_address(struct nand_device_s *nand, uint8_t address)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
@@ -379,7 +379,7 @@ static int lpc3180_address(struct nand_device_s *nand, uint8_t address)
static int lpc3180_write_data(struct nand_device_s *nand, uint16_t data)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
@@ -409,7 +409,7 @@ static int lpc3180_write_data(struct nand_device_s *nand, uint16_t data)
static int lpc3180_read_data(struct nand_device_s *nand, void *data)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
@@ -471,7 +471,7 @@ static int lpc3180_read_data(struct nand_device_s *nand, void *data)
static int lpc3180_write_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
int retval;
uint8_t status;
@@ -610,7 +610,7 @@ static int lpc3180_write_page(struct nand_device_s *nand, uint32_t page, uint8_t
static int lpc3180_read_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
@@ -757,7 +757,7 @@ static int lpc3180_read_page(struct nand_device_s *nand, uint32_t page, uint8_t
static int lpc3180_controller_ready(struct nand_device_s *nand, int timeout)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
uint8_t status = 0x0;
if (target->state != TARGET_HALTED)
@@ -791,7 +791,7 @@ static int lpc3180_controller_ready(struct nand_device_s *nand, int timeout)
static int lpc3180_nand_ready(struct nand_device_s *nand, int timeout)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- target_t *target = lpc3180_info->target;
+ struct target *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
{
diff --git a/src/flash/lpc3180_nand_controller.h b/src/flash/lpc3180_nand_controller.h
index 6f5d2846..b965be98 100644
--- a/src/flash/lpc3180_nand_controller.h
+++ b/src/flash/lpc3180_nand_controller.h
@@ -31,7 +31,7 @@ enum lpc3180_selected_controller
struct lpc3180_nand_controller
{
- struct target_s *target;
+ struct target *target;
int osc_freq;
enum lpc3180_selected_controller selected_controller;
int sw_write_protection;
diff --git a/src/flash/mflash.c b/src/flash/mflash.c
index 5790a958..698cd16e 100644
--- a/src/flash/mflash.c
+++ b/src/flash/mflash.c
@@ -67,7 +67,7 @@ static struct mflash_gpio_drv *mflash_gpio[] =
static int pxa270_set_gpio_to_output (struct mflash_gpio_num gpio)
{
uint32_t addr, value, mask;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
int ret;
/* remove alternate function. */
@@ -104,7 +104,7 @@ static int pxa270_set_gpio_to_output (struct mflash_gpio_num gpio)
static int pxa270_set_gpio_output_val (struct mflash_gpio_num gpio, uint8_t val)
{
uint32_t addr, value, mask;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
int ret;
mask = 0x1u << (gpio.num & 0x1F);
@@ -133,7 +133,7 @@ static int pxa270_set_gpio_output_val (struct mflash_gpio_num gpio, uint8_t val)
static int s3c2440_set_gpio_to_output (struct mflash_gpio_num gpio)
{
uint32_t data, mask, gpio_con;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
int ret;
if (gpio.port[0] >= 'a' && gpio.port[0] <= 'h') {
@@ -165,7 +165,7 @@ static int s3c2440_set_gpio_to_output (struct mflash_gpio_num gpio)
static int s3c2440_set_gpio_output_val (struct mflash_gpio_num gpio, uint8_t val)
{
uint32_t data, mask, gpio_dat;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
int ret;
if (gpio.port[0] >= 'a' && gpio.port[0] <= 'h') {
@@ -213,7 +213,7 @@ static int mg_init_gpio (void)
static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
{
uint8_t status, error;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
int ret;
long long t = 0;
@@ -291,7 +291,7 @@ static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
static int mg_dsk_srst(uint8_t on)
{
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
uint8_t value;
int ret;
@@ -311,7 +311,7 @@ static int mg_dsk_srst(uint8_t on)
static int mg_dsk_io_cmd(uint32_t sect_num, uint32_t cnt, uint8_t cmd)
{
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
uint8_t value;
int ret;
@@ -336,7 +336,7 @@ static int mg_dsk_io_cmd(uint32_t sect_num, uint32_t cnt, uint8_t cmd)
static int mg_dsk_drv_info(void)
{
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint32_t mg_buff = mflash_bank->base + MG_BUFFER_OFFSET;
int ret;
@@ -426,7 +426,7 @@ static int mg_mflash_do_read_sects(void *buff, uint32_t sect_num, uint32_t sect_
{
uint32_t i, address;
int ret;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint8_t *buff_ptr = buff;
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_read)) != ERROR_OK)
@@ -498,7 +498,7 @@ static int mg_mflash_do_write_sects(void *buff, uint32_t sect_num, uint32_t sect
{
uint32_t i, address;
int ret;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint8_t *buff_ptr = buff;
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, cmd)) != ERROR_OK)
@@ -834,7 +834,7 @@ mg_dump_cmd_err:
static int mg_set_feature(mg_feature_id feature, mg_feature_val config)
{
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
int ret;
@@ -953,7 +953,7 @@ static int mg_verify_interface(void)
uint16_t buff[MG_MFLASH_SECTOR_SIZE >> 1];
uint16_t i, j;
uint32_t address = mflash_bank->base + MG_BUFFER_OFFSET;
- target_t *target = mflash_bank->target;
+ struct target *target = mflash_bank->target;
int ret;
for (j = 0; j < 10; j++) {
@@ -1282,7 +1282,7 @@ int mflash_init_drivers(struct command_context_s *cmd_ctx)
COMMAND_HANDLER(mg_bank_cmd)
{
- target_t *target;
+ struct target *target;
int i;
if (argc < 4)
diff --git a/src/flash/mflash.h b/src/flash/mflash.h
index 59bd1b00..a2bd5b3a 100644
--- a/src/flash/mflash.h
+++ b/src/flash/mflash.h
@@ -137,7 +137,7 @@ struct mflash_bank
struct mflash_gpio_num rst_pin;
struct mflash_gpio_drv *gpio_drv;
- target_t *target;
+ struct target *target;
struct mg_drv_info *drv_info;
};
diff --git a/src/flash/mx3_nand.c b/src/flash/mx3_nand.c
index 53111166..07a360f6 100644
--- a/src/flash/mx3_nand.c
+++ b/src/flash/mx3_nand.c
@@ -47,13 +47,13 @@ static const char get_status_register_err_msg[] = "can't get NAND status";
static uint32_t in_sram_address;
unsigned char sign_of_sequental_byte_read;
-static int test_iomux_settings (target_t * target, uint32_t value,
+static int test_iomux_settings (struct target * target, uint32_t value,
uint32_t mask, const char *text);
static int initialize_nf_controller (struct nand_device_s *nand);
-static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value);
-static int get_next_halfword_from_sram_buffer (target_t * target,
+static int get_next_byte_from_sram_buffer (struct target * target, uint8_t * value);
+static int get_next_halfword_from_sram_buffer (struct target * target,
uint16_t * value);
-static int poll_for_complete_op (target_t * target, const char *text);
+static int poll_for_complete_op (struct target * target, const char *text);
static int validate_target_state (struct nand_device_s *nand);
static int do_data_output (struct nand_device_s *nand);
@@ -124,7 +124,7 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
static int imx31_init (struct nand_device_s *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
@@ -267,7 +267,7 @@ static int imx31_init (struct nand_device_s *nand)
static int imx31_read_data (struct nand_device_s *nand, void *data)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
* validate target state
@@ -338,7 +338,7 @@ static int imx31_reset (struct nand_device_s *nand)
static int imx31_command (struct nand_device_s *nand, uint8_t command)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
* validate target state
@@ -412,7 +412,7 @@ static int imx31_command (struct nand_device_s *nand, uint8_t command)
static int imx31_address (struct nand_device_s *nand, uint8_t address)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
* validate target state
@@ -445,7 +445,7 @@ static int imx31_controller_ready (struct nand_device_s *nand, int tout)
{
uint16_t poll_complete_status;
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
@@ -477,7 +477,7 @@ static int imx31_write_page (struct nand_device_s *nand, uint32_t page,
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
if (data_size % 2)
{
@@ -584,7 +584,7 @@ static int imx31_read_page (struct nand_device_s *nand, uint32_t page,
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
if (data_size % 2)
{
@@ -643,7 +643,7 @@ static int imx31_read_page (struct nand_device_s *nand, uint32_t page,
return ERROR_OK;
}
-static int test_iomux_settings (target_t * target, uint32_t address,
+static int test_iomux_settings (struct target * target, uint32_t address,
uint32_t mask, const char *text)
{
uint32_t register_content;
@@ -659,7 +659,7 @@ static int test_iomux_settings (target_t * target, uint32_t address,
static int initialize_nf_controller (struct nand_device_s *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
@@ -709,7 +709,7 @@ static int initialize_nf_controller (struct nand_device_s *nand)
return ERROR_OK;
}
-static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value)
+static int get_next_byte_from_sram_buffer (struct target * target, uint8_t * value)
{
static uint8_t even_byte = 0;
/*
@@ -747,7 +747,7 @@ static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value)
return ERROR_OK;
}
-static int get_next_halfword_from_sram_buffer (target_t * target,
+static int get_next_halfword_from_sram_buffer (struct target * target,
uint16_t * value)
{
if (in_sram_address > MX3_NF_LAST_BUFFER_ADDR)
@@ -764,7 +764,7 @@ static int get_next_halfword_from_sram_buffer (target_t * target,
return ERROR_OK;
}
-static int poll_for_complete_op (target_t * target, const char *text)
+static int poll_for_complete_op (struct target * target, const char *text)
{
uint16_t poll_complete_status;
for (int poll_cycle_count = 0; poll_cycle_count < 100; poll_cycle_count++)
@@ -787,7 +787,7 @@ static int poll_for_complete_op (target_t * target, const char *text)
static int validate_target_state (struct nand_device_s *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
if (target->state != TARGET_HALTED)
{
@@ -809,7 +809,7 @@ static int validate_target_state (struct nand_device_s *nand)
static int do_data_output (struct nand_device_s *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
switch (mx3_nf_info->fin)
{
case MX3_NF_FIN_DATAOUT:
diff --git a/src/flash/mx3_nand.h b/src/flash/mx3_nand.h
index 1f3529a7..ddec92cf 100644
--- a/src/flash/mx3_nand.h
+++ b/src/flash/mx3_nand.h
@@ -110,7 +110,7 @@ struct mx3_nf_flags
struct mx3_nf_controller
{
- struct target_s *target;
+ struct target *target;
enum mx_dataout_type optype;
enum mx_nf_finalize_action fin;
struct mx3_nf_flags flags;
diff --git a/src/flash/orion_nand.c b/src/flash/orion_nand.c
index 82c717ac..d6519f2f 100644
--- a/src/flash/orion_nand.c
+++ b/src/flash/orion_nand.c
@@ -32,7 +32,7 @@
struct orion_nand_controller
{
- struct target_s *target;
+ struct target *target;
struct arm_nand_data io;
@@ -52,7 +52,7 @@ struct orion_nand_controller
static int orion_nand_command(struct nand_device_s *nand, uint8_t command)
{
struct orion_nand_controller *hw = nand->controller_priv;
- target_t *target = hw->target;
+ struct target *target = hw->target;
CHECK_HALTED;
target_write_u8(target, hw->cmd, command);
@@ -62,7 +62,7 @@ static int orion_nand_command(struct nand_device_s *nand, uint8_t command)
static int orion_nand_address(struct nand_device_s *nand, uint8_t address)
{
struct orion_nand_controller *hw = nand->controller_priv;
- target_t *target = hw->target;
+ struct target *target = hw->target;
CHECK_HALTED;
target_write_u8(target, hw->addr, address);
@@ -72,7 +72,7 @@ static int orion_nand_address(struct nand_device_s *nand, uint8_t address)
static int orion_nand_read(struct nand_device_s *nand, void *data)
{
struct orion_nand_controller *hw = nand->controller_priv;
- target_t *target = hw->target;
+ struct target *target = hw->target;
CHECK_HALTED;
target_read_u8(target, hw->data, data);
@@ -82,7 +82,7 @@ static int orion_nand_read(struct nand_device_s *nand, void *data)
static int orion_nand_write(struct nand_device_s *nand, uint16_t data)
{
struct orion_nand_controller *hw = nand->controller_priv;
- target_t *target = hw->target;
+ struct target *target = hw->target;
CHECK_HALTED;
target_write_u8(target, hw->data, data);
diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c
index d29950ce..25f90fd6 100644
--- a/src/flash/pic32mx.c
+++ b/src/flash/pic32mx.c
@@ -83,7 +83,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
static uint32_t pic32mx_get_flash_status(flash_bank_t *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_read_u32(target, PIC32MX_NVMCON, &status);
@@ -109,7 +109,7 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t timeout)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
@@ -131,7 +131,7 @@ static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t tim
static int pic32mx_protect_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t devcfg0;
int s;
@@ -165,7 +165,7 @@ static int pic32mx_protect_check(struct flash_bank_s *bank)
static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t status;
@@ -208,7 +208,7 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
{
struct pic32mx_flash_bank *pic32mx_info = NULL;
- target_t *target = bank->target;
+ struct target *target = bank->target;
#if 0
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
@@ -300,7 +300,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 512;
struct working_area *source;
uint32_t address = bank->base + offset;
@@ -429,7 +429,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
@@ -445,7 +445,7 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3
*/
static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
@@ -541,7 +541,7 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
static int pic32mx_probe(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
struct mips32_common *mips32 = target->arch_info;
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -639,7 +639,7 @@ COMMAND_HANDLER(pic32mx_handle_part_id_command)
static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct mips32_common *mips32 = target->arch_info;
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t device_id;
@@ -674,7 +674,7 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
#if 0
COMMAND_HANDLER(pic32mx_handle_lock_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct pic32mx_flash_bank *pic32mx_info = NULL;
if (argc < 1)
@@ -720,7 +720,7 @@ COMMAND_HANDLER(pic32mx_handle_lock_command)
COMMAND_HANDLER(pic32mx_handle_unlock_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct pic32mx_flash_bank *pic32mx_info = NULL;
if (argc < 1)
@@ -765,7 +765,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
#if 0
static int pic32mx_chip_erase(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
#if 0
uint32_t status;
#endif
diff --git a/src/flash/s3c2410_nand.c b/src/flash/s3c2410_nand.c
index 4d084403..23795fbd 100644
--- a/src/flash/s3c2410_nand.c
+++ b/src/flash/s3c2410_nand.c
@@ -47,7 +47,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
static int s3c2410_init(struct nand_device_s *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
@@ -59,7 +59,7 @@ static int s3c2410_init(struct nand_device_s *nand)
static int s3c2410_write_data(struct nand_device_s *nand, uint16_t data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -73,7 +73,7 @@ static int s3c2410_write_data(struct nand_device_s *nand, uint16_t data)
static int s3c2410_read_data(struct nand_device_s *nand, void *data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -87,7 +87,7 @@ static int s3c2410_read_data(struct nand_device_s *nand, void *data)
static int s3c2410_nand_ready(struct nand_device_s *nand, int timeout)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
uint8_t status;
if (target->state != TARGET_HALTED) {
diff --git a/src/flash/s3c2412_nand.c b/src/flash/s3c2412_nand.c
index 9f456fe5..85219322 100644
--- a/src/flash/s3c2412_nand.c
+++ b/src/flash/s3c2412_nand.c
@@ -47,7 +47,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
static int s3c2412_init(struct nand_device_s *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
diff --git a/src/flash/s3c2440_nand.c b/src/flash/s3c2440_nand.c
index 40037c7f..44ac3c2a 100644
--- a/src/flash/s3c2440_nand.c
+++ b/src/flash/s3c2440_nand.c
@@ -48,7 +48,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
static int s3c2440_init(struct nand_device_s *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
@@ -64,7 +64,7 @@ static int s3c2440_init(struct nand_device_s *nand)
int s3c2440_nand_ready(struct nand_device_s *nand, int timeout)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
uint8_t status;
if (target->state != TARGET_HALTED) {
@@ -90,7 +90,7 @@ int s3c2440_nand_ready(struct nand_device_s *nand, int timeout)
int s3c2440_read_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
@@ -126,7 +126,7 @@ int s3c2440_read_block_data(struct nand_device_s *nand, uint8_t *data, int data_
int s3c2440_write_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
diff --git a/src/flash/s3c2443_nand.c b/src/flash/s3c2443_nand.c
index 0f086441..c1441647 100644
--- a/src/flash/s3c2443_nand.c
+++ b/src/flash/s3c2443_nand.c
@@ -48,7 +48,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
static int s3c2443_init(struct nand_device_s *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
diff --git a/src/flash/s3c24xx_nand.c b/src/flash/s3c24xx_nand.c
index 17de5d41..5125fd26 100644
--- a/src/flash/s3c24xx_nand.c
+++ b/src/flash/s3c24xx_nand.c
@@ -60,7 +60,7 @@ int s3c24xx_register_commands(struct command_context_s *cmd_ctx)
int s3c24xx_reset(struct nand_device_s *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -75,7 +75,7 @@ int s3c24xx_reset(struct nand_device_s *nand)
int s3c24xx_command(struct nand_device_s *nand, uint8_t command)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -90,7 +90,7 @@ int s3c24xx_command(struct nand_device_s *nand, uint8_t command)
int s3c24xx_address(struct nand_device_s *nand, uint8_t address)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -104,7 +104,7 @@ int s3c24xx_address(struct nand_device_s *nand, uint8_t address)
int s3c24xx_write_data(struct nand_device_s *nand, uint16_t data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -118,7 +118,7 @@ int s3c24xx_write_data(struct nand_device_s *nand, uint16_t data)
int s3c24xx_read_data(struct nand_device_s *nand, void *data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- target_t *target = s3c24xx_info->target;
+ struct target *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
diff --git a/src/flash/s3c24xx_nand.h b/src/flash/s3c24xx_nand.h
index 6cfad3d3..ed885916 100644
--- a/src/flash/s3c24xx_nand.h
+++ b/src/flash/s3c24xx_nand.h
@@ -32,7 +32,7 @@
struct s3c24xx_nand_controller
{
- struct target_s *target;
+ struct target *target;
/* register addresses */
uint32_t cmd;
diff --git a/src/flash/stellaris.c b/src/flash/stellaris.c
index 6ec036cc..748b231c 100644
--- a/src/flash/stellaris.c
+++ b/src/flash/stellaris.c
@@ -318,7 +318,7 @@ static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
static uint32_t stellaris_get_flash_status(flash_bank_t *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t fmc;
target_read_u32(target, FLASH_CONTROL_BASE | FLASH_FMC, &fmc);
@@ -364,7 +364,7 @@ static const unsigned rcc_xtal[32] = {
static void stellaris_read_clock_info(flash_bank_t *bank)
{
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
unsigned xtal;
unsigned long mainfreq;
@@ -451,7 +451,7 @@ static void stellaris_read_clock_info(flash_bank_t *bank)
static void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
{
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
LOG_DEBUG("usecrl = %i",(int)(usecrl));
@@ -479,7 +479,7 @@ static uint32_t stellaris_wait_status_busy(flash_bank_t *bank, uint32_t waitbits
static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_t pagen)
{
uint32_t fmc;
- target_t *target = bank->target;
+ struct target *target = bank->target;
fmc = FMC_WRKEY | cmd;
target_write_u32(target, FLASH_CONTROL_BASE | FLASH_FMC, fmc);
@@ -498,7 +498,7 @@ static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_
static int stellaris_read_part_info(struct flash_bank_s *bank)
{
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t did0, did1, ver, fam, status;
int i;
@@ -647,7 +647,7 @@ static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
int banknr;
uint32_t flash_fmc, flash_cris;
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (bank->target->state != TARGET_HALTED)
{
@@ -718,7 +718,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
int lockregion;
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (bank->target->state != TARGET_HALTED)
{
@@ -830,7 +830,7 @@ static uint8_t stellaris_write_code[] =
static int stellaris_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t wcount)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 8192;
struct working_area *source;
struct working_area *write_algorithm;
@@ -911,7 +911,7 @@ static int stellaris_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t address = offset;
uint32_t flash_cris, flash_fmc;
uint32_t words_remaining = (count / 4);
@@ -1069,7 +1069,7 @@ static int stellaris_auto_probe(struct flash_bank_s *bank)
static int stellaris_mass_erase(struct flash_bank_s *bank)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct stellaris_flash_bank *stellaris_info = NULL;
uint32_t flash_fmc;
diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c
index 35da209c..a9b4fb3f 100644
--- a/src/flash/stm32x.c
+++ b/src/flash/stm32x.c
@@ -54,7 +54,7 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
static uint32_t stm32x_get_flash_status(flash_bank_t *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_read_u32(target, STM32_FLASH_SR, &status);
@@ -64,7 +64,7 @@ static uint32_t stm32x_get_flash_status(flash_bank_t *bank)
static uint32_t stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
/* wait for busy to clear */
@@ -85,7 +85,7 @@ static int stm32x_read_options(struct flash_bank_s *bank)
{
uint32_t optiondata;
struct stm32x_flash_bank *stm32x_info = NULL;
- target_t *target = bank->target;
+ struct target *target = bank->target;
stm32x_info = bank->driver_priv;
@@ -112,7 +112,7 @@ static int stm32x_read_options(struct flash_bank_s *bank)
static int stm32x_erase_options(struct flash_bank_s *bank)
{
struct stm32x_flash_bank *stm32x_info = NULL;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
stm32x_info = bank->driver_priv;
@@ -149,7 +149,7 @@ static int stm32x_erase_options(struct flash_bank_s *bank)
static int stm32x_write_options(struct flash_bank_s *bank)
{
struct stm32x_flash_bank *stm32x_info = NULL;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
stm32x_info = bank->driver_priv;
@@ -232,7 +232,7 @@ static int stm32x_write_options(struct flash_bank_s *bank)
static int stm32x_protect_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
uint32_t protection;
@@ -304,7 +304,7 @@ static int stm32x_protect_check(struct flash_bank_s *bank)
static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t status;
@@ -346,7 +346,7 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
struct stm32x_flash_bank *stm32x_info = NULL;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
int status;
@@ -433,7 +433,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 16384;
struct working_area *source;
uint32_t address = bank->base + offset;
@@ -551,7 +551,7 @@ static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32
static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t words_remaining = (count / 2);
uint32_t bytes_remaining = (count & 0x00000001);
uint32_t address = bank->base + offset;
@@ -656,7 +656,7 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
static int stm32x_probe(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
int i;
uint16_t num_pages;
@@ -788,7 +788,7 @@ COMMAND_HANDLER(stm32x_handle_part_id_command)
static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t device_id;
int printed;
@@ -894,7 +894,7 @@ static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
COMMAND_HANDLER(stm32x_handle_lock_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct stm32x_flash_bank *stm32x_info = NULL;
if (argc < 1)
@@ -940,7 +940,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
COMMAND_HANDLER(stm32x_handle_unlock_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct stm32x_flash_bank *stm32x_info = NULL;
if (argc < 1)
@@ -984,7 +984,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
COMMAND_HANDLER(stm32x_handle_options_read_command)
{
uint32_t optionbyte;
- target_t *target = NULL;
+ struct target *target = NULL;
struct stm32x_flash_bank *stm32x_info = NULL;
if (argc < 1)
@@ -1039,7 +1039,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
COMMAND_HANDLER(stm32x_handle_options_write_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct stm32x_flash_bank *stm32x_info = NULL;
uint16_t optionbyte = 0xF8;
@@ -1112,7 +1112,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
static int stm32x_mass_erase(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
if (target->state != TARGET_HALTED)
diff --git a/src/flash/str7x.c b/src/flash/str7x.c
index d5defe5f..d22886f9 100644
--- a/src/flash/str7x.c
+++ b/src/flash/str7x.c
@@ -156,7 +156,7 @@ FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command)
static uint32_t str7x_status(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t retval;
target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval);
@@ -166,7 +166,7 @@ static uint32_t str7x_status(struct flash_bank_s *bank)
static uint32_t str7x_result(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t retval;
target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval);
@@ -177,7 +177,7 @@ static uint32_t str7x_result(struct flash_bank_s *bank)
static int str7x_protect_check(struct flash_bank_s *bank)
{
struct str7x_flash_bank *str7x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t retval;
@@ -204,7 +204,7 @@ static int str7x_protect_check(struct flash_bank_s *bank)
static int str7x_erase(struct flash_bank_s *bank, int first, int last)
{
struct str7x_flash_bank *str7x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t cmd;
@@ -257,7 +257,7 @@ static int str7x_erase(struct flash_bank_s *bank, int first, int last)
static int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
struct str7x_flash_bank *str7x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t cmd;
uint32_t retval;
@@ -311,7 +311,7 @@ static int str7x_protect(struct flash_bank_s *bank, int set, int first, int last
static int str7x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct str7x_flash_bank *str7x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 8192;
struct working_area *source;
uint32_t address = bank->base + offset;
@@ -425,7 +425,7 @@ static int str7x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_
static int str7x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct str7x_flash_bank *str7x_info = bank->driver_priv;
uint32_t dwords_remaining = (count / 8);
uint32_t bytes_remaining = (count & 0x00000007);
@@ -603,7 +603,7 @@ static int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size)
COMMAND_HANDLER(str7x_handle_disable_jtag_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct str7x_flash_bank *str7x_info = NULL;
uint32_t flash_cmd;
diff --git a/src/flash/str9x.c b/src/flash/str9x.c
index 09e5a08f..f7bc3c61 100644
--- a/src/flash/str9x.c
+++ b/src/flash/str9x.c
@@ -140,7 +140,7 @@ static int str9x_protect_check(struct flash_bank_s *bank)
{
int retval;
struct str9x_flash_bank *str9x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t adr;
@@ -216,7 +216,7 @@ static int str9x_protect_check(struct flash_bank_s *bank)
static int str9x_erase(struct flash_bank_s *bank, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t adr;
uint8_t status;
@@ -309,7 +309,7 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last)
static int str9x_protect(struct flash_bank_s *bank,
int set, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t adr;
uint8_t status;
@@ -349,7 +349,7 @@ static int str9x_write_block(struct flash_bank_s *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct str9x_flash_bank *str9x_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 8192;
struct working_area *source;
uint32_t address = bank->base + offset;
@@ -457,7 +457,7 @@ static int str9x_write_block(struct flash_bank_s *bank,
static int str9x_write(struct flash_bank_s *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t words_remaining = (count / 2);
uint32_t bytes_remaining = (count & 0x00000001);
uint32_t address = bank->base + offset;
@@ -633,7 +633,7 @@ static int str9x_info(struct flash_bank_s *bank, char *buf, int buf_size)
COMMAND_HANDLER(str9x_handle_flash_config_command)
{
struct str9x_flash_bank *str9x_info;
- target_t *target = NULL;
+ struct target *target = NULL;
if (argc < 5)
{
diff --git a/src/flash/tms470.c b/src/flash/tms470.c
index 9f45b471..a23e042c 100644
--- a/src/flash/tms470.c
+++ b/src/flash/tms470.c
@@ -109,7 +109,7 @@ const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = {
static int tms470_read_part_info(struct flash_bank_s *bank)
{
struct tms470_flash_bank *tms470_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t device_ident_reg;
uint32_t silicon_version;
uint32_t technology_family;
@@ -402,7 +402,7 @@ COMMAND_HANDLER(tms470_handle_plldis_command)
/* ---------------------------------------------------------------------- */
-static int tms470_check_flash_unlocked(target_t * target)
+static int tms470_check_flash_unlocked(struct target * target)
{
uint32_t fmbbusy;
@@ -413,7 +413,7 @@ static int tms470_check_flash_unlocked(target_t * target)
/* ---------------------------------------------------------------------- */
-static int tms470_try_flash_keys(target_t * target, const uint32_t * key_set)
+static int tms470_try_flash_keys(struct target * target, const uint32_t * key_set)
{
uint32_t glbctrl, fmmstat;
int retval = ERROR_FLASH_OPERATION_FAILED;
@@ -493,7 +493,7 @@ static int tms470_try_flash_keys(target_t * target, const uint32_t * key_set)
static int tms470_unlock_flash(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
const uint32_t *p_key_sets[5];
unsigned i, key_set_count;
@@ -533,7 +533,7 @@ static int tms470_unlock_flash(struct flash_bank_s *bank)
static int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
{
uint32_t fmmac2, fmmac1, fmmaxep, k, delay, glbctrl, sysclk;
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct tms470_flash_bank *tms470_info = bank->driver_priv;
int result = ERROR_OK;
@@ -668,7 +668,7 @@ static int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *b
int tms470_flash_status(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int result = ERROR_OK;
uint32_t fmmstat;
@@ -725,7 +725,7 @@ int tms470_flash_status(struct flash_bank_s *bank)
static int tms470_erase_sector(struct flash_bank_s *bank, int sector)
{
uint32_t glbctrl, orig_fmregopt, fmbsea, fmbseb, fmmstat;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t flashAddr = bank->base + bank->sectors[sector].offset;
int result = ERROR_OK;
@@ -880,7 +880,7 @@ static int tms470_erase(struct flash_bank_s *bank, int first, int last)
static int tms470_protect(struct flash_bank_s *bank, int set, int first, int last)
{
struct tms470_flash_bank *tms470_info = bank->driver_priv;
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t fmmac2, fmbsea, fmbseb;
int sector;
@@ -931,7 +931,7 @@ static int tms470_protect(struct flash_bank_s *bank, int set, int first, int las
static int tms470_write(struct flash_bank_s *bank, uint8_t * buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t glbctrl, fmbac2, orig_fmregopt, fmbsea, fmbseb, fmmaxpp, fmmstat;
int result = ERROR_OK;
uint32_t i;
@@ -1051,7 +1051,7 @@ static int tms470_auto_probe(struct flash_bank_s *bank)
static int tms470_erase_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct tms470_flash_bank *tms470_info = bank->driver_priv;
int sector, result = ERROR_OK;
uint32_t fmmac2, fmbac2, glbctrl, orig_fmregopt;
@@ -1142,7 +1142,7 @@ static int tms470_erase_check(struct flash_bank_s *bank)
static int tms470_protect_check(struct flash_bank_s *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct tms470_flash_bank *tms470_info = bank->driver_priv;
int sector, result = ERROR_OK;
uint32_t fmmac2, fmbsea, fmbseb;