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authorDean Glazeski <dnglaze@gmail.com>2009-11-16 12:43:39 -0600
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-26 23:56:58 -0800
commit8f3c728273e9b89070259d6120117f6a190dd773 (patch)
treefa6efaec64ca48c739bf49ce193cfdfdd4578e4a /src/flash
parent05a5f682c6cff5bba3b54ec7d8bd0ad6b7a72054 (diff)
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ARM NAND I/O documentation update.
This updates the functions in the file to all have doxygen comments describing what they do. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/flash')
-rw-r--r--src/flash/arm_nandio.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/flash/arm_nandio.c b/src/flash/arm_nandio.c
index 990d3a0f..f774b619 100644
--- a/src/flash/arm_nandio.c
+++ b/src/flash/arm_nandio.c
@@ -68,7 +68,7 @@ int arm_code_to_working_area(struct target *target, const uint32_t *code, unsign
return retval;
}
-/*
+/**
* ARM-specific bulk write from buffer to address of 8-bit wide NAND.
* For now this only supports ARMv4 and ARMv5 cores.
*
@@ -78,6 +78,11 @@ int arm_code_to_working_area(struct target *target, const uint32_t *code, unsign
* Different code fragments could handle:
* - Thumb2 cores like Cortex-M (needs different byteswapping)
* - 16-bit wide data (needs different setup too)
+ *
+ * @param nand Pointer to the arm_nand_data struct that defines the I/O
+ * @param data Pointer to the data to be copied to flash
+ * @param size Size of the data being copied
+ * @return Success or failure of the operation
*/
int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
{
@@ -159,6 +164,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
* @param nand Pointer to the arm_nand_data struct that defines the I/O
* @param data Pointer to the data buffer to store the read data
* @param size Amount of data to be stored to the buffer.
+ * @return Success or failure of the operation
*/
int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
{