ARMv7-M: start using "struct arm"

This sets up a few of the core "struct arm" data structures so they
can be used with ARMv7-M cores.  Specifically, it:

 - defines new ARM core_modes to match the microcontroller modes
   (e.g. HANDLER not IRQ, and two types of thread mode);

 - Establishes a new microcontroller "core_type", which can be
   used to make sure v7-M (and v6-M) cores are handled right;

 - adds "struct arm" to "struct armv7m" and arranges for the
   target_to_armv7m() converter to use it;

 - sets up the arm.core_cache and arm.cpsr values

 - makes the Cortex-M3 code maintain arm.map and arm.core_mode.

This is currently set up as a parallel data structure, primarily to
minimize special cases for the semihosting support with microcontroller
profile cores.

Later patches can rip out the duplicative ARMv7-M support and start
reusing core ARM code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

1 files changed, 16 insertions, 1 deletions

diff --git a/src/target/arm.h b/src/target/arm.h
index 988266e3..c72b1942 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -40,9 +40,17 @@
  */
 
 /**
- * These numbers match the five low bits of the *PSR registers on
+ * Represent state of an ARM core.
+ *
+ * Most numbers match the five low bits of the *PSR registers on
  * "classic ARM" processors, which build on the ARMv4 processor
  * modes and register set.
+ *
+ * ARM_MODE_ANY is a magic value, often used as a wildcard.
+ *
+ * Only the microcontroller cores (ARMv6-M, ARMv7-M) support ARM_MODE_THREAD,
+ * ARM_MODE_USER_THREAD, and ARM_MODE_HANDLER.  Those are the only modes
+ * they support.
  */
 enum arm_mode {
 	ARM_MODE_USR = 16,
@@ -53,6 +61,11 @@ enum arm_mode {
 	ARM_MODE_MON = 26,
 	ARM_MODE_UND = 27,
 	ARM_MODE_SYS = 31,
+
+	ARM_MODE_THREAD,
+	ARM_MODE_USER_THREAD,
+	ARM_MODE_HANDLER,
+
 	ARM_MODE_ANY = -1
 };
 
@@ -96,6 +109,8 @@ struct arm {
 	 * ARM_MODE_ANY indicates the standard set of 37 registers,
 	 * seen on for example ARM7TDMI cores.  ARM_MODE_MON indicates three
 	 * more registers are shadowed, for "Secure Monitor" mode.
+	 * ARM_MODE_THREAD indicates a microcontroller profile core,
+	 * which only shadows SP.
 	 */
 	enum arm_mode core_type;