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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-04 18:57:30 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-04 18:57:30 -0800 |
| commit | f4651c869fb0bbe00495a09470af0a934814c92a (patch) | |
| tree | 2059b65a9fc0cde9a8bcda78b67375e7b24cbf99 /src/target/arm11.c | |
| parent | 87a0119fa24fe0fc904dcf2e6569cc0b9cb580ed (diff) | |
| download | openocd+libswd-f4651c869fb0bbe00495a09470af0a934814c92a.tar.gz openocd+libswd-f4651c869fb0bbe00495a09470af0a934814c92a.tar.bz2 openocd+libswd-f4651c869fb0bbe00495a09470af0a934814c92a.tar.xz openocd+libswd-f4651c869fb0bbe00495a09470af0a934814c92a.zip | |
ARM11: tweak TAP ops and debugging
Tweak scanchain 7 debug messaging:
- show register addresses in decimal, matching ARM docs;
- remove some pointless noise
Avoid some needless roundtrips:
- skip SCAN_N when SCREG already holds that number (speeds up
polling and other common operations)
- avoid zeroing vcr twice on resume
Show the IR opcode as a label ("RESTART") too; and in decimal,
matching ARM docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm11.c')
| -rw-r--r-- | src/target/arm11.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c index 20ad22d5..b05ef302 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -513,7 +513,8 @@ static int arm11_resume(struct target *target, int current, brp_num++; } - arm11_sc7_set_vcr(arm11, arm11_vcr); + if (arm11_vcr) + arm11_sc7_set_vcr(arm11, arm11_vcr); } arm11_leave_debug_state(arm11, handle_breakpoints); @@ -1133,7 +1134,7 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp) arm11->jtag_info.tap = target->tap; arm11->jtag_info.scann_size = 5; arm11->jtag_info.scann_instr = ARM11_SCAN_N; - /* cur_scan_chain == 0 */ + arm11->jtag_info.cur_scan_chain = ~0; /* invalid/unknown */ arm11->jtag_info.intest_instr = ARM11_INTEST; return ERROR_OK; |