- This speeds up dcc arm7_9 bulk write a little bit and exercises the jtag_add_dr_out() codepath

- added a check to jtag_add_pathmove() for legal path transitions
- tweaked jtag.h docs a little bit
- made some jtag bypass tests _DEBUG_JTAG_IO_


git-svn-id: svn://svn.berlios.de/openocd/trunk@448 b42882b7-edfa-0310-969c-e2dbd0fdcd60

1 files changed, 37 insertions, 3 deletions

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index dd713b9b..c3dcc294 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2165,10 +2165,44 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
 
 	arm7_9_resume(target, 0, arm7_9->dcc_working_area->address, 1, 1);
 	
-	for (i = 0; i < count; i++)
+	int little=target->endianness==TARGET_LITTLE_ENDIAN;
+	if (count>2)
 	{
-		embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], target_buffer_get_u32(target, buffer));
-		buffer += 4;
+		/* Handle first & last using standard embeddedice_write_reg and the middle ones w/the
+		   core function repeated. 
+		 */
+		embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
+		buffer+=4;
+		
+		embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
+		u8 reg_addr = ice_reg->addr & 0x1f;
+		int chain_pos = ice_reg->jtag_info->chain_pos;
+		/* we want the compiler to duplicate the code, which it does not
+		 * do automatically.
+		 */
+		if (little)
+		{
+			for (i = 1; i < count - 1; i++)
+			{
+				embeddedice_write_reg_inner(chain_pos, reg_addr, fast_target_buffer_get_u32(buffer, little));
+				buffer += 4;
+			}
+		} else
+		{
+			for (i = 1; i < count - 1; i++)
+			{
+				embeddedice_write_reg_inner(chain_pos, reg_addr, fast_target_buffer_get_u32(buffer, little));
+				buffer += 4;
+			}
+		}
+		embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
+	} else
+	{
+		for (i = 0; i < count; i++)
+		{
+			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
+			buffer += 4;
+		}
 	}
 	
 	target->type->halt(target);