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| author | mifi <mifi@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-02-06 19:25:42 +0000 |
|---|---|---|
| committer | mifi <mifi@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-02-06 19:25:42 +0000 |
| commit | a34e4b39c47cd9f67f3f70be36c1b2f25ab23f5f (patch) | |
| tree | a0b039ac2d46b2dc1777310be6b9086468483e5c /src/target/arm7_9_common.c | |
| parent | 4d88f024a614f699d5ce5673520762bcfdf96ce2 (diff) | |
| download | openocd+libswd-a34e4b39c47cd9f67f3f70be36c1b2f25ab23f5f.tar.gz openocd+libswd-a34e4b39c47cd9f67f3f70be36c1b2f25ab23f5f.tar.bz2 openocd+libswd-a34e4b39c47cd9f67f3f70be36c1b2f25ab23f5f.tar.xz openocd+libswd-a34e4b39c47cd9f67f3f70be36c1b2f25ab23f5f.zip | |
- added patch to solve problem with AT91SAM9260 (dirty register)
(thanks to Øyvind Harboe for the patch)
git-svn-id: svn://svn.berlios.de/openocd/trunk@282 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/arm7_9_common.c')
| -rw-r--r-- | src/target/arm7_9_common.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index af3b7b32..825f7fac 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -1146,8 +1146,8 @@ int arm7_9_debug_entry(target_t *target) } /* r0 and r15 (pc) have to be restored later */ - ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1; - ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 15).dirty = 1; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 15).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 15).valid; if ((retval = jtag->execute_queue()) != ERROR_OK) return retval; @@ -1908,7 +1908,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count } for (i=0; i<=last_reg; i++) - ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = 1; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid; arm7_9->read_xpsr(target, &cpsr, 0); if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -2073,7 +2073,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun embeddedice_store_reg(dbg_ctrl); for (i=0; i<=last_reg; i++) - ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = 1; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid; arm7_9->read_xpsr(target, &cpsr, 0); if ((retval = jtag_execute_queue()) != ERROR_OK) |